Fixed names and links

COPYING

@@ -1,6 +1,6 @@
 SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 
-Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 
 Permission to use, copy, modify, and/or distribute this software for any
 purpose with or without fee is hereby granted, provided that the above

README.md

@@ -1,5 +1,3 @@
-SymbiYosys (sby) is a front-end driver program for [Yosys](http://www.clifford.at/yosys)-based formal hardware verification flows. See [http://symbiyosys.readthedocs.io/](http://symbiyosys.readthedocs.io/) for documentation on how to use SymbiYosys.
+SymbiYosys (sby) is a front-end driver program for [Yosys](https://yosyshq.net/yosys/)-based formal hardware verification flows. See [https://yosyshq.readthedocs.io/projects/sby/](https://yosyshq.readthedocs.io/projects/sby/) for documentation on how to use SymbiYosys.
 
-Many example designs using SymbiYosys have been published on the [ZipCPU blog](http://zipcpu.com).  Please consider browsing the [formal verification page](http://zipcpu.com/formal/formal.html) of the [ZipCPU blog](http://zipcpu.com) for examples and commentary.
-
-SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the ["Selecting the right engine" section of the documentation](https://symbiyosys.readthedocs.io/en/latest/quickstart.html#selecting-the-right-engine).
+SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the ["Selecting the right engine" section of the documentation](https://yosyshq.readthedocs.io/projects/sby/en/latest/quickstart.html#selecting-the-right-engine).

docs/source/conf.py

@@ -15,7 +15,7 @@ highlight_language = 'systemverilog'
 
 html_theme_options = {
     'extra_nav_links' : { 
-        'YosysHQ Docs' : 'https://yosyshq-docs.readthedocs.io' ,
+        'YosysHQ Docs' : 'https://yosyshq.readthedocs.io' ,
         'YosysHQ Website' : 'https://www.yosyshq.com',
     },
 #   'logo' : 'logo.png',

docs/source/install.rst

@@ -21,7 +21,7 @@ Installing prerequisites (this command is for Ubuntu 16.04):
 Yosys, Yosys-SMTBMC and ABC
 ---------------------------
 
-http://www.clifford.at/yosys/
+https://yosyshq.net/yosys/
 
 https://people.eecs.berkeley.edu/~alanmi/abc/
 

docs/source/license.rst

@@ -8,7 +8,7 @@ SymbiYosys (sby) itself is licensed under the ISC license:
 
    SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
    
-   Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+   Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
    
    Permission to use, copy, modify, and/or distribute this software for any
    purpose with or without fee is hereby granted, provided that the above

extern/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

sbysrc/sby.py

@@ -2,7 +2,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_core.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_engine_abc.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_engine_aiger.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_engine_btor.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_engine_smtbmc.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_mode_bmc.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_mode_cover.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_mode_live.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above

sbysrc/sby_mode_prove.py

@@ -1,7 +1,7 @@
 #
 # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
 #
-# Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+# Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 #
 # Permission to use, copy, modify, and/or distribute this software for any
 # purpose with or without fee is hereby granted, provided that the above