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NLnet 2024-12-324 Add to the simulator in Fayalite the ability to transfer non-HDL data (e.g. HashMap) through the digital signalling mechanism, this allows using those data types when writing procedural models. #7

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opened 2025-08-26 06:50:30 +00:00 by programmerjake · 0 comments
programmerjake commented 2025-08-26 06:50:30 +00:00
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Issue for tracking progress of a subtask of NLnet grant 2024-12-324:
Add to the simulator in Fayalite the ability to transfer non-HDL data (e.g. HashMap) through the digital signalling mechanism, this allows using those data types when writing procedural models.

Issue for tracking progress of a subtask of [NLnet grant 2024-12-324](https://git.libre-chip.org/libre-chip/grant-tracking/src/branch/master/nlnet-2024-12-324/progress.md): Add to the simulator in Fayalite the ability to transfer non-HDL data (e.g. HashMap) through the digital signalling mechanism, this allows using those data types when writing procedural models. <!-- add additional content here if you like -->
programmerjake added this to the NLnet 2024-12-324 Libre-Chip's First CPU Architecture And Formal Proof of No Spectre bugs project 2025-08-26 06:50:30 +00:00
programmerjake self-assigned this 2025-08-26 08:43:43 +00:00
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#8 NLnet 2024-12-324 Create a model of the whole rename/execute/retire control system, using procedural implementations of the most complex HDL modules where appropriate.
libre-chip/grant-tracking
Reference: libre-chip/grant-tracking#7
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