4247 lines
294 KiB
Rust
4247 lines
294 KiB
Rust
// SPDX-License-Identifier: LGPL-3.0-or-later
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// See Notices.txt for copyright information
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use fayalite::{
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assert_export_firrtl,
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expr::{ExprEnum, ops::StructuralEq, target::GetTarget},
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firrtl::ExportOptions,
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intern::Intern,
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module::{
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StmtConnect,
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transform::{
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deduce_structural_eq_flags::deduce_structural_eq_flags_with_debug_tracing,
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simplify_enums::{SimplifyEnumsKind, simplify_enums},
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visit::{Visit, Visitor},
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},
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},
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prelude::*,
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};
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use std::convert::Infallible;
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#[hdl(outline_generated)]
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struct CheckStructuralEqOut {
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opt_unit_flip: Bool,
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opt_unit: Bool,
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opt_bool_flip: Bool,
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opt_bool: Bool,
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opt_opt_unit_flip: Bool,
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opt_opt_unit: Bool,
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array_opt_bool_flip: Bool,
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array_opt_bool: Bool,
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struct_opt_bool_flip: Bool,
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struct_opt_bool: Bool,
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}
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#[hdl(outline_generated)]
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struct CheckStructuralEqModuleIO {
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#[hdl(flip)]
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opt_unit_flip: HdlOption<()>,
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opt_unit: HdlOption<()>,
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#[hdl(flip)]
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opt_bool_flip: HdlOption<Bool>,
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opt_bool: HdlOption<Bool>,
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#[hdl(flip)]
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opt_opt_unit_flip: HdlOption<HdlOption<()>>,
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opt_opt_unit: HdlOption<HdlOption<()>>,
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#[hdl(flip)]
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array_opt_bool_flip: Array<HdlOption<Bool>, 2>,
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array_opt_bool: Array<HdlOption<Bool>, 2>,
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#[hdl(flip)]
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struct_opt_bool_flip: (HdlOption<Bool>, Bool),
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struct_opt_bool: (HdlOption<Bool>, Bool),
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}
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#[hdl_module(extern, outline_generated)]
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fn check_deduce_structural_eq_flags_extern_child() {
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#[hdl]
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let io: CheckStructuralEqModuleIO = m.output();
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}
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#[hdl_module(outline_generated)]
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fn check_deduce_structural_eq_flags_child() {
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#[hdl]
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let io: CheckStructuralEqModuleIO = m.output();
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#[hdl]
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let CheckStructuralEqModuleIO {
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opt_unit_flip,
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opt_unit,
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opt_bool_flip,
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opt_bool,
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opt_opt_unit_flip,
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opt_opt_unit,
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array_opt_bool_flip,
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array_opt_bool,
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struct_opt_bool_flip,
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struct_opt_bool,
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} = io;
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connect(opt_unit, opt_unit_flip);
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connect(opt_bool, opt_bool_flip);
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connect(opt_opt_unit, opt_opt_unit_flip);
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connect(array_opt_bool, array_opt_bool_flip);
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connect(struct_opt_bool, struct_opt_bool_flip);
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}
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#[hdl_module(outline_generated)]
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fn check_deduce_structural_eq_flags_parent() {
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#[hdl]
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let io: CheckStructuralEqModuleIO = m.input();
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#[hdl]
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let io_zeros: CheckStructuralEqModuleIO = m.input();
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#[hdl]
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let io_alternating: CheckStructuralEqModuleIO = m.input();
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#[hdl]
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let parent_out: CheckStructuralEqOut = m.output();
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#[hdl]
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let parent_zeros_out: CheckStructuralEqOut = m.output();
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#[hdl]
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let parent_alternating_out: CheckStructuralEqOut = m.output();
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#[hdl]
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let extern_child_out: CheckStructuralEqOut = m.output();
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#[hdl]
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let child_out: CheckStructuralEqOut = m.output();
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#[hdl]
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let extern_child = instance(check_deduce_structural_eq_flags_extern_child());
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#[hdl]
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let child = instance(check_deduce_structural_eq_flags_child());
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trait MapLiteral {
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fn map_literal<T: Type>(&self, expr: impl ToExpr<Type = T>) -> Expr<T>;
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}
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impl<F: Fn(Expr<CanonicalType>) -> Expr<CanonicalType>> MapLiteral for F {
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fn map_literal<T: Type>(&self, expr: impl ToExpr<Type = T>) -> Expr<T> {
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Expr::from_canonical(self(Expr::canonical(expr.to_expr())))
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}
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}
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#[hdl]
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fn connect_io(
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io_in: Expr<CheckStructuralEqModuleIO>,
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out: Expr<CheckStructuralEqOut>,
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map_literal: impl MapLiteral,
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) {
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#[hdl]
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let CheckStructuralEqModuleIO {
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opt_unit_flip,
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opt_unit,
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opt_bool_flip,
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opt_bool,
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opt_opt_unit_flip,
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opt_opt_unit,
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array_opt_bool_flip,
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array_opt_bool,
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struct_opt_bool_flip,
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struct_opt_bool,
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} = io_in;
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macro_rules! connect_pair {
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($field_flip:ident, $field:ident, $literal:expr $(,)?) => {
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let literal = map_literal.map_literal($literal);
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connect($field_flip, literal);
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connect(
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out.$field,
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StructuralEq::new(Expr::canonical($field), Expr::canonical(literal)),
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);
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connect(
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out.$field_flip,
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StructuralEq::new(Expr::canonical($field_flip), Expr::canonical(literal)),
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);
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};
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}
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connect_pair!(opt_unit_flip, opt_unit, HdlSome(()));
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connect_pair!(opt_bool_flip, opt_bool, HdlSome(true));
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connect_pair!(opt_opt_unit_flip, opt_opt_unit, HdlSome(HdlSome(())));
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connect_pair!(
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array_opt_bool_flip,
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array_opt_bool,
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[HdlSome(false), HdlSome(true)],
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);
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connect_pair!(struct_opt_bool_flip, struct_opt_bool, (HdlSome(true), true));
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};
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connect_io(io, parent_out, |expr| expr);
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connect_io(io_zeros, parent_zeros_out, |expr: Expr<CanonicalType>| {
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let ty = expr.ty();
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let bits = UInt[ty.bit_width()].zero().to_expr();
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bits.cast_bits_to(ty)
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});
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connect_io(
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io_alternating,
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parent_alternating_out,
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|expr: Expr<CanonicalType>| {
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let ty = expr.ty();
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let bits = u128::from_le_bytes([0xAA; _])
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.cast_to(UInt[ty.bit_width()])
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.to_expr();
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bits.cast_bits_to(ty)
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},
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);
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connect_io(extern_child.io, extern_child_out, |expr| expr);
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connect_io(child.io, child_out, |expr| expr);
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}
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#[test]
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fn test_deduce_structural_eq_flags() {
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let _n = SourceLocation::normalize_files_for_tests();
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let m = check_deduce_structural_eq_flags_parent();
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dbg!(m);
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#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
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assert_export_firrtl! {
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m =>
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options: ExportOptions {
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simplify_enums: None,
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..ExportOptions::default()
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},
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"/test/check_deduce_structural_eq_flags_parent.fir": r"FIRRTL version 3.2.0
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circuit check_deduce_structural_eq_flags_parent:
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type Ty0 = {}
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type Ty1 = {|HdlNone, HdlSome: Ty0|}
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type Ty2 = {|HdlNone, HdlSome: UInt<1>|}
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type Ty3 = {|HdlNone, HdlSome: Ty1|}
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type Ty4 = {`0`: Ty2, `1`: UInt<1>}
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type Ty5 = {flip opt_unit_flip: Ty1, opt_unit: Ty1, flip opt_bool_flip: Ty2, opt_bool: Ty2, flip opt_opt_unit_flip: Ty3, opt_opt_unit: Ty3, flip array_opt_bool_flip: Ty2[2], array_opt_bool: Ty2[2], flip struct_opt_bool_flip: Ty4, struct_opt_bool: Ty4}
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type Ty6 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>}
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type Ty7 = {`0`: UInt<2>, `1`: UInt<1>}
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type Ty8 = {io: Ty5}
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module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1]
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input io: Ty5 @[module-XXXXXXXXXX.rs 2:1]
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input io_zeros: Ty5 @[module-XXXXXXXXXX.rs 3:1]
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input io_alternating: Ty5 @[module-XXXXXXXXXX.rs 4:1]
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output parent_out: Ty6 @[module-XXXXXXXXXX.rs 5:1]
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output parent_zeros_out: Ty6 @[module-XXXXXXXXXX.rs 6:1]
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output parent_alternating_out: Ty6 @[module-XXXXXXXXXX.rs 7:1]
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output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 8:1]
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output child_out: Ty6 @[module-XXXXXXXXXX.rs 9:1]
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inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1]
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inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1]
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wire _bundle_literal_expr: Ty0
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invalidate _bundle_literal_expr
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connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
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wire _cast_enum_to_bits_expr: UInt<1>
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match io.opt_unit:
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HdlNone:
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connect _cast_enum_to_bits_expr, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome):
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connect _cast_enum_to_bits_expr, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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wire _cast_enum_to_bits_expr_1: UInt<1>
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match {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr):
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HdlNone:
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connect _cast_enum_to_bits_expr_1, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_1):
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connect _cast_enum_to_bits_expr_1, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
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wire _cast_enum_to_bits_expr_2: UInt<1>
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match io.opt_unit_flip:
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HdlNone:
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connect _cast_enum_to_bits_expr_2, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_2):
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connect _cast_enum_to_bits_expr_2, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
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connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
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wire _cast_enum_to_bits_expr_3: UInt<2>
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match io.opt_bool:
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HdlNone:
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connect _cast_enum_to_bits_expr_3, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_3):
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connect _cast_enum_to_bits_expr_3, pad(cat(_cast_enum_to_bits_expr_HdlSome_3, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_4: UInt<2>
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match {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)):
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HdlNone:
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connect _cast_enum_to_bits_expr_4, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_4):
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connect _cast_enum_to_bits_expr_4, pad(cat(_cast_enum_to_bits_expr_HdlSome_4, UInt<1>(1)), 2)
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connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
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wire _cast_enum_to_bits_expr_5: UInt<2>
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match io.opt_bool_flip:
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HdlNone:
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connect _cast_enum_to_bits_expr_5, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_5):
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connect _cast_enum_to_bits_expr_5, pad(cat(_cast_enum_to_bits_expr_HdlSome_5, UInt<1>(1)), 2)
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connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
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connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
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wire _cast_enum_to_bits_expr_6: UInt<2>
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match io.opt_opt_unit:
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HdlNone:
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connect _cast_enum_to_bits_expr_6, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_6):
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wire _cast_enum_to_bits_expr_7: UInt<1>
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match _cast_enum_to_bits_expr_HdlSome_6:
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HdlNone:
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connect _cast_enum_to_bits_expr_7, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_7):
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connect _cast_enum_to_bits_expr_7, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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connect _cast_enum_to_bits_expr_6, pad(cat(_cast_enum_to_bits_expr_7, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_8: UInt<2>
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match {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)):
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HdlNone:
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connect _cast_enum_to_bits_expr_8, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_8):
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wire _cast_enum_to_bits_expr_9: UInt<1>
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match _cast_enum_to_bits_expr_HdlSome_8:
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HdlNone:
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connect _cast_enum_to_bits_expr_9, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_9):
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connect _cast_enum_to_bits_expr_9, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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connect _cast_enum_to_bits_expr_8, pad(cat(_cast_enum_to_bits_expr_9, UInt<1>(1)), 2)
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connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
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wire _cast_enum_to_bits_expr_10: UInt<2>
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match io.opt_opt_unit_flip:
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HdlNone:
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connect _cast_enum_to_bits_expr_10, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_10):
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wire _cast_enum_to_bits_expr_11: UInt<1>
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match _cast_enum_to_bits_expr_HdlSome_10:
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HdlNone:
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connect _cast_enum_to_bits_expr_11, UInt<1>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_11):
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connect _cast_enum_to_bits_expr_11, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
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connect _cast_enum_to_bits_expr_10, pad(cat(_cast_enum_to_bits_expr_11, UInt<1>(1)), 2)
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connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
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wire _array_literal_expr: Ty2[2]
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connect _array_literal_expr[0], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h0))
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connect _array_literal_expr[1], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1))
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connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
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wire _cast_enum_to_bits_expr_12: UInt<2>
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match io.array_opt_bool[0]:
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HdlNone:
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connect _cast_enum_to_bits_expr_12, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_12):
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connect _cast_enum_to_bits_expr_12, pad(cat(_cast_enum_to_bits_expr_HdlSome_12, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_13: UInt<2>
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match _array_literal_expr[0]:
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HdlNone:
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connect _cast_enum_to_bits_expr_13, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_13):
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connect _cast_enum_to_bits_expr_13, pad(cat(_cast_enum_to_bits_expr_HdlSome_13, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_14: UInt<2>
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match io.array_opt_bool[1]:
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HdlNone:
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connect _cast_enum_to_bits_expr_14, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_14):
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connect _cast_enum_to_bits_expr_14, pad(cat(_cast_enum_to_bits_expr_HdlSome_14, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_15: UInt<2>
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match _array_literal_expr[1]:
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HdlNone:
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connect _cast_enum_to_bits_expr_15, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_15):
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connect _cast_enum_to_bits_expr_15, pad(cat(_cast_enum_to_bits_expr_HdlSome_15, UInt<1>(1)), 2)
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wire _array_structural_eq: UInt<1>
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connect _array_structural_eq, and(eq(_cast_enum_to_bits_expr_12, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_15))
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connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 16:1]
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wire _cast_enum_to_bits_expr_16: UInt<2>
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match io.array_opt_bool_flip[0]:
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HdlNone:
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connect _cast_enum_to_bits_expr_16, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_16):
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connect _cast_enum_to_bits_expr_16, pad(cat(_cast_enum_to_bits_expr_HdlSome_16, UInt<1>(1)), 2)
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wire _cast_enum_to_bits_expr_17: UInt<2>
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match io.array_opt_bool_flip[1]:
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HdlNone:
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connect _cast_enum_to_bits_expr_17, UInt<2>(0)
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HdlSome(_cast_enum_to_bits_expr_HdlSome_17):
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connect _cast_enum_to_bits_expr_17, pad(cat(_cast_enum_to_bits_expr_HdlSome_17, UInt<1>(1)), 2)
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wire _array_structural_eq_1: UInt<1>
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connect _array_structural_eq_1, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_15))
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connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 16:1]
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wire _bundle_literal_expr_1: Ty4
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connect _bundle_literal_expr_1.`0`, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1))
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connect _bundle_literal_expr_1.`1`, UInt<1>(0h1)
|
|
connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_18: UInt<2>
|
|
match io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_18, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_18):
|
|
connect _cast_enum_to_bits_expr_18, pad(cat(_cast_enum_to_bits_expr_HdlSome_18, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_19: UInt<2>
|
|
match _bundle_literal_expr_1.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_19, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_19):
|
|
connect _cast_enum_to_bits_expr_19, pad(cat(_cast_enum_to_bits_expr_HdlSome_19, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq: UInt<1>
|
|
connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_20: UInt<2>
|
|
match io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_20, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_20):
|
|
connect _cast_enum_to_bits_expr_20, pad(cat(_cast_enum_to_bits_expr_HdlSome_20, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_1: UInt<1>
|
|
connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_20, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_bits_to_enum_expr: Ty1
|
|
when eq(UInt<1>(0), tail(UInt<1>(0h0), 0)):
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_bundle_expr: Ty0
|
|
invalidate _cast_bits_to_bundle_expr
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect io_zeros.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_21: UInt<1>
|
|
match io_zeros.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_21, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_21):
|
|
connect _cast_enum_to_bits_expr_21, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
wire _cast_enum_to_bits_expr_22: UInt<1>
|
|
match _cast_bits_to_enum_expr:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_22, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_22):
|
|
connect _cast_enum_to_bits_expr_22, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_zeros_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_23: UInt<1>
|
|
match io_zeros.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_23, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_23):
|
|
connect _cast_enum_to_bits_expr_23, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_zeros_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_enum_expr_1: Ty2
|
|
wire _cast_bits_to_enum_expr_body_1: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_1, head(UInt<2>(0h0), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)):
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_1)
|
|
connect io_zeros.opt_bool_flip, _cast_bits_to_enum_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_24: UInt<2>
|
|
match io_zeros.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_24, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_24):
|
|
connect _cast_enum_to_bits_expr_24, pad(cat(_cast_enum_to_bits_expr_HdlSome_24, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_25: UInt<2>
|
|
match _cast_bits_to_enum_expr_1:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_25, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_25):
|
|
connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_HdlSome_25, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_bool, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_26: UInt<2>
|
|
match io_zeros.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_26, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_26):
|
|
connect _cast_enum_to_bits_expr_26, pad(cat(_cast_enum_to_bits_expr_HdlSome_26, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_bits_to_enum_expr_2: Ty3
|
|
wire _cast_bits_to_enum_expr_body_2: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_2, head(UInt<2>(0h0), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)):
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_enum_expr_3: Ty1
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_2, 0)):
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_3)
|
|
connect io_zeros.opt_opt_unit_flip, _cast_bits_to_enum_expr_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_27: UInt<2>
|
|
match io_zeros.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_27, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_27):
|
|
wire _cast_enum_to_bits_expr_28: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_27:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_28, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_28):
|
|
connect _cast_enum_to_bits_expr_28, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_27, pad(cat(_cast_enum_to_bits_expr_28, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_29: UInt<2>
|
|
match _cast_bits_to_enum_expr_2:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_29, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_29):
|
|
wire _cast_enum_to_bits_expr_30: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_29:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_30, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_30):
|
|
connect _cast_enum_to_bits_expr_30, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_30, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_31: UInt<2>
|
|
match io_zeros.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_31, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_31):
|
|
wire _cast_enum_to_bits_expr_32: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_31:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_32, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_32):
|
|
connect _cast_enum_to_bits_expr_32, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_32, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0)
|
|
wire _cast_bits_to_enum_expr_4: Ty2
|
|
wire _cast_bits_to_enum_expr_body_4: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_4, head(_cast_bits_to_array_expr_flattened[0], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[0], 1)):
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_4)
|
|
connect _cast_bits_to_array_expr[0], _cast_bits_to_enum_expr_4
|
|
connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2)
|
|
wire _cast_bits_to_enum_expr_5: Ty2
|
|
wire _cast_bits_to_enum_expr_body_5: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_5, head(_cast_bits_to_array_expr_flattened[1], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[1], 1)):
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_5)
|
|
connect _cast_bits_to_array_expr[1], _cast_bits_to_enum_expr_5
|
|
connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_33: UInt<2>
|
|
match io_zeros.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_33, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_33):
|
|
connect _cast_enum_to_bits_expr_33, pad(cat(_cast_enum_to_bits_expr_HdlSome_33, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_34: UInt<2>
|
|
match _cast_bits_to_array_expr[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_34, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_34):
|
|
connect _cast_enum_to_bits_expr_34, pad(cat(_cast_enum_to_bits_expr_HdlSome_34, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_35: UInt<2>
|
|
match io_zeros.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_35, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_35):
|
|
connect _cast_enum_to_bits_expr_35, pad(cat(_cast_enum_to_bits_expr_HdlSome_35, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_36: UInt<2>
|
|
match _cast_bits_to_array_expr[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_36, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_36):
|
|
connect _cast_enum_to_bits_expr_36, pad(cat(_cast_enum_to_bits_expr_HdlSome_36, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_2: UInt<1>
|
|
connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_36))
|
|
connect parent_zeros_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_37: UInt<2>
|
|
match io_zeros.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_37, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_37):
|
|
connect _cast_enum_to_bits_expr_37, pad(cat(_cast_enum_to_bits_expr_HdlSome_37, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_38: UInt<2>
|
|
match io_zeros.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_38, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_38):
|
|
connect _cast_enum_to_bits_expr_38, pad(cat(_cast_enum_to_bits_expr_HdlSome_38, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_3: UInt<1>
|
|
connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_36))
|
|
connect parent_zeros_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_1: Ty4
|
|
wire _cast_bits_to_bundle_expr_flattened: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0)
|
|
wire _cast_bits_to_enum_expr_6: Ty2
|
|
wire _cast_bits_to_enum_expr_body_6: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_6, head(_cast_bits_to_bundle_expr_flattened.`0`, 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.`0`, 1)):
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_6)
|
|
connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_enum_expr_6
|
|
connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened.`1`
|
|
connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_39: UInt<2>
|
|
match io_zeros.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_39, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_39):
|
|
connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_HdlSome_39, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_40: UInt<2>
|
|
match _cast_bits_to_bundle_expr_1.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_40, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_40):
|
|
connect _cast_enum_to_bits_expr_40, pad(cat(_cast_enum_to_bits_expr_HdlSome_40, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_2: UInt<1>
|
|
connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`))
|
|
connect parent_zeros_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_41: UInt<2>
|
|
match io_zeros.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_41, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_41):
|
|
connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_HdlSome_41, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_3: UInt<1>
|
|
connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`))
|
|
connect parent_zeros_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_alternating.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_42: UInt<1>
|
|
match io_alternating.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_42, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_42):
|
|
connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_alternating_out.opt_unit, eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_43: UInt<1>
|
|
match io_alternating.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_43, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_43):
|
|
connect _cast_enum_to_bits_expr_43, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_alternating_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_enum_expr_7: Ty2
|
|
wire _cast_bits_to_enum_expr_body_7: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_7, head(UInt<2>(0h2), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)):
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_7)
|
|
connect io_alternating.opt_bool_flip, _cast_bits_to_enum_expr_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_44: UInt<2>
|
|
match io_alternating.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_44, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_44):
|
|
connect _cast_enum_to_bits_expr_44, pad(cat(_cast_enum_to_bits_expr_HdlSome_44, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_45: UInt<2>
|
|
match _cast_bits_to_enum_expr_7:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_45, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_45):
|
|
connect _cast_enum_to_bits_expr_45, pad(cat(_cast_enum_to_bits_expr_HdlSome_45, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_bool, eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_46: UInt<2>
|
|
match io_alternating.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_46, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_46):
|
|
connect _cast_enum_to_bits_expr_46, pad(cat(_cast_enum_to_bits_expr_HdlSome_46, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_bits_to_enum_expr_8: Ty3
|
|
wire _cast_bits_to_enum_expr_body_8: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_8, head(UInt<2>(0h2), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)):
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_enum_expr_9: Ty1
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_8, 0)):
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_9)
|
|
connect io_alternating.opt_opt_unit_flip, _cast_bits_to_enum_expr_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_47: UInt<2>
|
|
match io_alternating.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_47, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_47):
|
|
wire _cast_enum_to_bits_expr_48: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_47:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_48, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_48):
|
|
connect _cast_enum_to_bits_expr_48, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_48, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_49: UInt<2>
|
|
match _cast_bits_to_enum_expr_8:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_49, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_49):
|
|
wire _cast_enum_to_bits_expr_50: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_49:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_50, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_50):
|
|
connect _cast_enum_to_bits_expr_50, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_49, pad(cat(_cast_enum_to_bits_expr_50, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_51: UInt<2>
|
|
match io_alternating.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_51, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_51):
|
|
wire _cast_enum_to_bits_expr_52: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_51:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_52, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_52):
|
|
connect _cast_enum_to_bits_expr_52, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_51, pad(cat(_cast_enum_to_bits_expr_52, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr_1: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0)
|
|
wire _cast_bits_to_enum_expr_10: Ty2
|
|
wire _cast_bits_to_enum_expr_body_10: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_10, head(_cast_bits_to_array_expr_flattened_1[0], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[0], 1)):
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_10)
|
|
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_enum_expr_10
|
|
connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2)
|
|
wire _cast_bits_to_enum_expr_11: Ty2
|
|
wire _cast_bits_to_enum_expr_body_11: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_11, head(_cast_bits_to_array_expr_flattened_1[1], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[1], 1)):
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_11)
|
|
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_enum_expr_11
|
|
connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_53: UInt<2>
|
|
match io_alternating.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_53, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_53):
|
|
connect _cast_enum_to_bits_expr_53, pad(cat(_cast_enum_to_bits_expr_HdlSome_53, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_54: UInt<2>
|
|
match _cast_bits_to_array_expr_1[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_54, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_54):
|
|
connect _cast_enum_to_bits_expr_54, pad(cat(_cast_enum_to_bits_expr_HdlSome_54, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_55: UInt<2>
|
|
match io_alternating.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_55, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_55):
|
|
connect _cast_enum_to_bits_expr_55, pad(cat(_cast_enum_to_bits_expr_HdlSome_55, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_56: UInt<2>
|
|
match _cast_bits_to_array_expr_1[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_56, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_56):
|
|
connect _cast_enum_to_bits_expr_56, pad(cat(_cast_enum_to_bits_expr_HdlSome_56, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_4: UInt<1>
|
|
connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_56))
|
|
connect parent_alternating_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_57: UInt<2>
|
|
match io_alternating.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_57, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_57):
|
|
connect _cast_enum_to_bits_expr_57, pad(cat(_cast_enum_to_bits_expr_HdlSome_57, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_58: UInt<2>
|
|
match io_alternating.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_58, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_58):
|
|
connect _cast_enum_to_bits_expr_58, pad(cat(_cast_enum_to_bits_expr_HdlSome_58, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_5: UInt<1>
|
|
connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_56))
|
|
connect parent_alternating_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_2: Ty4
|
|
wire _cast_bits_to_bundle_expr_flattened_1: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0)
|
|
wire _cast_bits_to_enum_expr_12: Ty2
|
|
wire _cast_bits_to_enum_expr_body_12: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_12, head(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)):
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_12)
|
|
connect _cast_bits_to_bundle_expr_2.`0`, _cast_bits_to_enum_expr_12
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_2.`1`, _cast_bits_to_bundle_expr_flattened_1.`1`
|
|
connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_2 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_59: UInt<2>
|
|
match io_alternating.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_59, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_59):
|
|
connect _cast_enum_to_bits_expr_59, pad(cat(_cast_enum_to_bits_expr_HdlSome_59, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_60: UInt<2>
|
|
match _cast_bits_to_bundle_expr_2.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_60, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_60):
|
|
connect _cast_enum_to_bits_expr_60, pad(cat(_cast_enum_to_bits_expr_HdlSome_60, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_4: UInt<1>
|
|
connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_2.`1`))
|
|
connect parent_alternating_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_61: UInt<2>
|
|
match io_alternating.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_61, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_61):
|
|
connect _cast_enum_to_bits_expr_61, pad(cat(_cast_enum_to_bits_expr_HdlSome_61, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_5: UInt<1>
|
|
connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_61, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_2.`1`))
|
|
connect parent_alternating_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_62: UInt<1>
|
|
match extern_child.io.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_62, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_62):
|
|
connect _cast_enum_to_bits_expr_62, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_63: UInt<1>
|
|
match extern_child.io.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_63, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_63):
|
|
connect _cast_enum_to_bits_expr_63, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_64: UInt<2>
|
|
match extern_child.io.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_64, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_64):
|
|
connect _cast_enum_to_bits_expr_64, pad(cat(_cast_enum_to_bits_expr_HdlSome_64, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_64, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_65: UInt<2>
|
|
match extern_child.io.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_65, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_65):
|
|
connect _cast_enum_to_bits_expr_65, pad(cat(_cast_enum_to_bits_expr_HdlSome_65, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_65, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_66: UInt<2>
|
|
match extern_child.io.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_66, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_66):
|
|
wire _cast_enum_to_bits_expr_67: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_66:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_67, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_67):
|
|
connect _cast_enum_to_bits_expr_67, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_66, pad(cat(_cast_enum_to_bits_expr_67, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_68: UInt<2>
|
|
match extern_child.io.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_68, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_68):
|
|
wire _cast_enum_to_bits_expr_69: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_68:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_69, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_69):
|
|
connect _cast_enum_to_bits_expr_69, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_68, pad(cat(_cast_enum_to_bits_expr_69, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_68, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_70: UInt<2>
|
|
match extern_child.io.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_70, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_70):
|
|
connect _cast_enum_to_bits_expr_70, pad(cat(_cast_enum_to_bits_expr_HdlSome_70, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_71: UInt<2>
|
|
match extern_child.io.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_71, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_71):
|
|
connect _cast_enum_to_bits_expr_71, pad(cat(_cast_enum_to_bits_expr_HdlSome_71, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_6: UInt<1>
|
|
connect _array_structural_eq_6, and(eq(_cast_enum_to_bits_expr_70, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_71, _cast_enum_to_bits_expr_15))
|
|
connect extern_child_out.array_opt_bool, _array_structural_eq_6 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_72: UInt<2>
|
|
match extern_child.io.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_72, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_72):
|
|
connect _cast_enum_to_bits_expr_72, pad(cat(_cast_enum_to_bits_expr_HdlSome_72, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_73: UInt<2>
|
|
match extern_child.io.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_73, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_73):
|
|
connect _cast_enum_to_bits_expr_73, pad(cat(_cast_enum_to_bits_expr_HdlSome_73, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_7: UInt<1>
|
|
connect _array_structural_eq_7, and(eq(_cast_enum_to_bits_expr_72, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_15))
|
|
connect extern_child_out.array_opt_bool_flip, _array_structural_eq_7 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_74: UInt<2>
|
|
match extern_child.io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_74, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_74):
|
|
connect _cast_enum_to_bits_expr_74, pad(cat(_cast_enum_to_bits_expr_HdlSome_74, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_6: UInt<1>
|
|
connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect extern_child_out.struct_opt_bool, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_75: UInt<2>
|
|
match extern_child.io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_75, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_75):
|
|
connect _cast_enum_to_bits_expr_75, pad(cat(_cast_enum_to_bits_expr_HdlSome_75, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_7: UInt<1>
|
|
connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_75, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_76: UInt<1>
|
|
match child.io.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_76, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_76):
|
|
connect _cast_enum_to_bits_expr_76, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_76, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_77: UInt<1>
|
|
match child.io.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_77, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_77):
|
|
connect _cast_enum_to_bits_expr_77, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_78: UInt<2>
|
|
match child.io.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_78, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_78):
|
|
connect _cast_enum_to_bits_expr_78, pad(cat(_cast_enum_to_bits_expr_HdlSome_78, UInt<1>(1)), 2)
|
|
connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_79: UInt<2>
|
|
match child.io.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_79, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_79):
|
|
connect _cast_enum_to_bits_expr_79, pad(cat(_cast_enum_to_bits_expr_HdlSome_79, UInt<1>(1)), 2)
|
|
connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_80: UInt<2>
|
|
match child.io.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_80, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_80):
|
|
wire _cast_enum_to_bits_expr_81: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_80:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_81, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_81):
|
|
connect _cast_enum_to_bits_expr_81, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_80, pad(cat(_cast_enum_to_bits_expr_81, UInt<1>(1)), 2)
|
|
connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_82: UInt<2>
|
|
match child.io.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_82, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_82):
|
|
wire _cast_enum_to_bits_expr_83: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_82:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_83, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_83):
|
|
connect _cast_enum_to_bits_expr_83, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_82, pad(cat(_cast_enum_to_bits_expr_83, UInt<1>(1)), 2)
|
|
connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_84: UInt<2>
|
|
match child.io.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_84, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_84):
|
|
connect _cast_enum_to_bits_expr_84, pad(cat(_cast_enum_to_bits_expr_HdlSome_84, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_85: UInt<2>
|
|
match child.io.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_85, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_85):
|
|
connect _cast_enum_to_bits_expr_85, pad(cat(_cast_enum_to_bits_expr_HdlSome_85, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_8: UInt<1>
|
|
connect _array_structural_eq_8, and(eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_85, _cast_enum_to_bits_expr_15))
|
|
connect child_out.array_opt_bool, _array_structural_eq_8 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_86: UInt<2>
|
|
match child.io.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_86, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_86):
|
|
connect _cast_enum_to_bits_expr_86, pad(cat(_cast_enum_to_bits_expr_HdlSome_86, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_87: UInt<2>
|
|
match child.io.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_87, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_87):
|
|
connect _cast_enum_to_bits_expr_87, pad(cat(_cast_enum_to_bits_expr_HdlSome_87, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_9: UInt<1>
|
|
connect _array_structural_eq_9, and(eq(_cast_enum_to_bits_expr_86, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_87, _cast_enum_to_bits_expr_15))
|
|
connect child_out.array_opt_bool_flip, _array_structural_eq_9 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_88: UInt<2>
|
|
match child.io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_88, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_88):
|
|
connect _cast_enum_to_bits_expr_88, pad(cat(_cast_enum_to_bits_expr_HdlSome_88, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_8: UInt<1>
|
|
connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_88, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect child_out.struct_opt_bool, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_89: UInt<2>
|
|
match child.io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_89, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_89):
|
|
connect _cast_enum_to_bits_expr_89, pad(cat(_cast_enum_to_bits_expr_HdlSome_89, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_9: UInt<1>
|
|
connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_89, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect child_out.struct_opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 17:1]
|
|
extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1]
|
|
output io: Ty5 @[module-XXXXXXXXXX-2.rs 2:1]
|
|
defname = check_deduce_structural_eq_flags_extern_child
|
|
module check_deduce_structural_eq_flags_child: @[module-XXXXXXXXXX-3.rs 1:1]
|
|
output io: Ty5 @[module-XXXXXXXXXX-3.rs 2:1]
|
|
connect io.opt_unit, io.opt_unit_flip @[module-XXXXXXXXXX-3.rs 4:1]
|
|
connect io.opt_bool, io.opt_bool_flip @[module-XXXXXXXXXX-3.rs 5:1]
|
|
connect io.opt_opt_unit, io.opt_opt_unit_flip @[module-XXXXXXXXXX-3.rs 6:1]
|
|
connect io.array_opt_bool, io.array_opt_bool_flip @[module-XXXXXXXXXX-3.rs 7:1]
|
|
connect io.struct_opt_bool, io.struct_opt_bool_flip @[module-XXXXXXXXXX-3.rs 8:1]
|
|
",
|
|
};
|
|
let m = deduce_structural_eq_flags_with_debug_tracing(m.canonical().intern_sized(), true);
|
|
dbg!(m);
|
|
struct MyVisitor(Vec<(String, bool)>);
|
|
macro_rules! connects {
|
|
{$($key:literal: $value:literal),* $(,)?} => {
|
|
const KNOWN_CONNECTS: &[(&str, bool)] = &[$(($key, $value)),*];
|
|
};
|
|
}
|
|
|
|
connects! {
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.opt_opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.array_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.array_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.struct_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_out.struct_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.array_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.array_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.struct_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_zeros_out.struct_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_bool_flip": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_opt_unit_flip": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.array_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.array_opt_bool_flip": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.struct_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::parent_alternating_out.struct_opt_bool_flip": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_opt_unit": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.opt_opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.array_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.array_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.struct_opt_bool": false,
|
|
"check_deduce_structural_eq_flags_parent::extern_child_out.struct_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_unit": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_bool": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_opt_unit": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.opt_opt_unit_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.array_opt_bool": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.array_opt_bool_flip": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.struct_opt_bool": true,
|
|
"check_deduce_structural_eq_flags_parent::child_out.struct_opt_bool_flip": true,
|
|
}
|
|
|
|
impl Visitor for MyVisitor {
|
|
type Error = Infallible;
|
|
fn visit_stmt_connect(&mut self, v: &StmtConnect) -> Result<(), Self::Error> {
|
|
let ExprEnum::StructuralEq(structural_eq) = *Expr::expr_enum(v.rhs) else {
|
|
return v.default_visit(self);
|
|
};
|
|
let Some(lhs_target) = v.lhs.target() else {
|
|
panic!("connect lhs must have a Target: {v:#?}");
|
|
};
|
|
let lhs_target_str = lhs_target.to_string();
|
|
let assume_padding_is_zeroed = structural_eq.flags().assume_padding_is_zeroed;
|
|
if let Some(key) = KNOWN_CONNECTS
|
|
.iter()
|
|
.copied()
|
|
.find(|&(key, _)| key == lhs_target_str)
|
|
{
|
|
if assume_padding_is_zeroed != key.1 {
|
|
println!("{key:?}: {v:#?}");
|
|
panic!(
|
|
"{key:?}: assume_padding_is_zeroed ({assume_padding_is_zeroed}) is not as expected"
|
|
);
|
|
}
|
|
} else {
|
|
let k = (lhs_target_str, assume_padding_is_zeroed);
|
|
println!("{k:?}: {v:#?}");
|
|
self.0.push(k);
|
|
}
|
|
Ok(())
|
|
}
|
|
}
|
|
let mut visitor = MyVisitor(vec![]);
|
|
let Ok(()) = visitor.visit_module(&m);
|
|
if !visitor.0.is_empty() {
|
|
panic!(
|
|
"unknown connects:\nconnects! {:#?}",
|
|
std::fmt::from_fn(|f| { f.debug_map().entries(visitor.0.iter().cloned()).finish() })
|
|
)
|
|
}
|
|
#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
|
|
assert_export_firrtl! {
|
|
m =>
|
|
options: ExportOptions {
|
|
simplify_enums: None,
|
|
..ExportOptions::default()
|
|
},
|
|
"/test/check_deduce_structural_eq_flags_parent.fir": r"FIRRTL version 3.2.0
|
|
circuit check_deduce_structural_eq_flags_parent:
|
|
type Ty0 = {}
|
|
type Ty1 = {|HdlNone, HdlSome: Ty0|}
|
|
type Ty2 = {|HdlNone, HdlSome: UInt<1>|}
|
|
type Ty3 = {|HdlNone, HdlSome: Ty1|}
|
|
type Ty4 = {`0`: Ty2, `1`: UInt<1>}
|
|
type Ty5 = {flip opt_unit_flip: Ty1, opt_unit: Ty1, flip opt_bool_flip: Ty2, opt_bool: Ty2, flip opt_opt_unit_flip: Ty3, opt_opt_unit: Ty3, flip array_opt_bool_flip: Ty2[2], array_opt_bool: Ty2[2], flip struct_opt_bool_flip: Ty4, struct_opt_bool: Ty4}
|
|
type Ty6 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>}
|
|
type Ty7 = {`0`: UInt<2>, `1`: UInt<1>}
|
|
type Ty8 = {io: Ty5}
|
|
module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1]
|
|
input io: Ty5 @[module-XXXXXXXXXX.rs 2:1]
|
|
input io_zeros: Ty5 @[module-XXXXXXXXXX.rs 3:1]
|
|
input io_alternating: Ty5 @[module-XXXXXXXXXX.rs 4:1]
|
|
output parent_out: Ty6 @[module-XXXXXXXXXX.rs 5:1]
|
|
output parent_zeros_out: Ty6 @[module-XXXXXXXXXX.rs 6:1]
|
|
output parent_alternating_out: Ty6 @[module-XXXXXXXXXX.rs 7:1]
|
|
output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 8:1]
|
|
output child_out: Ty6 @[module-XXXXXXXXXX.rs 9:1]
|
|
inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1]
|
|
inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1]
|
|
wire _bundle_literal_expr: Ty0
|
|
invalidate _bundle_literal_expr
|
|
connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr: UInt<1>
|
|
match io.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome):
|
|
connect _cast_enum_to_bits_expr, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
wire _cast_enum_to_bits_expr_1: UInt<1>
|
|
match {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr):
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_1, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_1):
|
|
connect _cast_enum_to_bits_expr_1, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_2: UInt<1>
|
|
match io.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_2, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_2):
|
|
connect _cast_enum_to_bits_expr_2, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_3: UInt<2>
|
|
match io.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_3, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_3):
|
|
connect _cast_enum_to_bits_expr_3, pad(cat(_cast_enum_to_bits_expr_HdlSome_3, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_4: UInt<2>
|
|
match {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)):
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_4, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_4):
|
|
connect _cast_enum_to_bits_expr_4, pad(cat(_cast_enum_to_bits_expr_HdlSome_4, UInt<1>(1)), 2)
|
|
connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_5: UInt<2>
|
|
match io.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_5, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_5):
|
|
connect _cast_enum_to_bits_expr_5, pad(cat(_cast_enum_to_bits_expr_HdlSome_5, UInt<1>(1)), 2)
|
|
connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_6: UInt<2>
|
|
match io.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_6, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_6):
|
|
wire _cast_enum_to_bits_expr_7: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_6:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_7, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_7):
|
|
connect _cast_enum_to_bits_expr_7, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_6, pad(cat(_cast_enum_to_bits_expr_7, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_8: UInt<2>
|
|
match {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)):
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_8, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_8):
|
|
wire _cast_enum_to_bits_expr_9: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_8:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_9, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_9):
|
|
connect _cast_enum_to_bits_expr_9, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_8, pad(cat(_cast_enum_to_bits_expr_9, UInt<1>(1)), 2)
|
|
connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_10: UInt<2>
|
|
match io.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_10, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_10):
|
|
wire _cast_enum_to_bits_expr_11: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_10:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_11, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_11):
|
|
connect _cast_enum_to_bits_expr_11, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_10, pad(cat(_cast_enum_to_bits_expr_11, UInt<1>(1)), 2)
|
|
connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _array_literal_expr: Ty2[2]
|
|
connect _array_literal_expr[0], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h0))
|
|
connect _array_literal_expr[1], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1))
|
|
connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_12: UInt<2>
|
|
match io.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_12, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_12):
|
|
connect _cast_enum_to_bits_expr_12, pad(cat(_cast_enum_to_bits_expr_HdlSome_12, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_13: UInt<2>
|
|
match _array_literal_expr[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_13, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_13):
|
|
connect _cast_enum_to_bits_expr_13, pad(cat(_cast_enum_to_bits_expr_HdlSome_13, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_14: UInt<2>
|
|
match io.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_14, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_14):
|
|
connect _cast_enum_to_bits_expr_14, pad(cat(_cast_enum_to_bits_expr_HdlSome_14, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_15: UInt<2>
|
|
match _array_literal_expr[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_15, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_15):
|
|
connect _cast_enum_to_bits_expr_15, pad(cat(_cast_enum_to_bits_expr_HdlSome_15, UInt<1>(1)), 2)
|
|
wire _array_structural_eq: UInt<1>
|
|
connect _array_structural_eq, and(eq(_cast_enum_to_bits_expr_12, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_15))
|
|
connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_16: UInt<2>
|
|
match io.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_16, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_16):
|
|
connect _cast_enum_to_bits_expr_16, pad(cat(_cast_enum_to_bits_expr_HdlSome_16, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_17: UInt<2>
|
|
match io.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_17, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_17):
|
|
connect _cast_enum_to_bits_expr_17, pad(cat(_cast_enum_to_bits_expr_HdlSome_17, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_1: UInt<1>
|
|
connect _array_structural_eq_1, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_15))
|
|
connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_literal_expr_1: Ty4
|
|
connect _bundle_literal_expr_1.`0`, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1))
|
|
connect _bundle_literal_expr_1.`1`, UInt<1>(0h1)
|
|
connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_18: UInt<2>
|
|
match io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_18, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_18):
|
|
connect _cast_enum_to_bits_expr_18, pad(cat(_cast_enum_to_bits_expr_HdlSome_18, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_19: UInt<2>
|
|
match _bundle_literal_expr_1.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_19, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_19):
|
|
connect _cast_enum_to_bits_expr_19, pad(cat(_cast_enum_to_bits_expr_HdlSome_19, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq: UInt<1>
|
|
connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_20: UInt<2>
|
|
match io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_20, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_20):
|
|
connect _cast_enum_to_bits_expr_20, pad(cat(_cast_enum_to_bits_expr_HdlSome_20, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_1: UInt<1>
|
|
connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_20, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_bits_to_enum_expr: Ty1
|
|
when eq(UInt<1>(0), tail(UInt<1>(0h0), 0)):
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_bundle_expr: Ty0
|
|
invalidate _cast_bits_to_bundle_expr
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect io_zeros.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_21: UInt<1>
|
|
match io_zeros.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_21, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_21):
|
|
connect _cast_enum_to_bits_expr_21, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
wire _cast_enum_to_bits_expr_22: UInt<1>
|
|
match _cast_bits_to_enum_expr:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_22, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_22):
|
|
connect _cast_enum_to_bits_expr_22, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_zeros_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_23: UInt<1>
|
|
match io_zeros.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_23, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_23):
|
|
connect _cast_enum_to_bits_expr_23, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_zeros_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_enum_expr_1: Ty2
|
|
wire _cast_bits_to_enum_expr_body_1: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_1, head(UInt<2>(0h0), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)):
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_1)
|
|
connect io_zeros.opt_bool_flip, _cast_bits_to_enum_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_24: UInt<2>
|
|
match io_zeros.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_24, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_24):
|
|
connect _cast_enum_to_bits_expr_24, pad(cat(_cast_enum_to_bits_expr_HdlSome_24, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_25: UInt<2>
|
|
match _cast_bits_to_enum_expr_1:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_25, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_25):
|
|
connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_HdlSome_25, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_bool, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_26: UInt<2>
|
|
match io_zeros.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_26, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_26):
|
|
connect _cast_enum_to_bits_expr_26, pad(cat(_cast_enum_to_bits_expr_HdlSome_26, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_bits_to_enum_expr_2: Ty3
|
|
wire _cast_bits_to_enum_expr_body_2: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_2, head(UInt<2>(0h0), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)):
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_enum_expr_3: Ty1
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_2, 0)):
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_3)
|
|
connect io_zeros.opt_opt_unit_flip, _cast_bits_to_enum_expr_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_27: UInt<2>
|
|
match io_zeros.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_27, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_27):
|
|
wire _cast_enum_to_bits_expr_28: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_27:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_28, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_28):
|
|
connect _cast_enum_to_bits_expr_28, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_27, pad(cat(_cast_enum_to_bits_expr_28, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_29: UInt<2>
|
|
match _cast_bits_to_enum_expr_2:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_29, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_29):
|
|
wire _cast_enum_to_bits_expr_30: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_29:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_30, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_30):
|
|
connect _cast_enum_to_bits_expr_30, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_30, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_31: UInt<2>
|
|
match io_zeros.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_31, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_31):
|
|
wire _cast_enum_to_bits_expr_32: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_31:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_32, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_32):
|
|
connect _cast_enum_to_bits_expr_32, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_32, UInt<1>(1)), 2)
|
|
connect parent_zeros_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0)
|
|
wire _cast_bits_to_enum_expr_4: Ty2
|
|
wire _cast_bits_to_enum_expr_body_4: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_4, head(_cast_bits_to_array_expr_flattened[0], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[0], 1)):
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_4)
|
|
connect _cast_bits_to_array_expr[0], _cast_bits_to_enum_expr_4
|
|
connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2)
|
|
wire _cast_bits_to_enum_expr_5: Ty2
|
|
wire _cast_bits_to_enum_expr_body_5: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_5, head(_cast_bits_to_array_expr_flattened[1], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[1], 1)):
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_5)
|
|
connect _cast_bits_to_array_expr[1], _cast_bits_to_enum_expr_5
|
|
connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_33: UInt<2>
|
|
match io_zeros.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_33, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_33):
|
|
connect _cast_enum_to_bits_expr_33, pad(cat(_cast_enum_to_bits_expr_HdlSome_33, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_34: UInt<2>
|
|
match _cast_bits_to_array_expr[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_34, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_34):
|
|
connect _cast_enum_to_bits_expr_34, pad(cat(_cast_enum_to_bits_expr_HdlSome_34, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_35: UInt<2>
|
|
match io_zeros.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_35, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_35):
|
|
connect _cast_enum_to_bits_expr_35, pad(cat(_cast_enum_to_bits_expr_HdlSome_35, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_36: UInt<2>
|
|
match _cast_bits_to_array_expr[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_36, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_36):
|
|
connect _cast_enum_to_bits_expr_36, pad(cat(_cast_enum_to_bits_expr_HdlSome_36, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_2: UInt<1>
|
|
connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_36))
|
|
connect parent_zeros_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_37: UInt<2>
|
|
match io_zeros.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_37, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_37):
|
|
connect _cast_enum_to_bits_expr_37, pad(cat(_cast_enum_to_bits_expr_HdlSome_37, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_38: UInt<2>
|
|
match io_zeros.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_38, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_38):
|
|
connect _cast_enum_to_bits_expr_38, pad(cat(_cast_enum_to_bits_expr_HdlSome_38, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_3: UInt<1>
|
|
connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_36))
|
|
connect parent_zeros_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_1: Ty4
|
|
wire _cast_bits_to_bundle_expr_flattened: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0)
|
|
wire _cast_bits_to_enum_expr_6: Ty2
|
|
wire _cast_bits_to_enum_expr_body_6: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_6, head(_cast_bits_to_bundle_expr_flattened.`0`, 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.`0`, 1)):
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_6)
|
|
connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_enum_expr_6
|
|
connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened.`1`
|
|
connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_39: UInt<2>
|
|
match io_zeros.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_39, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_39):
|
|
connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_HdlSome_39, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_40: UInt<2>
|
|
match _cast_bits_to_bundle_expr_1.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_40, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_40):
|
|
connect _cast_enum_to_bits_expr_40, pad(cat(_cast_enum_to_bits_expr_HdlSome_40, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_2: UInt<1>
|
|
connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`))
|
|
connect parent_zeros_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_41: UInt<2>
|
|
match io_zeros.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_41, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_41):
|
|
connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_HdlSome_41, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_3: UInt<1>
|
|
connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`))
|
|
connect parent_zeros_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_alternating.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_42: UInt<1>
|
|
match io_alternating.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_42, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_42):
|
|
connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_alternating_out.opt_unit, eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_43: UInt<1>
|
|
match io_alternating.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_43, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_43):
|
|
connect _cast_enum_to_bits_expr_43, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect parent_alternating_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_enum_expr_7: Ty2
|
|
wire _cast_bits_to_enum_expr_body_7: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_7, head(UInt<2>(0h2), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)):
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_7)
|
|
connect io_alternating.opt_bool_flip, _cast_bits_to_enum_expr_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_44: UInt<2>
|
|
match io_alternating.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_44, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_44):
|
|
connect _cast_enum_to_bits_expr_44, pad(cat(_cast_enum_to_bits_expr_HdlSome_44, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_45: UInt<2>
|
|
match _cast_bits_to_enum_expr_7:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_45, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_45):
|
|
connect _cast_enum_to_bits_expr_45, pad(cat(_cast_enum_to_bits_expr_HdlSome_45, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_bool, eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_46: UInt<2>
|
|
match io_alternating.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_46, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_46):
|
|
connect _cast_enum_to_bits_expr_46, pad(cat(_cast_enum_to_bits_expr_HdlSome_46, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_bits_to_enum_expr_8: Ty3
|
|
wire _cast_bits_to_enum_expr_body_8: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_8, head(UInt<2>(0h2), 1)
|
|
when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)):
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlNone)
|
|
else:
|
|
wire _cast_bits_to_enum_expr_9: Ty1
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_8, 0)):
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr)
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_9)
|
|
connect io_alternating.opt_opt_unit_flip, _cast_bits_to_enum_expr_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_47: UInt<2>
|
|
match io_alternating.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_47, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_47):
|
|
wire _cast_enum_to_bits_expr_48: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_47:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_48, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_48):
|
|
connect _cast_enum_to_bits_expr_48, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_48, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_49: UInt<2>
|
|
match _cast_bits_to_enum_expr_8:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_49, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_49):
|
|
wire _cast_enum_to_bits_expr_50: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_49:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_50, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_50):
|
|
connect _cast_enum_to_bits_expr_50, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_49, pad(cat(_cast_enum_to_bits_expr_50, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_51: UInt<2>
|
|
match io_alternating.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_51, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_51):
|
|
wire _cast_enum_to_bits_expr_52: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_51:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_52, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_52):
|
|
connect _cast_enum_to_bits_expr_52, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_51, pad(cat(_cast_enum_to_bits_expr_52, UInt<1>(1)), 2)
|
|
connect parent_alternating_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr_1: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0)
|
|
wire _cast_bits_to_enum_expr_10: Ty2
|
|
wire _cast_bits_to_enum_expr_body_10: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_10, head(_cast_bits_to_array_expr_flattened_1[0], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[0], 1)):
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_10)
|
|
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_enum_expr_10
|
|
connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2)
|
|
wire _cast_bits_to_enum_expr_11: Ty2
|
|
wire _cast_bits_to_enum_expr_body_11: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_11, head(_cast_bits_to_array_expr_flattened_1[1], 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[1], 1)):
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_11)
|
|
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_enum_expr_11
|
|
connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_53: UInt<2>
|
|
match io_alternating.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_53, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_53):
|
|
connect _cast_enum_to_bits_expr_53, pad(cat(_cast_enum_to_bits_expr_HdlSome_53, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_54: UInt<2>
|
|
match _cast_bits_to_array_expr_1[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_54, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_54):
|
|
connect _cast_enum_to_bits_expr_54, pad(cat(_cast_enum_to_bits_expr_HdlSome_54, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_55: UInt<2>
|
|
match io_alternating.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_55, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_55):
|
|
connect _cast_enum_to_bits_expr_55, pad(cat(_cast_enum_to_bits_expr_HdlSome_55, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_56: UInt<2>
|
|
match _cast_bits_to_array_expr_1[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_56, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_56):
|
|
connect _cast_enum_to_bits_expr_56, pad(cat(_cast_enum_to_bits_expr_HdlSome_56, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_4: UInt<1>
|
|
connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_56))
|
|
connect parent_alternating_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_57: UInt<2>
|
|
match io_alternating.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_57, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_57):
|
|
connect _cast_enum_to_bits_expr_57, pad(cat(_cast_enum_to_bits_expr_HdlSome_57, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_58: UInt<2>
|
|
match io_alternating.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_58, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_58):
|
|
connect _cast_enum_to_bits_expr_58, pad(cat(_cast_enum_to_bits_expr_HdlSome_58, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_5: UInt<1>
|
|
connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_56))
|
|
connect parent_alternating_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_2: Ty4
|
|
wire _cast_bits_to_bundle_expr_flattened_1: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0)
|
|
wire _cast_bits_to_enum_expr_12: Ty2
|
|
wire _cast_bits_to_enum_expr_body_12: UInt<1>
|
|
connect _cast_bits_to_enum_expr_body_12, head(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)):
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_12)
|
|
connect _cast_bits_to_bundle_expr_2.`0`, _cast_bits_to_enum_expr_12
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_2.`1`, _cast_bits_to_bundle_expr_flattened_1.`1`
|
|
connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_2 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_59: UInt<2>
|
|
match io_alternating.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_59, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_59):
|
|
connect _cast_enum_to_bits_expr_59, pad(cat(_cast_enum_to_bits_expr_HdlSome_59, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_60: UInt<2>
|
|
match _cast_bits_to_bundle_expr_2.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_60, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_60):
|
|
connect _cast_enum_to_bits_expr_60, pad(cat(_cast_enum_to_bits_expr_HdlSome_60, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_4: UInt<1>
|
|
connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_2.`1`))
|
|
connect parent_alternating_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_61: UInt<2>
|
|
match io_alternating.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_61, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_61):
|
|
connect _cast_enum_to_bits_expr_61, pad(cat(_cast_enum_to_bits_expr_HdlSome_61, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_5: UInt<1>
|
|
connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_61, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_2.`1`))
|
|
connect parent_alternating_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_62: UInt<1>
|
|
match extern_child.io.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_62, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_62):
|
|
connect _cast_enum_to_bits_expr_62, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_63: UInt<1>
|
|
match extern_child.io.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_63, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_63):
|
|
connect _cast_enum_to_bits_expr_63, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_64: UInt<2>
|
|
match extern_child.io.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_64, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_64):
|
|
connect _cast_enum_to_bits_expr_64, pad(cat(_cast_enum_to_bits_expr_HdlSome_64, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_64, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_65: UInt<2>
|
|
match extern_child.io.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_65, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_65):
|
|
connect _cast_enum_to_bits_expr_65, pad(cat(_cast_enum_to_bits_expr_HdlSome_65, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_65, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_66: UInt<2>
|
|
match extern_child.io.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_66, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_66):
|
|
wire _cast_enum_to_bits_expr_67: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_66:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_67, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_67):
|
|
connect _cast_enum_to_bits_expr_67, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_66, pad(cat(_cast_enum_to_bits_expr_67, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_68: UInt<2>
|
|
match extern_child.io.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_68, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_68):
|
|
wire _cast_enum_to_bits_expr_69: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_68:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_69, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_69):
|
|
connect _cast_enum_to_bits_expr_69, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_68, pad(cat(_cast_enum_to_bits_expr_69, UInt<1>(1)), 2)
|
|
connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_68, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_70: UInt<2>
|
|
match extern_child.io.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_70, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_70):
|
|
connect _cast_enum_to_bits_expr_70, pad(cat(_cast_enum_to_bits_expr_HdlSome_70, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_71: UInt<2>
|
|
match extern_child.io.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_71, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_71):
|
|
connect _cast_enum_to_bits_expr_71, pad(cat(_cast_enum_to_bits_expr_HdlSome_71, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_6: UInt<1>
|
|
connect _array_structural_eq_6, and(eq(_cast_enum_to_bits_expr_70, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_71, _cast_enum_to_bits_expr_15))
|
|
connect extern_child_out.array_opt_bool, _array_structural_eq_6 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_72: UInt<2>
|
|
match extern_child.io.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_72, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_72):
|
|
connect _cast_enum_to_bits_expr_72, pad(cat(_cast_enum_to_bits_expr_HdlSome_72, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_73: UInt<2>
|
|
match extern_child.io.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_73, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_73):
|
|
connect _cast_enum_to_bits_expr_73, pad(cat(_cast_enum_to_bits_expr_HdlSome_73, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_7: UInt<1>
|
|
connect _array_structural_eq_7, and(eq(_cast_enum_to_bits_expr_72, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_15))
|
|
connect extern_child_out.array_opt_bool_flip, _array_structural_eq_7 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_74: UInt<2>
|
|
match extern_child.io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_74, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_74):
|
|
connect _cast_enum_to_bits_expr_74, pad(cat(_cast_enum_to_bits_expr_HdlSome_74, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_6: UInt<1>
|
|
connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect extern_child_out.struct_opt_bool, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_75: UInt<2>
|
|
match extern_child.io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_75, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_75):
|
|
connect _cast_enum_to_bits_expr_75, pad(cat(_cast_enum_to_bits_expr_HdlSome_75, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_7: UInt<1>
|
|
connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_75, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_76: UInt<1>
|
|
match child.io.opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_76, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_76):
|
|
connect _cast_enum_to_bits_expr_76, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_76, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_77: UInt<1>
|
|
match child.io.opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_77, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_77):
|
|
connect _cast_enum_to_bits_expr_77, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_78: UInt<2>
|
|
match child.io.opt_bool:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_78, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_78):
|
|
connect _cast_enum_to_bits_expr_78, pad(cat(_cast_enum_to_bits_expr_HdlSome_78, UInt<1>(1)), 2)
|
|
connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_79: UInt<2>
|
|
match child.io.opt_bool_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_79, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_79):
|
|
connect _cast_enum_to_bits_expr_79, pad(cat(_cast_enum_to_bits_expr_HdlSome_79, UInt<1>(1)), 2)
|
|
connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_80: UInt<2>
|
|
match child.io.opt_opt_unit:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_80, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_80):
|
|
wire _cast_enum_to_bits_expr_81: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_80:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_81, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_81):
|
|
connect _cast_enum_to_bits_expr_81, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_80, pad(cat(_cast_enum_to_bits_expr_81, UInt<1>(1)), 2)
|
|
connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_82: UInt<2>
|
|
match child.io.opt_opt_unit_flip:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_82, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_82):
|
|
wire _cast_enum_to_bits_expr_83: UInt<1>
|
|
match _cast_enum_to_bits_expr_HdlSome_82:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_83, UInt<1>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_83):
|
|
connect _cast_enum_to_bits_expr_83, pad(cat(UInt<0>(0), UInt<1>(1)), 1)
|
|
connect _cast_enum_to_bits_expr_82, pad(cat(_cast_enum_to_bits_expr_83, UInt<1>(1)), 2)
|
|
connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_84: UInt<2>
|
|
match child.io.array_opt_bool[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_84, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_84):
|
|
connect _cast_enum_to_bits_expr_84, pad(cat(_cast_enum_to_bits_expr_HdlSome_84, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_85: UInt<2>
|
|
match child.io.array_opt_bool[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_85, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_85):
|
|
connect _cast_enum_to_bits_expr_85, pad(cat(_cast_enum_to_bits_expr_HdlSome_85, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_8: UInt<1>
|
|
connect _array_structural_eq_8, and(eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_85, _cast_enum_to_bits_expr_15))
|
|
connect child_out.array_opt_bool, _array_structural_eq_8 @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_86: UInt<2>
|
|
match child.io.array_opt_bool_flip[0]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_86, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_86):
|
|
connect _cast_enum_to_bits_expr_86, pad(cat(_cast_enum_to_bits_expr_HdlSome_86, UInt<1>(1)), 2)
|
|
wire _cast_enum_to_bits_expr_87: UInt<2>
|
|
match child.io.array_opt_bool_flip[1]:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_87, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_87):
|
|
connect _cast_enum_to_bits_expr_87, pad(cat(_cast_enum_to_bits_expr_HdlSome_87, UInt<1>(1)), 2)
|
|
wire _array_structural_eq_9: UInt<1>
|
|
connect _array_structural_eq_9, and(eq(_cast_enum_to_bits_expr_86, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_87, _cast_enum_to_bits_expr_15))
|
|
connect child_out.array_opt_bool_flip, _array_structural_eq_9 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_88: UInt<2>
|
|
match child.io.struct_opt_bool.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_88, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_88):
|
|
connect _cast_enum_to_bits_expr_88, pad(cat(_cast_enum_to_bits_expr_HdlSome_88, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_8: UInt<1>
|
|
connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_88, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`))
|
|
connect child_out.struct_opt_bool, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_89: UInt<2>
|
|
match child.io.struct_opt_bool_flip.`0`:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_89, UInt<2>(0)
|
|
HdlSome(_cast_enum_to_bits_expr_HdlSome_89):
|
|
connect _cast_enum_to_bits_expr_89, pad(cat(_cast_enum_to_bits_expr_HdlSome_89, UInt<1>(1)), 2)
|
|
wire _bundle_structural_eq_9: UInt<1>
|
|
connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_89, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`))
|
|
connect child_out.struct_opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 17:1]
|
|
extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1]
|
|
output io: Ty5 @[module-XXXXXXXXXX-2.rs 2:1]
|
|
defname = check_deduce_structural_eq_flags_extern_child
|
|
module check_deduce_structural_eq_flags_child: @[module-XXXXXXXXXX-3.rs 1:1]
|
|
output io: Ty5 @[module-XXXXXXXXXX-3.rs 2:1]
|
|
connect io.opt_unit, io.opt_unit_flip @[module-XXXXXXXXXX-3.rs 4:1]
|
|
connect io.opt_bool, io.opt_bool_flip @[module-XXXXXXXXXX-3.rs 5:1]
|
|
connect io.opt_opt_unit, io.opt_opt_unit_flip @[module-XXXXXXXXXX-3.rs 6:1]
|
|
connect io.array_opt_bool, io.array_opt_bool_flip @[module-XXXXXXXXXX-3.rs 7:1]
|
|
connect io.struct_opt_bool, io.struct_opt_bool_flip @[module-XXXXXXXXXX-3.rs 8:1]
|
|
",
|
|
};
|
|
let m_no_body = simplify_enums(m, SimplifyEnumsKind::SimplifyToEnumsWithNoBody).unwrap();
|
|
dbg!(m_no_body);
|
|
#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
|
|
assert_export_firrtl! {
|
|
m_no_body =>
|
|
options: ExportOptions {
|
|
simplify_enums: None,
|
|
..ExportOptions::default()
|
|
},
|
|
"/test/check_deduce_structural_eq_flags_parent.fir": r"FIRRTL version 3.2.0
|
|
circuit check_deduce_structural_eq_flags_parent:
|
|
type Ty0 = {|HdlNone, HdlSome|}
|
|
type Ty1 = {tag: Ty0, body: UInt<0>}
|
|
type Ty2 = {tag: Ty0, body: UInt<1>}
|
|
type Ty3 = {`0`: Ty2, `1`: UInt<1>}
|
|
type Ty4 = {flip opt_unit_flip: Ty1, opt_unit: Ty1, flip opt_bool_flip: Ty2, opt_bool: Ty2, flip opt_opt_unit_flip: Ty2, opt_opt_unit: Ty2, flip array_opt_bool_flip: Ty2[2], array_opt_bool: Ty2[2], flip struct_opt_bool_flip: Ty3, struct_opt_bool: Ty3}
|
|
type Ty5 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>}
|
|
type Ty6 = {}
|
|
type Ty7 = {tag: UInt<1>, body: UInt<0>}
|
|
type Ty8 = {tag: UInt<1>, body: UInt<1>}
|
|
type Ty9 = {`0`: UInt<2>, `1`: UInt<1>}
|
|
type Ty10 = {io: Ty4}
|
|
module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1]
|
|
input io: Ty4 @[module-XXXXXXXXXX.rs 2:1]
|
|
input io_zeros: Ty4 @[module-XXXXXXXXXX.rs 3:1]
|
|
input io_alternating: Ty4 @[module-XXXXXXXXXX.rs 4:1]
|
|
output parent_out: Ty5 @[module-XXXXXXXXXX.rs 5:1]
|
|
output parent_zeros_out: Ty5 @[module-XXXXXXXXXX.rs 6:1]
|
|
output parent_alternating_out: Ty5 @[module-XXXXXXXXXX.rs 7:1]
|
|
output extern_child_out: Ty5 @[module-XXXXXXXXXX.rs 8:1]
|
|
output child_out: Ty5 @[module-XXXXXXXXXX.rs 9:1]
|
|
wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_3: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_4: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_5: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_6: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1]
|
|
inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1]
|
|
wire _bundle_literal_expr: Ty1
|
|
connect _bundle_literal_expr.tag, {|HdlNone, HdlSome|}(HdlSome)
|
|
wire _bundle_literal_expr_1: Ty6
|
|
invalidate _bundle_literal_expr_1
|
|
connect _bundle_literal_expr.body, UInt<0>(0)
|
|
connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_out.opt_unit, __enum_structural_eq @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr: UInt<1>
|
|
match io.opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_1: UInt<1>
|
|
match _bundle_literal_expr.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_1, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_1, UInt<1>(1)
|
|
wire _bundle_structural_eq: UInt<1>
|
|
connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1), eq(io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect parent_out.opt_unit_flip, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_literal_expr_2: Ty2
|
|
connect _bundle_literal_expr_2.tag, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _bundle_literal_expr_2.body, UInt<1>(0h1)
|
|
connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_out.opt_bool, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_2: UInt<1>
|
|
match io.opt_bool_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_2, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_2, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_3: UInt<1>
|
|
match _bundle_literal_expr_2.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_3, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_3, UInt<1>(1)
|
|
wire _bundle_structural_eq_1: UInt<1>
|
|
connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_3), eq(io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect parent_out.opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_literal_expr_3: Ty2
|
|
connect _bundle_literal_expr_3.tag, {|HdlNone, HdlSome|}(HdlSome)
|
|
wire _cast_bundle_to_bits_expr: Ty7
|
|
connect _cast_bundle_to_bits_expr.tag, _cast_enum_to_bits_expr_1
|
|
connect _cast_bundle_to_bits_expr.body, _bundle_literal_expr.body
|
|
wire _cast_to_bits_expr: UInt<1>
|
|
connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag)
|
|
connect _bundle_literal_expr_3.body, _cast_to_bits_expr
|
|
connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_out.opt_opt_unit, __enum_structural_eq_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_4: UInt<1>
|
|
match io.opt_opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_4, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_4, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_5: UInt<1>
|
|
match _bundle_literal_expr_3.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_5, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_5, UInt<1>(1)
|
|
wire _bundle_structural_eq_2: UInt<1>
|
|
connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_4, _cast_enum_to_bits_expr_5), eq(io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _array_literal_expr: Ty2[2]
|
|
wire _bundle_literal_expr_4: Ty2
|
|
connect _bundle_literal_expr_4.tag, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _bundle_literal_expr_4.body, UInt<1>(0h0)
|
|
connect _array_literal_expr[0], _bundle_literal_expr_4
|
|
connect _array_literal_expr[1], _bundle_literal_expr_2
|
|
connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_out.array_opt_bool, and(__enum_structural_eq_3, __enum_structural_eq_4) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_6: UInt<1>
|
|
match io.array_opt_bool_flip[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_6, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_6, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_7: UInt<1>
|
|
match _array_literal_expr[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_7, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_7, UInt<1>(1)
|
|
wire _bundle_structural_eq_3: UInt<1>
|
|
connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_7), eq(io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _cast_enum_to_bits_expr_8: UInt<1>
|
|
match io.array_opt_bool_flip[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_8, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_8, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_9: UInt<1>
|
|
match _array_literal_expr[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_9, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_9, UInt<1>(1)
|
|
wire _bundle_structural_eq_4: UInt<1>
|
|
connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_8, _cast_enum_to_bits_expr_9), eq(io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_3, _bundle_structural_eq_4) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_literal_expr_5: Ty3
|
|
connect _bundle_literal_expr_5.`0`, _bundle_literal_expr_2
|
|
connect _bundle_literal_expr_5.`1`, UInt<1>(0h1)
|
|
connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_out.struct_opt_bool, and(__enum_structural_eq_5, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_10: UInt<1>
|
|
match io.struct_opt_bool_flip.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_10, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_10, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_11: UInt<1>
|
|
match _bundle_literal_expr_5.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_11, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_11, UInt<1>(1)
|
|
wire _bundle_structural_eq_5: UInt<1>
|
|
connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_11), eq(io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_5, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_bits_to_bundle_expr: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened.tag, bits(UInt<1>(0h0), 0, 0)
|
|
wire _cast_bits_to_enum_expr: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.tag, 0)):
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_enum_expr
|
|
connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body
|
|
connect io_zeros.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_zeros_out.opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_12: UInt<1>
|
|
match io_zeros.opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_12, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_12, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_13: UInt<1>
|
|
match _cast_bits_to_bundle_expr.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_13, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_13, UInt<1>(1)
|
|
wire _bundle_structural_eq_6: UInt<1>
|
|
connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_12, _cast_enum_to_bits_expr_13), eq(io_zeros.opt_unit_flip.body, _cast_bits_to_bundle_expr.body))
|
|
connect parent_zeros_out.opt_unit_flip, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_bundle_expr_1: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_1: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(UInt<2>(0h0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_1: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_enum_expr_1
|
|
connect _cast_bits_to_bundle_expr_flattened_1.body, bits(UInt<2>(0h0), 1, 1)
|
|
connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body
|
|
connect io_zeros.opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_zeros_out.opt_bool, __enum_structural_eq_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_14: UInt<1>
|
|
match io_zeros.opt_bool_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_14, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_14, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_15: UInt<1>
|
|
match _cast_bits_to_bundle_expr_1.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_15, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_15, UInt<1>(1)
|
|
wire _bundle_structural_eq_7: UInt<1>
|
|
connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_15), eq(io_zeros.opt_bool_flip.body, _cast_bits_to_bundle_expr_1.body))
|
|
connect parent_zeros_out.opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_zeros.opt_opt_unit_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_16: UInt<1>
|
|
match io_zeros.opt_opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_16, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_16, UInt<1>(1)
|
|
wire _bundle_structural_eq_8: UInt<1>
|
|
connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_15), eq(io_zeros.opt_opt_unit_flip.body, _cast_bits_to_bundle_expr_1.body))
|
|
connect parent_zeros_out.opt_opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_2: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_2: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(_cast_bits_to_array_expr_flattened[0], 0, 0)
|
|
wire _cast_bits_to_enum_expr_2: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_2.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_2.tag, _cast_bits_to_enum_expr_2
|
|
connect _cast_bits_to_bundle_expr_flattened_2.body, bits(_cast_bits_to_array_expr_flattened[0], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_2.body, _cast_bits_to_bundle_expr_flattened_2.body
|
|
connect _cast_bits_to_array_expr[0], _cast_bits_to_bundle_expr_2
|
|
connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2)
|
|
wire _cast_bits_to_bundle_expr_3: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_3: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(_cast_bits_to_array_expr_flattened[1], 0, 0)
|
|
wire _cast_bits_to_enum_expr_3: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_3.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_3.tag, _cast_bits_to_enum_expr_3
|
|
connect _cast_bits_to_bundle_expr_flattened_3.body, bits(_cast_bits_to_array_expr_flattened[1], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_3.body, _cast_bits_to_bundle_expr_flattened_3.body
|
|
connect _cast_bits_to_array_expr[1], _cast_bits_to_bundle_expr_3
|
|
connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_9, __enum_structural_eq_10) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_17: UInt<1>
|
|
match io_zeros.array_opt_bool_flip[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_17, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_17, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_18: UInt<1>
|
|
match _cast_bits_to_array_expr[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_18, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_18, UInt<1>(1)
|
|
wire _bundle_structural_eq_9: UInt<1>
|
|
connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_18), eq(io_zeros.array_opt_bool_flip[0].body, _cast_bits_to_array_expr[0].body))
|
|
wire _cast_enum_to_bits_expr_19: UInt<1>
|
|
match io_zeros.array_opt_bool_flip[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_19, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_19, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_20: UInt<1>
|
|
match _cast_bits_to_array_expr[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_20, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_20, UInt<1>(1)
|
|
wire _bundle_structural_eq_10: UInt<1>
|
|
connect _bundle_structural_eq_10, and(eq(_cast_enum_to_bits_expr_19, _cast_enum_to_bits_expr_20), eq(io_zeros.array_opt_bool_flip[1].body, _cast_bits_to_array_expr[1].body))
|
|
connect parent_zeros_out.array_opt_bool_flip, and(_bundle_structural_eq_9, _bundle_structural_eq_10) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_4: Ty3
|
|
wire _cast_bits_to_bundle_expr_flattened_4: Ty9
|
|
connect _cast_bits_to_bundle_expr_flattened_4.`0`, bits(UInt<3>(0h0), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_5: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_5: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_5.tag, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 0, 0)
|
|
wire _cast_bits_to_enum_expr_4: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_5.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_enum_expr_4
|
|
connect _cast_bits_to_bundle_expr_flattened_5.body, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 1, 1)
|
|
connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_5.body
|
|
connect _cast_bits_to_bundle_expr_4.`0`, _cast_bits_to_bundle_expr_5
|
|
connect _cast_bits_to_bundle_expr_flattened_4.`1`, bits(UInt<3>(0h0), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_4.`1`, _cast_bits_to_bundle_expr_flattened_4.`1`
|
|
connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_4 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_11, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_21: UInt<1>
|
|
match io_zeros.struct_opt_bool_flip.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_21, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_21, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_22: UInt<1>
|
|
match _cast_bits_to_bundle_expr_4.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_22, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_22, UInt<1>(1)
|
|
wire _bundle_structural_eq_11: UInt<1>
|
|
connect _bundle_structural_eq_11, and(eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22), eq(io_zeros.struct_opt_bool_flip.`0`.body, _cast_bits_to_bundle_expr_4.`0`.body))
|
|
connect parent_zeros_out.struct_opt_bool_flip, and(_bundle_structural_eq_11, eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_alternating.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_alternating_out.opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_23: UInt<1>
|
|
match io_alternating.opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_23, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_23, UInt<1>(1)
|
|
wire _bundle_structural_eq_12: UInt<1>
|
|
connect _bundle_structural_eq_12, and(eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_13), eq(io_alternating.opt_unit_flip.body, _cast_bits_to_bundle_expr.body))
|
|
connect parent_alternating_out.opt_unit_flip, _bundle_structural_eq_12 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_bundle_expr_6: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_6: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_6.tag, bits(UInt<2>(0h2), 0, 0)
|
|
wire _cast_bits_to_enum_expr_5: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_6.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_6.tag, _cast_bits_to_enum_expr_5
|
|
connect _cast_bits_to_bundle_expr_flattened_6.body, bits(UInt<2>(0h2), 1, 1)
|
|
connect _cast_bits_to_bundle_expr_6.body, _cast_bits_to_bundle_expr_flattened_6.body
|
|
connect io_alternating.opt_bool_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_14 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_alternating.opt_opt_unit_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_15 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_16 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr_1: Ty2[2]
|
|
wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_7: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_7: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_7.tag, bits(_cast_bits_to_array_expr_flattened_1[0], 0, 0)
|
|
wire _cast_bits_to_enum_expr_6: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_7.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_7.tag, _cast_bits_to_enum_expr_6
|
|
connect _cast_bits_to_bundle_expr_flattened_7.body, bits(_cast_bits_to_array_expr_flattened_1[0], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_7.body, _cast_bits_to_bundle_expr_flattened_7.body
|
|
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_bundle_expr_7
|
|
connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2)
|
|
wire _cast_bits_to_bundle_expr_8: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_8: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_8.tag, bits(_cast_bits_to_array_expr_flattened_1[1], 0, 0)
|
|
wire _cast_bits_to_enum_expr_7: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_8.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_8.tag, _cast_bits_to_enum_expr_7
|
|
connect _cast_bits_to_bundle_expr_flattened_8.body, bits(_cast_bits_to_array_expr_flattened_1[1], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_8.body, _cast_bits_to_bundle_expr_flattened_8.body
|
|
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_bundle_expr_8
|
|
connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_17, __enum_structural_eq_18) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_19, __enum_structural_eq_20) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_9: Ty3
|
|
wire _cast_bits_to_bundle_expr_flattened_9: Ty9
|
|
connect _cast_bits_to_bundle_expr_flattened_9.`0`, bits(UInt<3>(0h2), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_10: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_10: Ty8
|
|
connect _cast_bits_to_bundle_expr_flattened_10.tag, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 0, 0)
|
|
wire _cast_bits_to_enum_expr_8: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_10.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_10.tag, _cast_bits_to_enum_expr_8
|
|
connect _cast_bits_to_bundle_expr_flattened_10.body, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 1, 1)
|
|
connect _cast_bits_to_bundle_expr_10.body, _cast_bits_to_bundle_expr_flattened_10.body
|
|
connect _cast_bits_to_bundle_expr_9.`0`, _cast_bits_to_bundle_expr_10
|
|
connect _cast_bits_to_bundle_expr_flattened_9.`1`, bits(UInt<3>(0h2), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_9.`1`, _cast_bits_to_bundle_expr_flattened_9.`1`
|
|
connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_9 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_21, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_22, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child_out.opt_unit, __enum_structural_eq_23 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_24: UInt<1>
|
|
match extern_child.io.opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_24, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_24, UInt<1>(1)
|
|
wire _bundle_structural_eq_13: UInt<1>
|
|
connect _bundle_structural_eq_13, and(eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_1), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect extern_child_out.opt_unit_flip, _bundle_structural_eq_13 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child_out.opt_bool, __enum_structural_eq_24 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_25: UInt<1>
|
|
match extern_child.io.opt_bool_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_25, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_25, UInt<1>(1)
|
|
wire _bundle_structural_eq_14: UInt<1>
|
|
connect _bundle_structural_eq_14, and(eq(_cast_enum_to_bits_expr_25, _cast_enum_to_bits_expr_3), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect extern_child_out.opt_bool_flip, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child_out.opt_opt_unit, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_26: UInt<1>
|
|
match extern_child.io.opt_opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_26, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_26, UInt<1>(1)
|
|
wire _bundle_structural_eq_15: UInt<1>
|
|
connect _bundle_structural_eq_15, and(eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_5), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child_out.array_opt_bool, and(__enum_structural_eq_26, __enum_structural_eq_27) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_27: UInt<1>
|
|
match extern_child.io.array_opt_bool_flip[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_27, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_27, UInt<1>(1)
|
|
wire _bundle_structural_eq_16: UInt<1>
|
|
connect _bundle_structural_eq_16, and(eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_7), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _cast_enum_to_bits_expr_28: UInt<1>
|
|
match extern_child.io.array_opt_bool_flip[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_28, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_28, UInt<1>(1)
|
|
wire _bundle_structural_eq_17: UInt<1>
|
|
connect _bundle_structural_eq_17, and(eq(_cast_enum_to_bits_expr_28, _cast_enum_to_bits_expr_9), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_16, _bundle_structural_eq_17) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_28, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_29: UInt<1>
|
|
match extern_child.io.struct_opt_bool_flip.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_29, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_29, UInt<1>(1)
|
|
wire _bundle_structural_eq_18: UInt<1>
|
|
connect _bundle_structural_eq_18, and(eq(_cast_enum_to_bits_expr_29, _cast_enum_to_bits_expr_11), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_18, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_30: UInt<1>
|
|
match child.io.opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_30, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_30, UInt<1>(1)
|
|
wire _bundle_structural_eq_19: UInt<1>
|
|
connect _bundle_structural_eq_19, and(eq(_cast_enum_to_bits_expr_30, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit.body, _bundle_literal_expr.body))
|
|
connect child_out.opt_unit, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_enum_to_bits_expr_31: UInt<1>
|
|
match child.io.opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_31, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_31, UInt<1>(1)
|
|
wire _bundle_structural_eq_20: UInt<1>
|
|
connect _bundle_structural_eq_20, and(eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect child_out.opt_unit_flip, _bundle_structural_eq_20 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_32: UInt<1>
|
|
match child.io.opt_bool.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_32, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_32, UInt<1>(1)
|
|
wire _bundle_structural_eq_21: UInt<1>
|
|
connect _bundle_structural_eq_21, and(eq(_cast_enum_to_bits_expr_32, _cast_enum_to_bits_expr_3), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body))
|
|
connect child_out.opt_bool, _bundle_structural_eq_21 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _cast_enum_to_bits_expr_33: UInt<1>
|
|
match child.io.opt_bool_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_33, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_33, UInt<1>(1)
|
|
wire _bundle_structural_eq_22: UInt<1>
|
|
connect _bundle_structural_eq_22, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_3), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect child_out.opt_bool_flip, _bundle_structural_eq_22 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_34: UInt<1>
|
|
match child.io.opt_opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_34, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_34, UInt<1>(1)
|
|
wire _bundle_structural_eq_23: UInt<1>
|
|
connect _bundle_structural_eq_23, and(eq(_cast_enum_to_bits_expr_34, _cast_enum_to_bits_expr_5), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body))
|
|
connect child_out.opt_opt_unit, _bundle_structural_eq_23 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_enum_to_bits_expr_35: UInt<1>
|
|
match child.io.opt_opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_35, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_35, UInt<1>(1)
|
|
wire _bundle_structural_eq_24: UInt<1>
|
|
connect _bundle_structural_eq_24, and(eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_5), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect child_out.opt_opt_unit_flip, _bundle_structural_eq_24 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_36: UInt<1>
|
|
match child.io.array_opt_bool[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_36, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_36, UInt<1>(1)
|
|
wire _bundle_structural_eq_25: UInt<1>
|
|
connect _bundle_structural_eq_25, and(eq(_cast_enum_to_bits_expr_36, _cast_enum_to_bits_expr_7), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body))
|
|
wire _cast_enum_to_bits_expr_37: UInt<1>
|
|
match child.io.array_opt_bool[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_37, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_37, UInt<1>(1)
|
|
wire _bundle_structural_eq_26: UInt<1>
|
|
connect _bundle_structural_eq_26, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_9), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body))
|
|
connect child_out.array_opt_bool, and(_bundle_structural_eq_25, _bundle_structural_eq_26) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_enum_to_bits_expr_38: UInt<1>
|
|
match child.io.array_opt_bool_flip[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_38, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_38, UInt<1>(1)
|
|
wire _bundle_structural_eq_27: UInt<1>
|
|
connect _bundle_structural_eq_27, and(eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_7), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _cast_enum_to_bits_expr_39: UInt<1>
|
|
match child.io.array_opt_bool_flip[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_39, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_39, UInt<1>(1)
|
|
wire _bundle_structural_eq_28: UInt<1>
|
|
connect _bundle_structural_eq_28, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_9), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_27, _bundle_structural_eq_28) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_40: UInt<1>
|
|
match child.io.struct_opt_bool.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_40, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_40, UInt<1>(1)
|
|
wire _bundle_structural_eq_29: UInt<1>
|
|
connect _bundle_structural_eq_29, and(eq(_cast_enum_to_bits_expr_40, _cast_enum_to_bits_expr_11), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect child_out.struct_opt_bool, and(_bundle_structural_eq_29, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_enum_to_bits_expr_41: UInt<1>
|
|
match child.io.struct_opt_bool_flip.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_41, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_41, UInt<1>(1)
|
|
wire _bundle_structural_eq_30: UInt<1>
|
|
connect _bundle_structural_eq_30, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_11), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_30, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_42: UInt<1>
|
|
match io.opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_42, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_42, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_1): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_11: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_11
|
|
wire _cast_bits_to_bundle_expr_12: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_12
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_1, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_43: UInt<1>
|
|
match io.opt_bool.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_43, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_43, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_3): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_1, eq(bits(io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_44: UInt<1>
|
|
match io.opt_opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_44, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_44, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_5): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_2, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_13: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_11: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_11.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_9: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_11.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_13.tag, _cast_bits_to_enum_expr_9
|
|
connect _cast_bits_to_bundle_expr_flattened_11.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_13.body, _cast_bits_to_bundle_expr_flattened_11.body
|
|
wire _cast_bits_to_bundle_expr_14: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_12: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_12.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_10: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_12.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_14.tag, _cast_bits_to_enum_expr_10
|
|
connect _cast_bits_to_bundle_expr_flattened_12.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_14.body, _cast_bits_to_bundle_expr_flattened_12.body
|
|
wire _cast_enum_to_bits_expr_45: UInt<1>
|
|
match _cast_bits_to_bundle_expr_13.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_45, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_45, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_46: UInt<1>
|
|
match _cast_bits_to_bundle_expr_14.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_46, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_46, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_45, _cast_enum_to_bits_expr_46): @[module-XXXXXXXXXX.rs 1:1]
|
|
match _cast_bits_to_bundle_expr_13.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_15: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_15
|
|
wire _cast_bits_to_bundle_expr_16: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_16
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_3, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_47: UInt<1>
|
|
match io.array_opt_bool[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_47, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_47, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_7): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_3, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_3, eq(bits(io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_4, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_48: UInt<1>
|
|
match io.array_opt_bool[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_48, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_48, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_48, _cast_enum_to_bits_expr_9): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_4, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_4, eq(bits(io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_49: UInt<1>
|
|
match io.struct_opt_bool.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_49, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_49, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_49, _cast_enum_to_bits_expr_11): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_5, eq(bits(io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_50: UInt<1>
|
|
match io_zeros.opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_50, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_50, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_50, _cast_enum_to_bits_expr_13): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_17: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_17
|
|
wire _cast_bits_to_bundle_expr_18: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_18
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_51: UInt<1>
|
|
match io_zeros.opt_bool.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_51, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_51, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_15): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_7, eq(bits(io_zeros.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_1.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_52: UInt<1>
|
|
match io_zeros.opt_opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_52, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_52, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_52, _cast_enum_to_bits_expr_15): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire __enum_structural_eq_30: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, __enum_structural_eq_30 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_30, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_19: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_13: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_13.tag, bits(bits(io_zeros.opt_opt_unit.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_11: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_13.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_19.tag, _cast_bits_to_enum_expr_11
|
|
connect _cast_bits_to_bundle_expr_flattened_13.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_19.body, _cast_bits_to_bundle_expr_flattened_13.body
|
|
wire _cast_bits_to_bundle_expr_20: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_14: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_14.tag, bits(bits(_cast_bits_to_bundle_expr_1.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_12: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_14.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_20.tag, _cast_bits_to_enum_expr_12
|
|
connect _cast_bits_to_bundle_expr_flattened_14.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_20.body, _cast_bits_to_bundle_expr_flattened_14.body
|
|
wire _cast_enum_to_bits_expr_53: UInt<1>
|
|
match _cast_bits_to_bundle_expr_19.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_53, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_53, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_54: UInt<1>
|
|
match _cast_bits_to_bundle_expr_20.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_54, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_54, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_54): @[module-XXXXXXXXXX.rs 1:1]
|
|
match _cast_bits_to_bundle_expr_19.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_21: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_21
|
|
wire _cast_bits_to_bundle_expr_22: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_22
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_55: UInt<1>
|
|
match io_zeros.array_opt_bool[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_55, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_55, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_18): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_9, eq(bits(io_zeros.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_56: UInt<1>
|
|
match io_zeros.array_opt_bool[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_56, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_56, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_56, _cast_enum_to_bits_expr_20): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_10, eq(bits(io_zeros.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_57: UInt<1>
|
|
match io_zeros.struct_opt_bool.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_57, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_57, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_22): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_zeros.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_11, eq(bits(io_zeros.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_4.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_58: UInt<1>
|
|
match io_alternating.opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_58, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_58, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_13): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_23: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_23
|
|
wire _cast_bits_to_bundle_expr_24: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_24
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_59: UInt<1>
|
|
match io_alternating.opt_bool.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_59, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_59, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_60: UInt<1>
|
|
match _cast_bits_to_bundle_expr_6.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_60, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_60, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_60): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_13, eq(bits(io_alternating.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_61: UInt<1>
|
|
match io_alternating.opt_bool_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_61, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_61, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_61, _cast_enum_to_bits_expr_60): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.opt_bool_flip.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_14, eq(bits(io_alternating.opt_bool_flip.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_62: UInt<1>
|
|
match io_alternating.opt_opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_62, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_62, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_60): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire __enum_structural_eq_31: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, __enum_structural_eq_31 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_31, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_25: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_15: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_15.tag, bits(bits(io_alternating.opt_opt_unit.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_13: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_15.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_13, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_13, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_25.tag, _cast_bits_to_enum_expr_13
|
|
connect _cast_bits_to_bundle_expr_flattened_15.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_25.body, _cast_bits_to_bundle_expr_flattened_15.body
|
|
wire _cast_bits_to_bundle_expr_26: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_16: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_16.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_14: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_16.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_14, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_14, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_26.tag, _cast_bits_to_enum_expr_14
|
|
connect _cast_bits_to_bundle_expr_flattened_16.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_26.body, _cast_bits_to_bundle_expr_flattened_16.body
|
|
wire _cast_enum_to_bits_expr_63: UInt<1>
|
|
match _cast_bits_to_bundle_expr_25.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_63, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_63, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_64: UInt<1>
|
|
match _cast_bits_to_bundle_expr_26.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_64, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_64, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_64): @[module-XXXXXXXXXX.rs 1:1]
|
|
match _cast_bits_to_bundle_expr_25.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_27: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_27
|
|
wire _cast_bits_to_bundle_expr_28: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_28
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_65: UInt<1>
|
|
match io_alternating.opt_opt_unit_flip.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_65, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_65, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_65, _cast_enum_to_bits_expr_60): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.opt_opt_unit_flip.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire __enum_structural_eq_32: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, __enum_structural_eq_32 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_32, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_29: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_17: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_17.tag, bits(bits(io_alternating.opt_opt_unit_flip.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_15: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_17.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_15, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_15, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_29.tag, _cast_bits_to_enum_expr_15
|
|
connect _cast_bits_to_bundle_expr_flattened_17.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_29.body, _cast_bits_to_bundle_expr_flattened_17.body
|
|
wire _cast_bits_to_bundle_expr_30: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_18: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_18.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_16: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_18.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_16, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_16, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_30.tag, _cast_bits_to_enum_expr_16
|
|
connect _cast_bits_to_bundle_expr_flattened_18.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_30.body, _cast_bits_to_bundle_expr_flattened_18.body
|
|
wire _cast_enum_to_bits_expr_66: UInt<1>
|
|
match _cast_bits_to_bundle_expr_29.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_66, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_66, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_67: UInt<1>
|
|
match _cast_bits_to_bundle_expr_30.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_67, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_67, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_67): @[module-XXXXXXXXXX.rs 1:1]
|
|
match _cast_bits_to_bundle_expr_29.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_31: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_31
|
|
wire _cast_bits_to_bundle_expr_32: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_32
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_68: UInt<1>
|
|
match io_alternating.array_opt_bool[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_68, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_68, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_69: UInt<1>
|
|
match _cast_bits_to_array_expr_1[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_69, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_69, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_68, _cast_enum_to_bits_expr_69): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_17, eq(bits(io_alternating.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_70: UInt<1>
|
|
match io_alternating.array_opt_bool[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_70, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_70, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_71: UInt<1>
|
|
match _cast_bits_to_array_expr_1[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_71, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_71, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_70, _cast_enum_to_bits_expr_71): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_18, eq(bits(io_alternating.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_72: UInt<1>
|
|
match io_alternating.array_opt_bool_flip[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_72, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_72, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_72, _cast_enum_to_bits_expr_69): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.array_opt_bool_flip[0].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_19, eq(bits(io_alternating.array_opt_bool_flip[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_73: UInt<1>
|
|
match io_alternating.array_opt_bool_flip[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_73, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_73, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_71): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.array_opt_bool_flip[1].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_20, eq(bits(io_alternating.array_opt_bool_flip[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_74: UInt<1>
|
|
match io_alternating.struct_opt_bool.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_74, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_74, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_75: UInt<1>
|
|
match _cast_bits_to_bundle_expr_9.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_75, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_75, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_75): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_21, eq(bits(io_alternating.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_76: UInt<1>
|
|
match io_alternating.struct_opt_bool_flip.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_76, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_76, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_76, _cast_enum_to_bits_expr_75): @[module-XXXXXXXXXX.rs 1:1]
|
|
match io_alternating.struct_opt_bool_flip.`0`.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_22, eq(bits(io_alternating.struct_opt_bool_flip.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_77: UInt<1>
|
|
match extern_child.io.opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_77, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_77, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_1): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_33: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_33
|
|
wire _cast_bits_to_bundle_expr_34: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_34
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_78: UInt<1>
|
|
match extern_child.io.opt_bool.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_78, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_78, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_3): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_24, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_79: UInt<1>
|
|
match extern_child.io.opt_opt_unit.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_79, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_79, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_5): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire __enum_structural_eq_33: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, __enum_structural_eq_33 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_33, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_35: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_19: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_19.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_17: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_19.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_17, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_17, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_35.tag, _cast_bits_to_enum_expr_17
|
|
connect _cast_bits_to_bundle_expr_flattened_19.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_35.body, _cast_bits_to_bundle_expr_flattened_19.body
|
|
wire _cast_bits_to_bundle_expr_36: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_20: Ty7
|
|
connect _cast_bits_to_bundle_expr_flattened_20.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0)
|
|
wire _cast_bits_to_enum_expr_18: Ty0
|
|
when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_20.tag, 0)):
|
|
connect _cast_bits_to_enum_expr_18, {|HdlNone, HdlSome|}(HdlNone)
|
|
else:
|
|
connect _cast_bits_to_enum_expr_18, {|HdlNone, HdlSome|}(HdlSome)
|
|
connect _cast_bits_to_bundle_expr_36.tag, _cast_bits_to_enum_expr_18
|
|
connect _cast_bits_to_bundle_expr_flattened_20.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_36.body, _cast_bits_to_bundle_expr_flattened_20.body
|
|
wire _cast_enum_to_bits_expr_80: UInt<1>
|
|
match _cast_bits_to_bundle_expr_35.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_80, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_80, UInt<1>(1)
|
|
wire _cast_enum_to_bits_expr_81: UInt<1>
|
|
match _cast_bits_to_bundle_expr_36.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_81, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_81, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_81): @[module-XXXXXXXXXX.rs 1:1]
|
|
match _cast_bits_to_bundle_expr_35.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
wire _cast_bits_to_bundle_expr_37: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_37
|
|
wire _cast_bits_to_bundle_expr_38: Ty6
|
|
invalidate _cast_bits_to_bundle_expr_38
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_82: UInt<1>
|
|
match extern_child.io.array_opt_bool[0].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_82, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_82, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_7): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_26, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_83: UInt<1>
|
|
match extern_child.io.array_opt_bool[1].tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_83, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_83, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_83, _cast_enum_to_bits_expr_9): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_27, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_enum_to_bits_expr_84: UInt<1>
|
|
match extern_child.io.struct_opt_bool.`0`.tag:
|
|
HdlNone:
|
|
connect _cast_enum_to_bits_expr_84, UInt<1>(0)
|
|
HdlSome:
|
|
connect _cast_enum_to_bits_expr_84, UInt<1>(1)
|
|
when eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_11): @[module-XXXXXXXXXX.rs 1:1]
|
|
match extern_child.io.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlNone:
|
|
connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
HdlSome:
|
|
connect __enum_structural_eq_28, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1]
|
|
output io: Ty4 @[module-XXXXXXXXXX-2.rs 2:1]
|
|
defname = check_deduce_structural_eq_flags_extern_child
|
|
module check_deduce_structural_eq_flags_child: @[module-XXXXXXXXXX-3.rs 1:1]
|
|
output io: Ty4 @[module-XXXXXXXXXX-3.rs 2:1]
|
|
connect io.opt_unit, io.opt_unit_flip @[module-XXXXXXXXXX-3.rs 4:1]
|
|
connect io.opt_bool, io.opt_bool_flip @[module-XXXXXXXXXX-3.rs 5:1]
|
|
connect io.opt_opt_unit, io.opt_opt_unit_flip @[module-XXXXXXXXXX-3.rs 6:1]
|
|
connect io.array_opt_bool, io.array_opt_bool_flip @[module-XXXXXXXXXX-3.rs 7:1]
|
|
connect io.struct_opt_bool, io.struct_opt_bool_flip @[module-XXXXXXXXXX-3.rs 8:1]
|
|
",
|
|
};
|
|
let m_bundle_of_uints = simplify_enums(m, SimplifyEnumsKind::ReplaceWithBundleOfUInts).unwrap();
|
|
dbg!(m_bundle_of_uints);
|
|
#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
|
|
assert_export_firrtl! {
|
|
m_bundle_of_uints =>
|
|
options: ExportOptions {
|
|
simplify_enums: None,
|
|
..ExportOptions::default()
|
|
},
|
|
"/test/check_deduce_structural_eq_flags_parent.fir": r"FIRRTL version 3.2.0
|
|
circuit check_deduce_structural_eq_flags_parent:
|
|
type Ty0 = {tag: UInt<1>, body: UInt<0>}
|
|
type Ty1 = {tag: UInt<1>, body: UInt<1>}
|
|
type Ty2 = {`0`: Ty1, `1`: UInt<1>}
|
|
type Ty3 = {flip opt_unit_flip: Ty0, opt_unit: Ty0, flip opt_bool_flip: Ty1, opt_bool: Ty1, flip opt_opt_unit_flip: Ty1, opt_opt_unit: Ty1, flip array_opt_bool_flip: Ty1[2], array_opt_bool: Ty1[2], flip struct_opt_bool_flip: Ty2, struct_opt_bool: Ty2}
|
|
type Ty4 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>}
|
|
type Ty5 = {}
|
|
type Ty6 = {`0`: UInt<2>, `1`: UInt<1>}
|
|
type Ty7 = {io: Ty3}
|
|
module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1]
|
|
input io: Ty3 @[module-XXXXXXXXXX.rs 2:1]
|
|
input io_zeros: Ty3 @[module-XXXXXXXXXX.rs 3:1]
|
|
input io_alternating: Ty3 @[module-XXXXXXXXXX.rs 4:1]
|
|
output parent_out: Ty4 @[module-XXXXXXXXXX.rs 5:1]
|
|
output parent_zeros_out: Ty4 @[module-XXXXXXXXXX.rs 6:1]
|
|
output parent_alternating_out: Ty4 @[module-XXXXXXXXXX.rs 7:1]
|
|
output extern_child_out: Ty4 @[module-XXXXXXXXXX.rs 8:1]
|
|
output child_out: Ty4 @[module-XXXXXXXXXX.rs 9:1]
|
|
wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_3: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_4: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_5: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_6: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1]
|
|
inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1]
|
|
wire _bundle_literal_expr: Ty0
|
|
connect _bundle_literal_expr.tag, UInt<1>(0h1)
|
|
wire _bundle_literal_expr_1: Ty5
|
|
invalidate _bundle_literal_expr_1
|
|
connect _bundle_literal_expr.body, UInt<0>(0)
|
|
connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_out.opt_unit, __enum_structural_eq @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq: UInt<1>
|
|
connect _bundle_structural_eq, and(eq(io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect parent_out.opt_unit_flip, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_literal_expr_2: Ty1
|
|
connect _bundle_literal_expr_2.tag, UInt<1>(0h1)
|
|
connect _bundle_literal_expr_2.body, UInt<1>(0h1)
|
|
connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_out.opt_bool, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_structural_eq_1: UInt<1>
|
|
connect _bundle_structural_eq_1, and(eq(io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect parent_out.opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_literal_expr_3: Ty1
|
|
connect _bundle_literal_expr_3.tag, UInt<1>(0h1)
|
|
wire _cast_bundle_to_bits_expr: Ty0
|
|
connect _cast_bundle_to_bits_expr.tag, _bundle_literal_expr.tag
|
|
connect _cast_bundle_to_bits_expr.body, _bundle_literal_expr.body
|
|
wire _cast_to_bits_expr: UInt<1>
|
|
connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag)
|
|
connect _bundle_literal_expr_3.body, _cast_to_bits_expr
|
|
connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_out.opt_opt_unit, __enum_structural_eq_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _bundle_structural_eq_2: UInt<1>
|
|
connect _bundle_structural_eq_2, and(eq(io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _array_literal_expr: Ty1[2]
|
|
wire _bundle_literal_expr_4: Ty1
|
|
connect _bundle_literal_expr_4.tag, UInt<1>(0h1)
|
|
connect _bundle_literal_expr_4.body, UInt<1>(0h0)
|
|
connect _array_literal_expr[0], _bundle_literal_expr_4
|
|
connect _array_literal_expr[1], _bundle_literal_expr_2
|
|
connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_out.array_opt_bool, and(__enum_structural_eq_3, __enum_structural_eq_4) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_structural_eq_3: UInt<1>
|
|
connect _bundle_structural_eq_3, and(eq(io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _bundle_structural_eq_4: UInt<1>
|
|
connect _bundle_structural_eq_4, and(eq(io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_3, _bundle_structural_eq_4) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_literal_expr_5: Ty2
|
|
connect _bundle_literal_expr_5.`0`, _bundle_literal_expr_2
|
|
connect _bundle_literal_expr_5.`1`, UInt<1>(0h1)
|
|
connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_out.struct_opt_bool, and(__enum_structural_eq_5, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _bundle_structural_eq_5: UInt<1>
|
|
connect _bundle_structural_eq_5, and(eq(io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_5, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _cast_bits_to_bundle_expr: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened.tag, bits(UInt<1>(0h0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_bundle_expr_flattened.tag
|
|
connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body
|
|
connect io_zeros.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_zeros_out.opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq_6: UInt<1>
|
|
connect _bundle_structural_eq_6, and(eq(io_zeros.opt_unit_flip.tag, _cast_bits_to_bundle_expr.tag), eq(io_zeros.opt_unit_flip.body, _cast_bits_to_bundle_expr.body))
|
|
connect parent_zeros_out.opt_unit_flip, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_bundle_expr_1: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_1: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(UInt<2>(0h0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_bundle_expr_flattened_1.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_1.body, bits(UInt<2>(0h0), 1, 1)
|
|
connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body
|
|
connect io_zeros.opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_zeros_out.opt_bool, __enum_structural_eq_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_structural_eq_7: UInt<1>
|
|
connect _bundle_structural_eq_7, and(eq(io_zeros.opt_bool_flip.tag, _cast_bits_to_bundle_expr_1.tag), eq(io_zeros.opt_bool_flip.body, _cast_bits_to_bundle_expr_1.body))
|
|
connect parent_zeros_out.opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_zeros.opt_opt_unit_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _bundle_structural_eq_8: UInt<1>
|
|
connect _bundle_structural_eq_8, and(eq(io_zeros.opt_opt_unit_flip.tag, _cast_bits_to_bundle_expr_1.tag), eq(io_zeros.opt_opt_unit_flip.body, _cast_bits_to_bundle_expr_1.body))
|
|
connect parent_zeros_out.opt_opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr: Ty1[2]
|
|
wire _cast_bits_to_array_expr_flattened: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_2: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_2: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(_cast_bits_to_array_expr_flattened[0], 0, 0)
|
|
connect _cast_bits_to_bundle_expr_2.tag, _cast_bits_to_bundle_expr_flattened_2.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_2.body, bits(_cast_bits_to_array_expr_flattened[0], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_2.body, _cast_bits_to_bundle_expr_flattened_2.body
|
|
connect _cast_bits_to_array_expr[0], _cast_bits_to_bundle_expr_2
|
|
connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2)
|
|
wire _cast_bits_to_bundle_expr_3: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_3: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(_cast_bits_to_array_expr_flattened[1], 0, 0)
|
|
connect _cast_bits_to_bundle_expr_3.tag, _cast_bits_to_bundle_expr_flattened_3.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_3.body, bits(_cast_bits_to_array_expr_flattened[1], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_3.body, _cast_bits_to_bundle_expr_flattened_3.body
|
|
connect _cast_bits_to_array_expr[1], _cast_bits_to_bundle_expr_3
|
|
connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_9, __enum_structural_eq_10) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_structural_eq_9: UInt<1>
|
|
connect _bundle_structural_eq_9, and(eq(io_zeros.array_opt_bool_flip[0].tag, _cast_bits_to_array_expr[0].tag), eq(io_zeros.array_opt_bool_flip[0].body, _cast_bits_to_array_expr[0].body))
|
|
wire _bundle_structural_eq_10: UInt<1>
|
|
connect _bundle_structural_eq_10, and(eq(io_zeros.array_opt_bool_flip[1].tag, _cast_bits_to_array_expr[1].tag), eq(io_zeros.array_opt_bool_flip[1].body, _cast_bits_to_array_expr[1].body))
|
|
connect parent_zeros_out.array_opt_bool_flip, and(_bundle_structural_eq_9, _bundle_structural_eq_10) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_4: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_4: Ty6
|
|
connect _cast_bits_to_bundle_expr_flattened_4.`0`, bits(UInt<3>(0h0), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_5: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_5: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_5.tag, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 0, 0)
|
|
connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_bundle_expr_flattened_5.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_5.body, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 1, 1)
|
|
connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_5.body
|
|
connect _cast_bits_to_bundle_expr_4.`0`, _cast_bits_to_bundle_expr_5
|
|
connect _cast_bits_to_bundle_expr_flattened_4.`1`, bits(UInt<3>(0h0), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_4.`1`, _cast_bits_to_bundle_expr_flattened_4.`1`
|
|
connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_4 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_11, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _bundle_structural_eq_11: UInt<1>
|
|
connect _bundle_structural_eq_11, and(eq(io_zeros.struct_opt_bool_flip.`0`.tag, _cast_bits_to_bundle_expr_4.`0`.tag), eq(io_zeros.struct_opt_bool_flip.`0`.body, _cast_bits_to_bundle_expr_4.`0`.body))
|
|
connect parent_zeros_out.struct_opt_bool_flip, and(_bundle_structural_eq_11, eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_alternating.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_alternating_out.opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq_12: UInt<1>
|
|
connect _bundle_structural_eq_12, and(eq(io_alternating.opt_unit_flip.tag, _cast_bits_to_bundle_expr.tag), eq(io_alternating.opt_unit_flip.body, _cast_bits_to_bundle_expr.body))
|
|
connect parent_alternating_out.opt_unit_flip, _bundle_structural_eq_12 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _cast_bits_to_bundle_expr_6: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_6: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_6.tag, bits(UInt<2>(0h2), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_6.tag, _cast_bits_to_bundle_expr_flattened_6.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_6.body, bits(UInt<2>(0h2), 1, 1)
|
|
connect _cast_bits_to_bundle_expr_6.body, _cast_bits_to_bundle_expr_flattened_6.body
|
|
connect io_alternating.opt_bool_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_14 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_alternating.opt_opt_unit_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_15 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_16 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr_1: Ty1[2]
|
|
wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_7: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_7: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_7.tag, bits(_cast_bits_to_array_expr_flattened_1[0], 0, 0)
|
|
connect _cast_bits_to_bundle_expr_7.tag, _cast_bits_to_bundle_expr_flattened_7.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_7.body, bits(_cast_bits_to_array_expr_flattened_1[0], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_7.body, _cast_bits_to_bundle_expr_flattened_7.body
|
|
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_bundle_expr_7
|
|
connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2)
|
|
wire _cast_bits_to_bundle_expr_8: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_8: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_8.tag, bits(_cast_bits_to_array_expr_flattened_1[1], 0, 0)
|
|
connect _cast_bits_to_bundle_expr_8.tag, _cast_bits_to_bundle_expr_flattened_8.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_8.body, bits(_cast_bits_to_array_expr_flattened_1[1], 1, 1)
|
|
connect _cast_bits_to_bundle_expr_8.body, _cast_bits_to_bundle_expr_flattened_8.body
|
|
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_bundle_expr_8
|
|
connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_17, __enum_structural_eq_18) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_19, __enum_structural_eq_20) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_9: Ty2
|
|
wire _cast_bits_to_bundle_expr_flattened_9: Ty6
|
|
connect _cast_bits_to_bundle_expr_flattened_9.`0`, bits(UInt<3>(0h2), 1, 0)
|
|
wire _cast_bits_to_bundle_expr_10: Ty1
|
|
wire _cast_bits_to_bundle_expr_flattened_10: Ty1
|
|
connect _cast_bits_to_bundle_expr_flattened_10.tag, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 0, 0)
|
|
connect _cast_bits_to_bundle_expr_10.tag, _cast_bits_to_bundle_expr_flattened_10.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_10.body, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 1, 1)
|
|
connect _cast_bits_to_bundle_expr_10.body, _cast_bits_to_bundle_expr_flattened_10.body
|
|
connect _cast_bits_to_bundle_expr_9.`0`, _cast_bits_to_bundle_expr_10
|
|
connect _cast_bits_to_bundle_expr_flattened_9.`1`, bits(UInt<3>(0h2), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_9.`1`, _cast_bits_to_bundle_expr_flattened_9.`1`
|
|
connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_9 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_21, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_22, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child_out.opt_unit, __enum_structural_eq_23 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq_13: UInt<1>
|
|
connect _bundle_structural_eq_13, and(eq(extern_child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect extern_child_out.opt_unit_flip, _bundle_structural_eq_13 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child_out.opt_bool, __enum_structural_eq_24 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_structural_eq_14: UInt<1>
|
|
connect _bundle_structural_eq_14, and(eq(extern_child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect extern_child_out.opt_bool_flip, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child_out.opt_opt_unit, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _bundle_structural_eq_15: UInt<1>
|
|
connect _bundle_structural_eq_15, and(eq(extern_child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child_out.array_opt_bool, and(__enum_structural_eq_26, __enum_structural_eq_27) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_structural_eq_16: UInt<1>
|
|
connect _bundle_structural_eq_16, and(eq(extern_child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _bundle_structural_eq_17: UInt<1>
|
|
connect _bundle_structural_eq_17, and(eq(extern_child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_16, _bundle_structural_eq_17) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_28, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _bundle_structural_eq_18: UInt<1>
|
|
connect _bundle_structural_eq_18, and(eq(extern_child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_18, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq_19: UInt<1>
|
|
connect _bundle_structural_eq_19, and(eq(child.io.opt_unit.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit.body, _bundle_literal_expr.body))
|
|
connect child_out.opt_unit, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_structural_eq_20: UInt<1>
|
|
connect _bundle_structural_eq_20, and(eq(child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body))
|
|
connect child_out.opt_unit_flip, _bundle_structural_eq_20 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_structural_eq_21: UInt<1>
|
|
connect _bundle_structural_eq_21, and(eq(child.io.opt_bool.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body))
|
|
connect child_out.opt_bool, _bundle_structural_eq_21 @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_structural_eq_22: UInt<1>
|
|
connect _bundle_structural_eq_22, and(eq(child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body))
|
|
connect child_out.opt_bool_flip, _bundle_structural_eq_22 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _bundle_structural_eq_23: UInt<1>
|
|
connect _bundle_structural_eq_23, and(eq(child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body))
|
|
connect child_out.opt_opt_unit, _bundle_structural_eq_23 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _bundle_structural_eq_24: UInt<1>
|
|
connect _bundle_structural_eq_24, and(eq(child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body))
|
|
connect child_out.opt_opt_unit_flip, _bundle_structural_eq_24 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_structural_eq_25: UInt<1>
|
|
connect _bundle_structural_eq_25, and(eq(child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body))
|
|
wire _bundle_structural_eq_26: UInt<1>
|
|
connect _bundle_structural_eq_26, and(eq(child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body))
|
|
connect child_out.array_opt_bool, and(_bundle_structural_eq_25, _bundle_structural_eq_26) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_structural_eq_27: UInt<1>
|
|
connect _bundle_structural_eq_27, and(eq(child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body))
|
|
wire _bundle_structural_eq_28: UInt<1>
|
|
connect _bundle_structural_eq_28, and(eq(child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body))
|
|
connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_27, _bundle_structural_eq_28) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _bundle_structural_eq_29: UInt<1>
|
|
connect _bundle_structural_eq_29, and(eq(child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect child_out.struct_opt_bool, and(_bundle_structural_eq_29, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
wire _bundle_structural_eq_30: UInt<1>
|
|
connect _bundle_structural_eq_30, and(eq(child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body))
|
|
connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_30, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_unit.tag, _bundle_literal_expr.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_11: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_11
|
|
wire _cast_bits_to_bundle_expr_12: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_12
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_1, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_bool.tag, _bundle_literal_expr_2.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_1, eq(bits(io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_opt_unit.tag, _bundle_literal_expr_3.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_13: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_11: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_11.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_13.tag, _cast_bits_to_bundle_expr_flattened_11.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_11.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_13.body, _cast_bits_to_bundle_expr_flattened_11.body
|
|
wire _cast_bits_to_bundle_expr_14: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_12: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_12.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_14.tag, _cast_bits_to_bundle_expr_flattened_12.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_12.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_14.body, _cast_bits_to_bundle_expr_flattened_12.body
|
|
when eq(_cast_bits_to_bundle_expr_13.tag, _cast_bits_to_bundle_expr_14.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(_cast_bits_to_bundle_expr_13.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_15: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_15
|
|
wire _cast_bits_to_bundle_expr_16: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_16
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_3, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.array_opt_bool[0].tag, _array_literal_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_3, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_3, eq(bits(io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_4, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.array_opt_bool[1].tag, _array_literal_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_4, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_4, eq(bits(io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_5, eq(bits(io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_unit.tag, _cast_bits_to_bundle_expr.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_17: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_17
|
|
wire _cast_bits_to_bundle_expr_18: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_18
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_bool.tag, _cast_bits_to_bundle_expr_1.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_7, eq(bits(io_zeros.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_1.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_opt_unit.tag, _cast_bits_to_bundle_expr_1.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_30: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, __enum_structural_eq_30 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_30, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_19: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_13: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_13.tag, bits(bits(io_zeros.opt_opt_unit.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_19.tag, _cast_bits_to_bundle_expr_flattened_13.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_13.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_19.body, _cast_bits_to_bundle_expr_flattened_13.body
|
|
wire _cast_bits_to_bundle_expr_20: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_14: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_14.tag, bits(bits(_cast_bits_to_bundle_expr_1.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_20.tag, _cast_bits_to_bundle_expr_flattened_14.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_14.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_20.body, _cast_bits_to_bundle_expr_flattened_14.body
|
|
when eq(_cast_bits_to_bundle_expr_19.tag, _cast_bits_to_bundle_expr_20.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(_cast_bits_to_bundle_expr_19.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_21: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_21
|
|
wire _cast_bits_to_bundle_expr_22: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_22
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.array_opt_bool[0].tag, _cast_bits_to_array_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_9, eq(bits(io_zeros.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.array_opt_bool[1].tag, _cast_bits_to_array_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_10, eq(bits(io_zeros.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.struct_opt_bool.`0`.tag, _cast_bits_to_bundle_expr_4.`0`.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_zeros.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_11, eq(bits(io_zeros.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_4.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_unit.tag, _cast_bits_to_bundle_expr.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_23: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_23
|
|
wire _cast_bits_to_bundle_expr_24: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_24
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_bool.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_13, eq(bits(io_alternating.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_bool_flip.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_bool_flip.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_14, eq(bits(io_alternating.opt_bool_flip.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_opt_unit.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_31: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, __enum_structural_eq_31 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_31, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_25: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_15: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_15.tag, bits(bits(io_alternating.opt_opt_unit.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_25.tag, _cast_bits_to_bundle_expr_flattened_15.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_15.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_25.body, _cast_bits_to_bundle_expr_flattened_15.body
|
|
wire _cast_bits_to_bundle_expr_26: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_16: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_16.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_26.tag, _cast_bits_to_bundle_expr_flattened_16.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_16.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_26.body, _cast_bits_to_bundle_expr_flattened_16.body
|
|
when eq(_cast_bits_to_bundle_expr_25.tag, _cast_bits_to_bundle_expr_26.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(_cast_bits_to_bundle_expr_25.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_27: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_27
|
|
wire _cast_bits_to_bundle_expr_28: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_28
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_opt_unit_flip.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.opt_opt_unit_flip.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_32: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, __enum_structural_eq_32 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_32, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_29: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_17: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_17.tag, bits(bits(io_alternating.opt_opt_unit_flip.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_29.tag, _cast_bits_to_bundle_expr_flattened_17.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_17.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_29.body, _cast_bits_to_bundle_expr_flattened_17.body
|
|
wire _cast_bits_to_bundle_expr_30: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_18: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_18.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_30.tag, _cast_bits_to_bundle_expr_flattened_18.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_18.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_30.body, _cast_bits_to_bundle_expr_flattened_18.body
|
|
when eq(_cast_bits_to_bundle_expr_29.tag, _cast_bits_to_bundle_expr_30.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(_cast_bits_to_bundle_expr_29.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_31: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_31
|
|
wire _cast_bits_to_bundle_expr_32: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_32
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool[0].tag, _cast_bits_to_array_expr_1[0].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_17, eq(bits(io_alternating.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool[1].tag, _cast_bits_to_array_expr_1[1].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_18, eq(bits(io_alternating.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool_flip[0].tag, _cast_bits_to_array_expr_1[0].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool_flip[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_19, eq(bits(io_alternating.array_opt_bool_flip[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool_flip[1].tag, _cast_bits_to_array_expr_1[1].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.array_opt_bool_flip[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_20, eq(bits(io_alternating.array_opt_bool_flip[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.struct_opt_bool.`0`.tag, _cast_bits_to_bundle_expr_9.`0`.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_21, eq(bits(io_alternating.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.struct_opt_bool_flip.`0`.tag, _cast_bits_to_bundle_expr_9.`0`.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(io_alternating.struct_opt_bool_flip.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_22, eq(bits(io_alternating.struct_opt_bool_flip.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_unit.tag, _bundle_literal_expr.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_33: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_33
|
|
wire _cast_bits_to_bundle_expr_34: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_34
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_bool.tag, _bundle_literal_expr_2.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_24, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_33: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, __enum_structural_eq_33 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_33, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
wire _cast_bits_to_bundle_expr_35: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_19: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_19.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_35.tag, _cast_bits_to_bundle_expr_flattened_19.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_19.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_35.body, _cast_bits_to_bundle_expr_flattened_19.body
|
|
wire _cast_bits_to_bundle_expr_36: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_20: Ty0
|
|
connect _cast_bits_to_bundle_expr_flattened_20.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0)
|
|
connect _cast_bits_to_bundle_expr_36.tag, _cast_bits_to_bundle_expr_flattened_20.tag
|
|
connect _cast_bits_to_bundle_expr_flattened_20.body, UInt<0>(0)
|
|
connect _cast_bits_to_bundle_expr_36.body, _cast_bits_to_bundle_expr_flattened_20.body
|
|
when eq(_cast_bits_to_bundle_expr_35.tag, _cast_bits_to_bundle_expr_36.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(_cast_bits_to_bundle_expr_35.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_37: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_37
|
|
wire _cast_bits_to_bundle_expr_38: Ty5
|
|
invalidate _cast_bits_to_bundle_expr_38
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_26, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_27, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(extern_child.io.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_28, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1]
|
|
output io: Ty3 @[module-XXXXXXXXXX-2.rs 2:1]
|
|
defname = check_deduce_structural_eq_flags_extern_child
|
|
module check_deduce_structural_eq_flags_child: @[module-XXXXXXXXXX-3.rs 1:1]
|
|
output io: Ty3 @[module-XXXXXXXXXX-3.rs 2:1]
|
|
connect io.opt_unit, io.opt_unit_flip @[module-XXXXXXXXXX-3.rs 4:1]
|
|
connect io.opt_bool, io.opt_bool_flip @[module-XXXXXXXXXX-3.rs 5:1]
|
|
connect io.opt_opt_unit, io.opt_opt_unit_flip @[module-XXXXXXXXXX-3.rs 6:1]
|
|
connect io.array_opt_bool, io.array_opt_bool_flip @[module-XXXXXXXXXX-3.rs 7:1]
|
|
connect io.struct_opt_bool, io.struct_opt_bool_flip @[module-XXXXXXXXXX-3.rs 8:1]
|
|
",
|
|
};
|
|
let m_uints = simplify_enums(m, SimplifyEnumsKind::ReplaceWithUInt).unwrap();
|
|
dbg!(m_uints);
|
|
#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
|
|
assert_export_firrtl! {
|
|
m_uints =>
|
|
options: ExportOptions {
|
|
simplify_enums: None,
|
|
..ExportOptions::default()
|
|
},
|
|
"/test/check_deduce_structural_eq_flags_parent.fir": r"FIRRTL version 3.2.0
|
|
circuit check_deduce_structural_eq_flags_parent:
|
|
type Ty0 = {`0`: UInt<2>, `1`: UInt<1>}
|
|
type Ty1 = {flip opt_unit_flip: UInt<1>, opt_unit: UInt<1>, flip opt_bool_flip: UInt<2>, opt_bool: UInt<2>, flip opt_opt_unit_flip: UInt<2>, opt_opt_unit: UInt<2>, flip array_opt_bool_flip: UInt<2>[2], array_opt_bool: UInt<2>[2], flip struct_opt_bool_flip: Ty0, struct_opt_bool: Ty0}
|
|
type Ty2 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>}
|
|
type Ty3 = {tag: UInt<1>, body: UInt<0>}
|
|
type Ty4 = {}
|
|
type Ty5 = {tag: UInt<1>, body: UInt<1>}
|
|
type Ty6 = {`0`: UInt<2>, `1`: UInt<1>}
|
|
type Ty7 = {io: Ty1}
|
|
module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1]
|
|
input io: Ty1 @[module-XXXXXXXXXX.rs 2:1]
|
|
input io_zeros: Ty1 @[module-XXXXXXXXXX.rs 3:1]
|
|
input io_alternating: Ty1 @[module-XXXXXXXXXX.rs 4:1]
|
|
output parent_out: Ty2 @[module-XXXXXXXXXX.rs 5:1]
|
|
output parent_zeros_out: Ty2 @[module-XXXXXXXXXX.rs 6:1]
|
|
output parent_alternating_out: Ty2 @[module-XXXXXXXXXX.rs 7:1]
|
|
output extern_child_out: Ty2 @[module-XXXXXXXXXX.rs 8:1]
|
|
output child_out: Ty2 @[module-XXXXXXXXXX.rs 9:1]
|
|
wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_3: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_4: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_5: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_6: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1]
|
|
inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1]
|
|
wire _bundle_literal_expr: Ty3
|
|
connect _bundle_literal_expr.tag, UInt<1>(0h1)
|
|
wire _bundle_literal_expr_1: Ty4
|
|
invalidate _bundle_literal_expr_1
|
|
connect _bundle_literal_expr.body, UInt<0>(0)
|
|
wire _cast_bundle_to_bits_expr: Ty3
|
|
connect _cast_bundle_to_bits_expr.tag, _bundle_literal_expr.tag
|
|
connect _cast_bundle_to_bits_expr.body, _bundle_literal_expr.body
|
|
wire _cast_to_bits_expr: UInt<1>
|
|
connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag)
|
|
connect io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_out.opt_unit, __enum_structural_eq @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_out.opt_unit_flip, eq(io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
wire _bundle_literal_expr_2: Ty5
|
|
connect _bundle_literal_expr_2.tag, UInt<1>(0h1)
|
|
connect _bundle_literal_expr_2.body, UInt<1>(0h1)
|
|
wire _cast_bundle_to_bits_expr_1: Ty5
|
|
connect _cast_bundle_to_bits_expr_1.tag, _bundle_literal_expr_2.tag
|
|
connect _cast_bundle_to_bits_expr_1.body, _bundle_literal_expr_2.body
|
|
wire _cast_to_bits_expr_1: UInt<2>
|
|
connect _cast_to_bits_expr_1, cat(_cast_bundle_to_bits_expr_1.body, _cast_bundle_to_bits_expr_1.tag)
|
|
connect io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_out.opt_bool, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_out.opt_bool_flip, eq(io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1]
|
|
wire _bundle_literal_expr_3: Ty5
|
|
connect _bundle_literal_expr_3.tag, UInt<1>(0h1)
|
|
connect _bundle_literal_expr_3.body, _cast_to_bits_expr
|
|
wire _cast_bundle_to_bits_expr_2: Ty5
|
|
connect _cast_bundle_to_bits_expr_2.tag, _bundle_literal_expr_3.tag
|
|
connect _cast_bundle_to_bits_expr_2.body, _bundle_literal_expr_3.body
|
|
wire _cast_to_bits_expr_2: UInt<2>
|
|
connect _cast_to_bits_expr_2, cat(_cast_bundle_to_bits_expr_2.body, _cast_bundle_to_bits_expr_2.tag)
|
|
connect io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_out.opt_opt_unit, __enum_structural_eq_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_out.opt_opt_unit_flip, eq(io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _array_literal_expr: UInt<2>[2]
|
|
wire _bundle_literal_expr_4: Ty5
|
|
connect _bundle_literal_expr_4.tag, UInt<1>(0h1)
|
|
connect _bundle_literal_expr_4.body, UInt<1>(0h0)
|
|
wire _cast_bundle_to_bits_expr_3: Ty5
|
|
connect _cast_bundle_to_bits_expr_3.tag, _bundle_literal_expr_4.tag
|
|
connect _cast_bundle_to_bits_expr_3.body, _bundle_literal_expr_4.body
|
|
wire _cast_to_bits_expr_3: UInt<2>
|
|
connect _cast_to_bits_expr_3, cat(_cast_bundle_to_bits_expr_3.body, _cast_bundle_to_bits_expr_3.tag)
|
|
connect _array_literal_expr[0], _cast_to_bits_expr_3
|
|
connect _array_literal_expr[1], _cast_to_bits_expr_1
|
|
connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_out.array_opt_bool, and(__enum_structural_eq_3, __enum_structural_eq_4) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_out.array_opt_bool_flip, and(eq(io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _bundle_literal_expr_5: Ty0
|
|
connect _bundle_literal_expr_5.`0`, _cast_to_bits_expr_1
|
|
connect _bundle_literal_expr_5.`1`, UInt<1>(0h1)
|
|
connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_out.struct_opt_bool, and(__enum_structural_eq_5, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_out.struct_opt_bool_flip, and(eq(io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_zeros.opt_unit_flip, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_zeros_out.opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_zeros_out.opt_unit_flip, eq(io_zeros.opt_unit_flip, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect io_zeros.opt_bool_flip, UInt<2>(0h0) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_zeros_out.opt_bool, __enum_structural_eq_7 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_zeros_out.opt_bool_flip, eq(io_zeros.opt_bool_flip, UInt<2>(0h0)) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_zeros.opt_opt_unit_flip, UInt<2>(0h0) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_8 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_zeros_out.opt_opt_unit_flip, eq(io_zeros.opt_opt_unit_flip, UInt<2>(0h0)) @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr: UInt<2>[2]
|
|
wire _cast_bits_to_array_expr_flattened: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0)
|
|
connect _cast_bits_to_array_expr[0], _cast_bits_to_array_expr_flattened[0]
|
|
connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2)
|
|
connect _cast_bits_to_array_expr[1], _cast_bits_to_array_expr_flattened[1]
|
|
connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_9, __enum_structural_eq_10) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_zeros_out.array_opt_bool_flip, and(eq(io_zeros.array_opt_bool_flip[0], _cast_bits_to_array_expr[0]), eq(io_zeros.array_opt_bool_flip[1], _cast_bits_to_array_expr[1])) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened: Ty6
|
|
connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0)
|
|
connect _cast_bits_to_bundle_expr.`0`, _cast_bits_to_bundle_expr_flattened.`0`
|
|
connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2)
|
|
connect _cast_bits_to_bundle_expr.`1`, _cast_bits_to_bundle_expr_flattened.`1`
|
|
connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_11, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_zeros_out.struct_opt_bool_flip, and(eq(io_zeros.struct_opt_bool_flip.`0`, _cast_bits_to_bundle_expr.`0`), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect io_alternating.opt_unit_flip, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_alternating_out.opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect parent_alternating_out.opt_unit_flip, eq(io_alternating.opt_unit_flip, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect io_alternating.opt_bool_flip, UInt<2>(0h2) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_14 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect io_alternating.opt_opt_unit_flip, UInt<2>(0h2) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_15 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_16 @[module-XXXXXXXXXX.rs 15:1]
|
|
wire _cast_bits_to_array_expr_1: UInt<2>[2]
|
|
wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2]
|
|
connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0)
|
|
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_array_expr_flattened_1[0]
|
|
connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2)
|
|
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_array_expr_flattened_1[1]
|
|
connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_17, __enum_structural_eq_18) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_19, __enum_structural_eq_20) @[module-XXXXXXXXXX.rs 16:1]
|
|
wire _cast_bits_to_bundle_expr_1: Ty0
|
|
wire _cast_bits_to_bundle_expr_flattened_1: Ty6
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0)
|
|
connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_bundle_expr_flattened_1.`0`
|
|
connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2)
|
|
connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened_1.`1`
|
|
connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_21, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_22, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child_out.opt_unit, __enum_structural_eq_23 @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child_out.opt_unit_flip, eq(extern_child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect extern_child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child_out.opt_bool, __enum_structural_eq_24 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child_out.opt_bool_flip, eq(extern_child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child_out.opt_opt_unit, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child_out.opt_opt_unit_flip, eq(extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child_out.array_opt_bool, and(__enum_structural_eq_26, __enum_structural_eq_27) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child_out.array_opt_bool_flip, and(eq(extern_child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(extern_child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_28, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect extern_child_out.struct_opt_bool_flip, and(eq(extern_child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child_out.opt_unit, eq(child.io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child_out.opt_unit_flip, eq(child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1]
|
|
connect child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child_out.opt_bool, eq(child.io.opt_bool, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child_out.opt_bool_flip, eq(child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1]
|
|
connect child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child_out.opt_opt_unit, eq(child.io.opt_opt_unit, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child_out.opt_opt_unit_flip, eq(child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1]
|
|
connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child_out.array_opt_bool, and(eq(child.io.array_opt_bool[0], _array_literal_expr[0]), eq(child.io.array_opt_bool[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child_out.array_opt_bool_flip, and(eq(child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1]
|
|
connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child_out.struct_opt_bool, and(eq(child.io.struct_opt_bool.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect child_out.struct_opt_bool_flip, and(eq(child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1]
|
|
connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_unit, 0, 0), bits(_cast_to_bits_expr, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_2: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_2
|
|
wire _cast_bits_to_bundle_expr_3: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_3
|
|
connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_1, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_bool, 0, 0), bits(_cast_to_bits_expr_1, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_1, eq(bits(bits(io.opt_bool, 1, 1), 0, 0), bits(bits(_cast_to_bits_expr_1, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_opt_unit, 0, 0), bits(_cast_to_bits_expr_2, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_2, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(_cast_to_bits_expr_2, 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_4: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_4
|
|
wire _cast_bits_to_bundle_expr_5: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_5
|
|
connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_3, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.array_opt_bool[0], 0, 0), bits(_array_literal_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_3, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_3, eq(bits(bits(io.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_array_literal_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_4, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.array_opt_bool[1], 0, 0), bits(_array_literal_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_4, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_4, eq(bits(bits(io.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_array_literal_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.struct_opt_bool.`0`, 0, 0), bits(_bundle_literal_expr_5.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_5, eq(bits(bits(io.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_bundle_literal_expr_5.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_unit, 0, 0), bits(UInt<1>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_6: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_6
|
|
wire _cast_bits_to_bundle_expr_7: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_7
|
|
connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_bool, 0, 0), bits(UInt<2>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_7, eq(bits(bits(io_zeros.opt_bool, 1, 1), 0, 0), bits(bits(UInt<2>(0h0), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_opt_unit, 0, 0), bits(UInt<2>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_30: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_8, __enum_structural_eq_30 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_30, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_zeros.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h0), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_zeros.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_8: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_8
|
|
wire _cast_bits_to_bundle_expr_9: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_9
|
|
connect __enum_structural_eq_30, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.array_opt_bool[0], 0, 0), bits(_cast_bits_to_array_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_9, eq(bits(bits(io_zeros.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.array_opt_bool[1], 0, 0), bits(_cast_bits_to_array_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_10, eq(bits(bits(io_zeros.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.struct_opt_bool.`0`, 0, 0), bits(_cast_bits_to_bundle_expr.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_zeros.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_11, eq(bits(bits(io_zeros.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_unit, 0, 0), bits(UInt<1>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_10: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_10
|
|
wire _cast_bits_to_bundle_expr_11: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_11
|
|
connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_bool, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_13, eq(bits(bits(io_alternating.opt_bool, 1, 1), 0, 0), bits(bits(UInt<2>(0h2), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_bool_flip, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_bool_flip, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_14, eq(bits(bits(io_alternating.opt_bool_flip, 1, 1), 0, 0), bits(bits(UInt<2>(0h2), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_opt_unit, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_31: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_15, __enum_structural_eq_31 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_31, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_alternating.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h2), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_alternating.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_12: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_12
|
|
wire _cast_bits_to_bundle_expr_13: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_13
|
|
connect __enum_structural_eq_31, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_opt_unit_flip, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.opt_opt_unit_flip, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_32: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_16, __enum_structural_eq_32 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_32, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_alternating.opt_opt_unit_flip, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h2), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(io_alternating.opt_opt_unit_flip, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_14: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_14
|
|
wire _cast_bits_to_bundle_expr_15: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_15
|
|
connect __enum_structural_eq_32, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool[0], 0, 0), bits(_cast_bits_to_array_expr_1[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_17, eq(bits(bits(io_alternating.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool[1], 0, 0), bits(_cast_bits_to_array_expr_1[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_18, eq(bits(bits(io_alternating.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool_flip[0], 0, 0), bits(_cast_bits_to_array_expr_1[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool_flip[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_19, eq(bits(bits(io_alternating.array_opt_bool_flip[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool_flip[1], 0, 0), bits(_cast_bits_to_array_expr_1[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.array_opt_bool_flip[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_20, eq(bits(bits(io_alternating.array_opt_bool_flip[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.struct_opt_bool.`0`, 0, 0), bits(_cast_bits_to_bundle_expr_1.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_21, eq(bits(bits(io_alternating.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr_1.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.struct_opt_bool_flip.`0`, 0, 0), bits(_cast_bits_to_bundle_expr_1.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(io_alternating.struct_opt_bool_flip.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_22, eq(bits(bits(io_alternating.struct_opt_bool_flip.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr_1.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_unit, 0, 0), bits(_cast_to_bits_expr, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_16: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_16
|
|
wire _cast_bits_to_bundle_expr_17: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_17
|
|
connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_bool, 0, 0), bits(_cast_to_bits_expr_1, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_24, eq(bits(bits(extern_child.io.opt_bool, 1, 1), 0, 0), bits(bits(_cast_to_bits_expr_1, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_opt_unit, 0, 0), bits(_cast_to_bits_expr_2, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire __enum_structural_eq_33: UInt<1> @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_25, __enum_structural_eq_33 @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_33, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(_cast_to_bits_expr_2, 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
wire _cast_bits_to_bundle_expr_18: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_18
|
|
wire _cast_bits_to_bundle_expr_19: Ty4
|
|
invalidate _cast_bits_to_bundle_expr_19
|
|
connect __enum_structural_eq_33, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), bits(_array_literal_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_26, eq(bits(bits(extern_child.io.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_array_literal_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), bits(_array_literal_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_27, eq(bits(bits(extern_child.io.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_array_literal_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), bits(_bundle_literal_expr_5.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1]
|
|
connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1]
|
|
else:
|
|
connect __enum_structural_eq_28, eq(bits(bits(extern_child.io.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_bundle_literal_expr_5.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1]
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extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1]
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output io: Ty1 @[module-XXXXXXXXXX-2.rs 2:1]
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defname = check_deduce_structural_eq_flags_extern_child
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module check_deduce_structural_eq_flags_child: @[module-XXXXXXXXXX-3.rs 1:1]
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output io: Ty1 @[module-XXXXXXXXXX-3.rs 2:1]
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connect io.opt_unit, io.opt_unit_flip @[module-XXXXXXXXXX-3.rs 4:1]
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connect io.opt_bool, io.opt_bool_flip @[module-XXXXXXXXXX-3.rs 5:1]
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connect io.opt_opt_unit, io.opt_opt_unit_flip @[module-XXXXXXXXXX-3.rs 6:1]
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connect io.array_opt_bool, io.array_opt_bool_flip @[module-XXXXXXXXXX-3.rs 7:1]
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connect io.struct_opt_bool, io.struct_opt_bool_flip @[module-XXXXXXXXXX-3.rs 8:1]
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",
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};
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}
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