64 lines
2.1 KiB
Rust
64 lines
2.1 KiB
Rust
// SPDX-License-Identifier: LGPL-3.0-or-later
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// See Notices.txt for copyright information
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use fayalite::prelude::*;
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#[hdl_module]
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fn blinky(platform_io_builder: PlatformIOBuilder<'_>) {
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let clk_input =
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platform_io_builder.peripherals_with_type::<peripherals::ClockInput>()[0].use_peripheral();
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let rst = platform_io_builder.peripherals_with_type::<Reset>()[0].use_peripheral();
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let cd = #[hdl]
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ClockDomain {
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clk: clk_input.clk,
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rst,
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};
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let max_value = (Expr::ty(clk_input).frequency() / 2.0).round_ties_even() as u64 - 1;
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let int_ty = UInt::range_inclusive(0..=max_value);
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#[hdl]
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let counter_reg: UInt = reg_builder().clock_domain(cd).reset(0u8.cast_to(int_ty));
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#[hdl]
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let output_reg: Bool = reg_builder().clock_domain(cd).reset(false);
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#[hdl]
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let rgb_output_reg = reg_builder().clock_domain(cd).reset(
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#[hdl]
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peripherals::RgbLed {
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r: false,
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g: false,
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b: false,
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},
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);
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#[hdl]
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if counter_reg.cmp_eq(max_value) {
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connect_any(counter_reg, 0u8);
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connect(output_reg, !output_reg);
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connect(rgb_output_reg.r, !rgb_output_reg.r);
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#[hdl]
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if rgb_output_reg.r {
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connect(rgb_output_reg.g, !rgb_output_reg.g);
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#[hdl]
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if rgb_output_reg.g {
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connect(rgb_output_reg.b, !rgb_output_reg.b);
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}
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}
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} else {
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connect_any(counter_reg, counter_reg + 1_hdl_u1);
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}
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for led in platform_io_builder.peripherals_with_type::<peripherals::Led>() {
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if let Ok(led) = led.try_use_peripheral() {
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connect(led.on, output_reg);
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}
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}
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for rgb_led in platform_io_builder.peripherals_with_type::<peripherals::RgbLed>() {
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if let Ok(rgb_led) = rgb_led.try_use_peripheral() {
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connect(rgb_led, rgb_output_reg);
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}
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}
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#[hdl]
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let io = m.add_platform_io(platform_io_builder);
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}
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fn main() {
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<BuildCli>::main("blinky", |_, platform, _| {
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Ok(JobParams::new(platform.wrap_main_module(blinky)))
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});
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}
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