Compare commits
2 commits
master
...
orangecrab
| Author | SHA1 | Date | |
|---|---|---|---|
|
9da113b53e | ||
|
|
ad5e7e29e9 |
48 changed files with 11136 additions and 9946 deletions
|
|
@ -16,7 +16,6 @@ jobs:
|
|||
- uses: https://git.libre-chip.org/mirrors/rust-cache@v2
|
||||
with:
|
||||
save-if: ${{ github.ref == 'refs/heads/master' }}
|
||||
- run: rustup override set 1.93.0
|
||||
- run: cargo test
|
||||
- run: cargo build --tests --features=unstable-doc
|
||||
- run: cargo test --doc --features=unstable-doc
|
||||
|
|
|
|||
6
Cargo.lock
generated
6
Cargo.lock
generated
|
|
@ -319,12 +319,10 @@ dependencies = [
|
|||
"jobslot",
|
||||
"num-bigint",
|
||||
"num-traits",
|
||||
"once_cell",
|
||||
"ordered-float",
|
||||
"petgraph",
|
||||
"serde",
|
||||
"serde_json",
|
||||
"sha2",
|
||||
"tempfile",
|
||||
"trybuild",
|
||||
"vec_map",
|
||||
|
|
@ -523,9 +521,9 @@ dependencies = [
|
|||
|
||||
[[package]]
|
||||
name = "once_cell"
|
||||
version = "1.21.3"
|
||||
version = "1.19.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d"
|
||||
checksum = "3fdb12b2476b595f9358c5161aa467c2438859caa136dec86c26fdd2efe17b92"
|
||||
|
||||
[[package]]
|
||||
name = "ordered-float"
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ edition = "2024"
|
|||
repository = "https://git.libre-chip.org/libre-chip/fayalite"
|
||||
keywords = ["hdl", "hardware", "semiconductors", "firrtl", "fpga"]
|
||||
categories = ["simulation", "development-tools", "compilers"]
|
||||
rust-version = "1.93.0"
|
||||
rust-version = "1.89.0"
|
||||
|
||||
[workspace.dependencies]
|
||||
fayalite-proc-macros = { version = "=0.3.0", path = "crates/fayalite-proc-macros" }
|
||||
|
|
@ -30,7 +30,6 @@ indexmap = { version = "2.5.0", features = ["serde"] }
|
|||
jobslot = "0.2.23"
|
||||
num-bigint = "0.4.6"
|
||||
num-traits = "0.2.16"
|
||||
once_cell = "1.21.3"
|
||||
ordered-float = { version = "5.1.0", features = ["serde"] }
|
||||
petgraph = "0.8.1"
|
||||
prettyplease = "0.2.20"
|
||||
|
|
|
|||
|
|
@ -888,7 +888,6 @@ impl ToTokens for ParsedEnum {
|
|||
#(#sim_value_from_opaque_match_arms)*
|
||||
}
|
||||
}
|
||||
#[allow(irrefutable_let_patterns)]
|
||||
fn sim_value_clone_from_opaque(
|
||||
&self,
|
||||
value: &mut <Self as ::fayalite::ty::Type>::SimValue,
|
||||
|
|
|
|||
|
|
@ -26,12 +26,10 @@ hashbrown.workspace = true
|
|||
jobslot.workspace = true
|
||||
num-bigint.workspace = true
|
||||
num-traits.workspace = true
|
||||
once_cell.workspace = true
|
||||
ordered-float.workspace = true
|
||||
petgraph.workspace = true
|
||||
serde_json.workspace = true
|
||||
serde.workspace = true
|
||||
sha2.workspace = true
|
||||
tempfile.workspace = true
|
||||
vec_map.workspace = true
|
||||
which.workspace = true
|
||||
|
|
|
|||
|
|
@ -109,42 +109,14 @@ impl<T: StaticType, Len: KnownSize> Default for ArrayType<T, Len> {
|
|||
}
|
||||
}
|
||||
|
||||
struct MakeType<T: StaticType>(Interned<T>);
|
||||
|
||||
impl<T: StaticType> From<MakeType<T>> for Interned<T> {
|
||||
fn from(value: MakeType<T>) -> Self {
|
||||
value.0
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: StaticType> Default for MakeType<T> {
|
||||
fn default() -> Self {
|
||||
Self(T::TYPE.intern_sized())
|
||||
}
|
||||
}
|
||||
|
||||
struct MakeMaskType<T: StaticType>(Interned<T::MaskType>);
|
||||
|
||||
impl<T: StaticType> From<MakeMaskType<T>> for Interned<T::MaskType> {
|
||||
fn from(value: MakeMaskType<T>) -> Self {
|
||||
value.0
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: StaticType> Default for MakeMaskType<T> {
|
||||
fn default() -> Self {
|
||||
Self(T::MASK_TYPE.intern_sized())
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: StaticType, Len: KnownSize> StaticType for ArrayType<T, Len> {
|
||||
const TYPE: Self = Self {
|
||||
element: LazyInterned::new_const::<MakeType<T>>(),
|
||||
element: LazyInterned::new_lazy(&|| T::TYPE.intern_sized()),
|
||||
len: Len::SIZE,
|
||||
type_properties: Self::TYPE_PROPERTIES,
|
||||
};
|
||||
const MASK_TYPE: Self::MaskType = ArrayType::<T::MaskType, Len> {
|
||||
element: LazyInterned::new_const::<MakeMaskType<T>>(),
|
||||
element: LazyInterned::new_lazy(&|| T::MASK_TYPE.intern_sized()),
|
||||
len: Len::SIZE,
|
||||
type_properties: Self::MASK_TYPE_PROPERTIES,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -579,8 +579,6 @@ macro_rules! make_impls {
|
|||
(#[kind(i64)] $($rest:tt)*) => {make_impls! { #[type([][] (i64))] $($rest)* }};
|
||||
(#[kind(i128)] $($rest:tt)*) => {make_impls! { #[type([][] (i128))] $($rest)* }};
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
pub(crate) use make_impls;
|
||||
|
||||
#[cfg(test)]
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ use crate::{
|
|||
value_category::ValueCategoryValue,
|
||||
},
|
||||
hdl,
|
||||
intern::{Intern, Interned, Memoize, OnceInterned},
|
||||
intern::{Intern, Interned, Memoize},
|
||||
sim::value::{SimValue, ToSimValueWithType},
|
||||
source_location::SourceLocation,
|
||||
ty::{
|
||||
|
|
@ -65,21 +65,14 @@ pub type DynSize = ConstUsize<DYN_SIZE>;
|
|||
|
||||
trait KnownSizeBaseSealed {}
|
||||
|
||||
impl<const N: usize> KnownSizeBaseSealed for ConstUsize<N> {}
|
||||
impl<const N: usize> KnownSizeBaseSealed for [(); N] {}
|
||||
|
||||
#[expect(private_bounds)]
|
||||
pub trait KnownSizeBase: KnownSizeBaseSealed + GetInternedIntCaches {}
|
||||
pub trait KnownSizeBase: KnownSizeBaseSealed {}
|
||||
|
||||
macro_rules! impl_known_size_base {
|
||||
($($size:literal),* $(,)?) => {
|
||||
$(impl KnownSizeBase for ConstUsize<$size> {})*
|
||||
$(impl GetInternedIntCaches for ConstUsize<$size> {
|
||||
#[inline(always)]
|
||||
fn get_interned_int_caches() -> &'static InternedIntCaches<Self> {
|
||||
static CACHES: InternedIntCaches<ConstUsize<$size>> = InternedIntCaches::new();
|
||||
&CACHES
|
||||
}
|
||||
})*
|
||||
$(impl KnownSizeBase for [(); $size] {})*
|
||||
};
|
||||
}
|
||||
|
||||
|
|
@ -120,34 +113,12 @@ impl_known_size_base! {
|
|||
0x200,
|
||||
}
|
||||
|
||||
trait GetInternedIntCaches {
|
||||
fn get_interned_int_caches() -> &'static InternedIntCaches<Self>
|
||||
where
|
||||
Self: KnownSize;
|
||||
}
|
||||
|
||||
struct InternedIntCaches<Width: KnownSize> {
|
||||
uint: OnceInterned<UIntType<Width>>,
|
||||
sint: OnceInterned<SIntType<Width>>,
|
||||
}
|
||||
|
||||
impl<Width: KnownSize> InternedIntCaches<Width> {
|
||||
const fn new() -> Self {
|
||||
Self {
|
||||
uint: OnceInterned::new(),
|
||||
sint: OnceInterned::new(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[expect(private_bounds)]
|
||||
pub trait KnownSize:
|
||||
GenericConstUsize
|
||||
+ sealed::SizeTypeSealed
|
||||
+ sealed::SizeSealed
|
||||
+ Default
|
||||
+ FillInDefaultedGenerics<Type = Self>
|
||||
+ GetInternedIntCaches
|
||||
{
|
||||
const SIZE: Self;
|
||||
type ArrayMatch<Element: Type>: AsRef<[Expr<Element>]>
|
||||
|
|
@ -177,7 +148,7 @@ pub trait KnownSize:
|
|||
|
||||
impl<const N: usize> KnownSize for ConstUsize<N>
|
||||
where
|
||||
ConstUsize<N>: KnownSizeBase,
|
||||
[(); N]: KnownSizeBase,
|
||||
{
|
||||
const SIZE: Self = Self;
|
||||
type ArrayMatch<Element: Type> = [Expr<Element>; N];
|
||||
|
|
@ -250,10 +221,6 @@ pub trait Size:
|
|||
fn from_usize(v: usize) -> Self::SizeType {
|
||||
Self::try_from_usize(v).expect("wrong size")
|
||||
}
|
||||
#[doc(hidden)]
|
||||
fn interned_uint(size_type: Self::SizeType) -> Interned<UIntType<Self>>;
|
||||
#[doc(hidden)]
|
||||
fn interned_sint(size_type: Self::SizeType) -> Interned<SIntType<Self>>;
|
||||
}
|
||||
|
||||
impl sealed::SizeTypeSealed for usize {}
|
||||
|
|
@ -262,8 +229,6 @@ impl SizeType for usize {
|
|||
type Size = DynSize;
|
||||
}
|
||||
|
||||
const MAX_CACHED_INT_WIDTH: usize = 1 << 10;
|
||||
|
||||
impl Size for DynSize {
|
||||
type ArrayMatch<Element: Type> = Box<[Expr<Element>]>;
|
||||
type ArraySimValue<Element: Type> = Box<[SimValue<Element>]>;
|
||||
|
|
@ -277,36 +242,6 @@ impl Size for DynSize {
|
|||
fn try_from_usize(v: usize) -> Option<Self::SizeType> {
|
||||
Some(v)
|
||||
}
|
||||
|
||||
#[doc(hidden)]
|
||||
fn interned_uint(size_type: Self::SizeType) -> Interned<UIntType<Self>> {
|
||||
static CACHED: [OnceInterned<UInt>; MAX_CACHED_INT_WIDTH] =
|
||||
[const { OnceInterned::new() }; _];
|
||||
#[cold]
|
||||
fn intern_cold(width: usize) -> Interned<UInt> {
|
||||
Intern::intern_sized(UInt::new(width))
|
||||
}
|
||||
if let Some(cached) = CACHED.get(size_type) {
|
||||
cached.get_or_init(|| intern_cold(size_type))
|
||||
} else {
|
||||
intern_cold(size_type)
|
||||
}
|
||||
}
|
||||
|
||||
#[doc(hidden)]
|
||||
fn interned_sint(size_type: Self::SizeType) -> Interned<SIntType<Self>> {
|
||||
static CACHED: [OnceInterned<SInt>; MAX_CACHED_INT_WIDTH] =
|
||||
[const { OnceInterned::new() }; _];
|
||||
#[cold]
|
||||
fn intern_cold(width: usize) -> Interned<SInt> {
|
||||
Intern::intern_sized(SInt::new(width))
|
||||
}
|
||||
if let Some(cached) = CACHED.get(size_type) {
|
||||
cached.get_or_init(|| intern_cold(size_type))
|
||||
} else {
|
||||
intern_cold(size_type)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<const VALUE: usize> sealed::SizeSealed for ConstUsize<VALUE> {}
|
||||
|
|
@ -332,20 +267,6 @@ impl<T: KnownSize> Size for T {
|
|||
fn try_from_usize(v: usize) -> Option<Self::SizeType> {
|
||||
if v == T::VALUE { Some(T::SIZE) } else { None }
|
||||
}
|
||||
|
||||
#[doc(hidden)]
|
||||
fn interned_uint(_size_type: Self::SizeType) -> Interned<UIntType<Self>> {
|
||||
T::get_interned_int_caches()
|
||||
.uint
|
||||
.get_or_init(|| UIntType::new_static().intern_sized())
|
||||
}
|
||||
|
||||
#[doc(hidden)]
|
||||
fn interned_sint(_size_type: Self::SizeType) -> Interned<SIntType<Self>> {
|
||||
T::get_interned_int_caches()
|
||||
.sint
|
||||
.get_or_init(|| SIntType::new_static().intern_sized())
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Clone, PartialEq, Eq, Debug)]
|
||||
|
|
@ -665,7 +586,7 @@ macro_rules! impl_valueless_op_forward {
|
|||
}
|
||||
|
||||
macro_rules! impl_int {
|
||||
($pretty_name:ident, $name:ident, $generic_name:ident, $value:ident, $SIGNED:literal, $interned_int:ident) => {
|
||||
($pretty_name:ident, $name:ident, $generic_name:ident, $value:ident, $SIGNED:literal) => {
|
||||
#[derive(Copy, Clone, PartialEq, Eq, Hash)]
|
||||
#[repr(transparent)]
|
||||
pub struct $name<Width: Size = DynSize> {
|
||||
|
|
@ -1082,7 +1003,7 @@ macro_rules! impl_int {
|
|||
type Output = $name<Width::Size>;
|
||||
|
||||
fn index(&self, width: Width) -> &Self::Output {
|
||||
Interned::into_inner(Width::Size::$interned_int(width))
|
||||
Interned::into_inner(Intern::intern_sized($name::new(width)))
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1263,22 +1184,8 @@ macro_rules! impl_int {
|
|||
};
|
||||
}
|
||||
|
||||
impl_int!(
|
||||
UInt,
|
||||
UIntType,
|
||||
UIntWithoutGenerics,
|
||||
UIntValue,
|
||||
false,
|
||||
interned_uint
|
||||
);
|
||||
impl_int!(
|
||||
SInt,
|
||||
SIntType,
|
||||
SIntWithoutGenerics,
|
||||
SIntValue,
|
||||
true,
|
||||
interned_sint
|
||||
);
|
||||
impl_int!(UInt, UIntType, UIntWithoutGenerics, UIntValue, false);
|
||||
impl_int!(SInt, SIntType, SIntWithoutGenerics, SIntValue, true);
|
||||
|
||||
impl UInt {
|
||||
/// gets the smallest `UInt` that fits `v` losslessly
|
||||
|
|
|
|||
|
|
@ -4,191 +4,68 @@
|
|||
use crate::{intern::type_map::TypeIdMap, util::DefaultBuildHasher};
|
||||
use bitvec::{ptr::BitPtr, slice::BitSlice, vec::BitVec};
|
||||
use hashbrown::HashTable;
|
||||
use once_cell::race::OnceRef;
|
||||
use serde::{Deserialize, Serialize};
|
||||
use std::{
|
||||
any::{Any, TypeId},
|
||||
borrow::{Borrow, Cow},
|
||||
cell::RefCell,
|
||||
cmp::Ordering,
|
||||
ffi::{OsStr, OsString},
|
||||
fmt,
|
||||
hash::{BuildHasher, Hash, Hasher},
|
||||
iter::FusedIterator,
|
||||
marker::PhantomData,
|
||||
ops::Deref,
|
||||
path::{Path, PathBuf},
|
||||
sync::RwLock,
|
||||
sync::{Mutex, RwLock},
|
||||
};
|
||||
|
||||
mod interner;
|
||||
mod type_map;
|
||||
|
||||
/// invariant: T must be zero-sized, `type_id` is unique for every possible T value.
|
||||
struct LazyInternedLazyInner<T: ?Sized + 'static> {
|
||||
type_id: TypeId,
|
||||
value: T,
|
||||
pub trait LazyInternedTrait<T: ?Sized + Send + Sync + 'static>: Send + Sync + Any {
|
||||
fn get(&self) -> Interned<T>;
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static> Hash for LazyInternedLazyInner<T> {
|
||||
fn hash<H: Hasher>(&self, state: &mut H) {
|
||||
let Self { type_id, value: _ } = self;
|
||||
type_id.hash(state);
|
||||
impl<T: ?Sized + Send + Sync + 'static, F: ?Sized + Fn() -> Interned<T> + Send + Sync + Any>
|
||||
LazyInternedTrait<T> for F
|
||||
{
|
||||
fn get(&self) -> Interned<T> {
|
||||
self()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static> PartialEq for LazyInternedLazyInner<T> {
|
||||
fn eq(&self, other: &Self) -> bool {
|
||||
let Self { type_id, value: _ } = self;
|
||||
*type_id == other.type_id
|
||||
}
|
||||
}
|
||||
#[repr(transparent)]
|
||||
pub struct LazyInternedFn<T: ?Sized + Send + Sync + 'static>(pub &'static dyn LazyInternedTrait<T>);
|
||||
|
||||
impl<T: ?Sized + 'static> Eq for LazyInternedLazyInner<T> {}
|
||||
impl<T: ?Sized + Send + Sync + 'static> Copy for LazyInternedFn<T> {}
|
||||
|
||||
impl<T: ?Sized + 'static> fmt::Debug for LazyInternedLazyInner<T> {
|
||||
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
|
||||
f.debug_struct("LazyInternedLazyInner")
|
||||
.finish_non_exhaustive()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static> LazyInternedLazyInner<T> {
|
||||
const fn new(value: T) -> Self
|
||||
where
|
||||
T: Sized,
|
||||
{
|
||||
const { assert!(size_of::<T>() == 0) };
|
||||
Self {
|
||||
type_id: TypeId::of::<T>(),
|
||||
value,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub struct LazyInternedLazy<T: ?Sized + Send + Sync + 'static>(
|
||||
&'static LazyInternedLazyInner<dyn Fn() -> Interned<T> + Send + Sync>,
|
||||
);
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> LazyInternedLazy<T> {
|
||||
pub const fn new_const<V: Default + Into<Interned<T>>>() -> Self {
|
||||
Self(&const { LazyInternedLazyInner::new(|| V::default().into()) })
|
||||
}
|
||||
pub const fn new_const_default() -> Self
|
||||
where
|
||||
Interned<T>: Default,
|
||||
{
|
||||
Self::new_const::<Interned<T>>()
|
||||
}
|
||||
pub fn interned(self) -> Interned<T> {
|
||||
struct Map(hashbrown::HashTable<(TypeId, &'static (dyn Any + Send + Sync))>);
|
||||
impl Map {
|
||||
const EMPTY: Self = Self(hashbrown::HashTable::new());
|
||||
fn get<T: ?Sized + Send + Sync + 'static>(
|
||||
&self,
|
||||
lazy_interned_lazy: LazyInternedLazy<T>,
|
||||
hash: u64,
|
||||
) -> Option<&'static Interned<T>> {
|
||||
let &(_, v) = self.0.find(hash, |v| v.0 == lazy_interned_lazy.0.type_id)?;
|
||||
let Some(retval) = v.downcast_ref::<Interned<T>>() else {
|
||||
unreachable!();
|
||||
};
|
||||
Some(retval)
|
||||
}
|
||||
fn get_or_insert<T: ?Sized + Send + Sync + 'static>(
|
||||
&mut self,
|
||||
lazy_interned_lazy: LazyInternedLazy<T>,
|
||||
hash: u64,
|
||||
v: &'static Interned<T>,
|
||||
) -> &'static Interned<T> {
|
||||
let entry = self
|
||||
.0
|
||||
.entry(
|
||||
hash,
|
||||
|&(k, _)| k == lazy_interned_lazy.0.type_id,
|
||||
|&(k, _)| type_map::TypeIdBuildHasher.hash_one(k),
|
||||
)
|
||||
.or_insert_with(|| (lazy_interned_lazy.0.type_id, v));
|
||||
let &(_, v) = entry.get();
|
||||
let Some(retval) = v.downcast_ref::<Interned<T>>() else {
|
||||
unreachable!();
|
||||
};
|
||||
retval
|
||||
}
|
||||
}
|
||||
static GLOBAL_CACHE: RwLock<Map> = RwLock::new(Map::EMPTY);
|
||||
#[cold]
|
||||
fn insert_in_thread_local_cache<T: ?Sized + Send + Sync + 'static>(
|
||||
cache: &RefCell<Map>,
|
||||
this: LazyInternedLazy<T>,
|
||||
hash: u64,
|
||||
) -> Interned<T> {
|
||||
let read_lock = GLOBAL_CACHE.read().unwrap();
|
||||
let v = read_lock.get(this, hash);
|
||||
drop(read_lock);
|
||||
let v = v.unwrap_or_else(|| {
|
||||
let v = Box::leak(Box::new((this.0.value)()));
|
||||
GLOBAL_CACHE.write().unwrap().get_or_insert(this, hash, v)
|
||||
});
|
||||
*cache.borrow_mut().get_or_insert(this, hash, v)
|
||||
}
|
||||
thread_local! {
|
||||
static THREAD_LOCAL_CACHE: RefCell<Map> = const { RefCell::new(Map::EMPTY) };
|
||||
}
|
||||
let hash = type_map::TypeIdBuildHasher.hash_one(self.0.type_id);
|
||||
THREAD_LOCAL_CACHE.with(|cache| {
|
||||
let borrow = cache.borrow();
|
||||
if let Some(v) = borrow.get(self, hash) {
|
||||
*v
|
||||
} else {
|
||||
drop(borrow);
|
||||
insert_in_thread_local_cache(cache, self, hash)
|
||||
}
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> Copy for LazyInternedLazy<T> {}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> Clone for LazyInternedLazy<T> {
|
||||
impl<T: ?Sized + Send + Sync + 'static> Clone for LazyInternedFn<T> {
|
||||
fn clone(&self) -> Self {
|
||||
*self
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> Hash for LazyInternedLazy<T> {
|
||||
impl<T: ?Sized + Send + Sync + 'static> Hash for LazyInternedFn<T> {
|
||||
fn hash<H: Hasher>(&self, state: &mut H) {
|
||||
self.0.hash(state);
|
||||
self.0.get_ptr_eq_with_type_id().hash(state);
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> Eq for LazyInternedLazy<T> {}
|
||||
impl<T: ?Sized + Send + Sync + 'static> Eq for LazyInternedFn<T> {}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> PartialEq for LazyInternedLazy<T> {
|
||||
impl<T: ?Sized + Send + Sync + 'static> PartialEq for LazyInternedFn<T> {
|
||||
fn eq(&self, other: &Self) -> bool {
|
||||
self.0 == other.0
|
||||
self.0.get_ptr_eq_with_type_id() == other.0.get_ptr_eq_with_type_id()
|
||||
}
|
||||
}
|
||||
|
||||
pub enum LazyInterned<T: ?Sized + Send + Sync + 'static> {
|
||||
Interned(Interned<T>),
|
||||
Lazy(LazyInternedLazy<T>),
|
||||
Lazy(LazyInternedFn<T>),
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Send + Sync + 'static> LazyInterned<T> {
|
||||
pub const fn new_const<V: Default + Into<Interned<T>>>() -> Self {
|
||||
Self::Lazy(LazyInternedLazy::new_const::<V>())
|
||||
}
|
||||
pub const fn new_const_default() -> Self
|
||||
where
|
||||
Interned<T>: Default,
|
||||
{
|
||||
Self::new_const::<Interned<T>>()
|
||||
}
|
||||
pub fn interned(self) -> Interned<T> {
|
||||
match self {
|
||||
Self::Interned(retval) => retval,
|
||||
Self::Lazy(retval) => retval.interned(),
|
||||
}
|
||||
pub const fn new_lazy(v: &'static dyn LazyInternedTrait<T>) -> Self {
|
||||
Self::Lazy(LazyInternedFn(v))
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -200,7 +77,7 @@ impl<T: ?Sized + Sync + Send + 'static> Clone for LazyInterned<T> {
|
|||
|
||||
impl<T: ?Sized + Sync + Send + 'static> Copy for LazyInterned<T> {}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> Deref for LazyInterned<T> {
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> Deref for LazyInterned<T> {
|
||||
type Target = T;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
|
|
@ -208,9 +85,9 @@ impl<T: ?Sized + Sync + Send + 'static> Deref for LazyInterned<T> {
|
|||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> Eq for LazyInterned<T> where Interned<T>: Eq {}
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> Eq for LazyInterned<T> where Interned<T>: Eq {}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> PartialEq for LazyInterned<T>
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> PartialEq for LazyInterned<T>
|
||||
where
|
||||
Interned<T>: PartialEq,
|
||||
{
|
||||
|
|
@ -219,7 +96,7 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> Ord for LazyInterned<T>
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> Ord for LazyInterned<T>
|
||||
where
|
||||
Interned<T>: Ord,
|
||||
{
|
||||
|
|
@ -228,7 +105,7 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> PartialOrd for LazyInterned<T>
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> PartialOrd for LazyInterned<T>
|
||||
where
|
||||
Interned<T>: PartialOrd,
|
||||
{
|
||||
|
|
@ -237,7 +114,7 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> Hash for LazyInterned<T>
|
||||
impl<T: ?Sized + Sync + Send + 'static + Intern> Hash for LazyInterned<T>
|
||||
where
|
||||
Interned<T>: Hash,
|
||||
{
|
||||
|
|
@ -246,6 +123,77 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Sync + Send + 'static> LazyInterned<T> {
|
||||
pub fn interned(self) -> Interned<T>
|
||||
where
|
||||
T: Intern,
|
||||
{
|
||||
struct MemoizeInterned<T: ?Sized + Intern>(PhantomData<T>);
|
||||
|
||||
impl<T: ?Sized + Intern> Hash for MemoizeInterned<T> {
|
||||
fn hash<H: Hasher>(&self, _state: &mut H) {}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Intern> PartialEq for MemoizeInterned<T> {
|
||||
fn eq(&self, _other: &Self) -> bool {
|
||||
true
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Intern> Eq for MemoizeInterned<T> {}
|
||||
|
||||
impl<T: ?Sized + Intern> Clone for MemoizeInterned<T> {
|
||||
fn clone(&self) -> Self {
|
||||
*self
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + Intern> Copy for MemoizeInterned<T> {}
|
||||
|
||||
impl<T: ?Sized + Intern> MemoizeGeneric for MemoizeInterned<T> {
|
||||
type InputRef<'a> = LazyInternedFn<T>;
|
||||
|
||||
type InputOwned = LazyInternedFn<T>;
|
||||
|
||||
type InputCow<'a> = LazyInternedFn<T>;
|
||||
|
||||
type Output = Interned<T>;
|
||||
|
||||
fn input_eq(a: Self::InputRef<'_>, b: Self::InputRef<'_>) -> bool {
|
||||
a == b
|
||||
}
|
||||
|
||||
fn input_borrow(input: &Self::InputOwned) -> Self::InputRef<'_> {
|
||||
*input
|
||||
}
|
||||
|
||||
fn input_cow_into_owned(input: Self::InputCow<'_>) -> Self::InputOwned {
|
||||
input
|
||||
}
|
||||
|
||||
fn input_cow_borrow<'a>(input: &'a Self::InputCow<'_>) -> Self::InputRef<'a> {
|
||||
*input
|
||||
}
|
||||
|
||||
fn input_cow_from_owned<'a>(input: Self::InputOwned) -> Self::InputCow<'a> {
|
||||
input
|
||||
}
|
||||
|
||||
fn input_cow_from_ref(input: Self::InputRef<'_>) -> Self::InputCow<'_> {
|
||||
input
|
||||
}
|
||||
|
||||
fn inner(self, input: Self::InputRef<'_>) -> Self::Output {
|
||||
input.0.get()
|
||||
}
|
||||
}
|
||||
match self {
|
||||
Self::Interned(retval) => retval,
|
||||
Self::Lazy(retval) => MemoizeInterned(PhantomData).get(retval),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub trait InternedCompare {
|
||||
type InternedCompareKey: Ord + Hash;
|
||||
fn interned_compare_key_ref(this: &Self) -> Self::InternedCompareKey;
|
||||
|
|
@ -645,6 +593,71 @@ impl<T: ?Sized + 'static + Send + Sync + ToOwned> From<Interned<T>> for Cow<'_,
|
|||
}
|
||||
}
|
||||
|
||||
struct InternerState<T: ?Sized + 'static + Send + Sync> {
|
||||
table: HashTable<&'static T>,
|
||||
hasher: DefaultBuildHasher,
|
||||
}
|
||||
|
||||
pub struct Interner<T: ?Sized + 'static + Send + Sync> {
|
||||
state: Mutex<InternerState<T>>,
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync> Interner<T> {
|
||||
fn get() -> &'static Interner<T> {
|
||||
static TYPE_ID_MAP: TypeIdMap = TypeIdMap::new();
|
||||
TYPE_ID_MAP.get_or_insert_default()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync> Default for Interner<T> {
|
||||
fn default() -> Self {
|
||||
Self {
|
||||
state: Mutex::new(InternerState {
|
||||
table: HashTable::new(),
|
||||
hasher: Default::default(),
|
||||
}),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync + Hash + Eq + ToOwned> Interner<T> {
|
||||
fn intern<F: FnOnce(Cow<'_, T>) -> &'static T>(
|
||||
&self,
|
||||
alloc: F,
|
||||
value: Cow<'_, T>,
|
||||
) -> Interned<T> {
|
||||
let mut state = self.state.lock().unwrap();
|
||||
let InternerState { table, hasher } = &mut *state;
|
||||
let inner = *table
|
||||
.entry(
|
||||
hasher.hash_one(&*value),
|
||||
|k| **k == *value,
|
||||
|k| hasher.hash_one(&**k),
|
||||
)
|
||||
.or_insert_with(|| alloc(value))
|
||||
.get();
|
||||
Interned { inner }
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Clone + 'static + Send + Sync + Hash + Eq> Interner<T> {
|
||||
fn intern_sized(&self, value: Cow<'_, T>) -> Interned<T> {
|
||||
self.intern(|value| Box::leak(Box::new(value.into_owned())), value)
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Clone + 'static + Send + Sync + Hash + Eq> Interner<[T]> {
|
||||
fn intern_slice(&self, value: Cow<'_, [T]>) -> Interned<[T]> {
|
||||
self.intern(|value| value.into_owned().leak(), value)
|
||||
}
|
||||
}
|
||||
|
||||
impl Interner<BitSlice> {
|
||||
fn intern_bit_slice(&self, value: Cow<'_, BitSlice>) -> Interned<BitSlice> {
|
||||
self.intern(|value| value.into_owned().leak(), value)
|
||||
}
|
||||
}
|
||||
|
||||
pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
inner: &'static T,
|
||||
}
|
||||
|
|
@ -964,7 +977,7 @@ impl<T: Clone + Send + Sync + 'static + Hash + Eq> Intern for T {
|
|||
where
|
||||
Self: ToOwned,
|
||||
{
|
||||
interner::Interner::get().intern_sized(this)
|
||||
Interner::get().intern_sized(this)
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -984,7 +997,7 @@ impl<T: Clone + Send + Sync + 'static + Hash + Eq> Intern for [T] {
|
|||
where
|
||||
Self: ToOwned,
|
||||
{
|
||||
interner::Interner::get().intern_slice(this)
|
||||
Interner::get().intern_slice(this)
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1004,7 +1017,7 @@ impl Intern for BitSlice {
|
|||
where
|
||||
Self: ToOwned,
|
||||
{
|
||||
interner::Interner::get().intern_bit_slice(this)
|
||||
Interner::get().intern_bit_slice(this)
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1022,17 +1035,10 @@ pub trait MemoizeGeneric: 'static + Send + Sync + Hash + Eq + Copy {
|
|||
fn inner(self, input: Self::InputRef<'_>) -> Self::Output;
|
||||
fn get_cow(self, input: Self::InputCow<'_>) -> Self::Output {
|
||||
static TYPE_ID_MAP: TypeIdMap = TypeIdMap::new();
|
||||
thread_local! {
|
||||
static TYPE_ID_MAP_CACHE: TypeIdMap = const { TypeIdMap::new() };
|
||||
}
|
||||
let map: &RwLock<(
|
||||
DefaultBuildHasher,
|
||||
HashTable<(Self, Self::InputOwned, Self::Output)>,
|
||||
)> = TYPE_ID_MAP_CACHE.with(|cache| {
|
||||
cache.get_or_insert_with(|| {
|
||||
TYPE_ID_MAP.get_or_insert_with(|| Box::leak(Default::default()))
|
||||
})
|
||||
});
|
||||
)> = TYPE_ID_MAP.get_or_insert_default();
|
||||
fn hash_eq_key<'a, 'b, T: MemoizeGeneric>(
|
||||
this: &'a T,
|
||||
input: T::InputRef<'b>,
|
||||
|
|
@ -1134,35 +1140,3 @@ pub trait Memoize: 'static + Send + Sync + Hash + Eq + Copy {
|
|||
self.get_cow(Cow::Borrowed(input))
|
||||
}
|
||||
}
|
||||
|
||||
/// like `once_cell::race::OnceBox` but for `Interned<T>` instead of `Box<T>`
|
||||
pub struct OnceInterned<T: 'static + Send + Sync>(OnceRef<'static, T>);
|
||||
|
||||
impl<T: 'static + Send + Sync + fmt::Debug> fmt::Debug for OnceInterned<T> {
|
||||
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
|
||||
f.debug_tuple("OnceInterned").field(&self.get()).finish()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: 'static + Send + Sync> Default for OnceInterned<T> {
|
||||
fn default() -> Self {
|
||||
Self::new()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: 'static + Send + Sync> OnceInterned<T> {
|
||||
pub const fn new() -> Self {
|
||||
Self(OnceRef::new())
|
||||
}
|
||||
pub fn set(&self, v: Interned<T>) -> Result<(), ()> {
|
||||
self.0.set(v.inner)
|
||||
}
|
||||
pub fn get(&self) -> Option<Interned<T>> {
|
||||
self.0.get().map(|inner| Interned { inner })
|
||||
}
|
||||
pub fn get_or_init<F: FnOnce() -> Interned<T>>(&self, f: F) -> Interned<T> {
|
||||
Interned {
|
||||
inner: self.0.get_or_init(|| f().inner),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,117 +0,0 @@
|
|||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
// See Notices.txt for copyright information
|
||||
|
||||
use crate::{
|
||||
intern::{Interned, type_map::TypeIdMap},
|
||||
util::DefaultBuildHasher,
|
||||
};
|
||||
use bitvec::slice::BitSlice;
|
||||
use hashbrown::HashTable;
|
||||
use std::{
|
||||
borrow::Cow,
|
||||
hash::{BuildHasher, Hash},
|
||||
sync::RwLock,
|
||||
};
|
||||
|
||||
struct InternerShard<T: ?Sized + 'static + Send + Sync> {
|
||||
table: HashTable<&'static T>,
|
||||
}
|
||||
|
||||
const LOG2_SHARD_COUNT: u32 = 6;
|
||||
|
||||
fn shard_index_from_hash(hash: u64) -> usize {
|
||||
// number of bits used for hashbrown's Tag
|
||||
const HASH_BROWN_TAG_BITS: u32 = 7;
|
||||
// try to extract bits of the hash that hashbrown isn't using,
|
||||
// while accounting for some hash functions only returning `usize` bits.
|
||||
const SHARD_INDEX_START: u32 = usize::BITS
|
||||
.saturating_sub(HASH_BROWN_TAG_BITS)
|
||||
.saturating_sub(LOG2_SHARD_COUNT);
|
||||
let mut shard_index = hash >> SHARD_INDEX_START;
|
||||
shard_index %= 1 << LOG2_SHARD_COUNT;
|
||||
shard_index as usize
|
||||
}
|
||||
|
||||
pub(crate) struct Interner<T: ?Sized + 'static + Send + Sync> {
|
||||
shards: [RwLock<InternerShard<T>>; 1 << LOG2_SHARD_COUNT],
|
||||
hasher: DefaultBuildHasher,
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync> Interner<T> {
|
||||
pub(crate) fn get() -> &'static Interner<T> {
|
||||
static TYPE_ID_MAP: TypeIdMap = TypeIdMap::new();
|
||||
thread_local! {
|
||||
static TYPE_ID_MAP_CACHE: TypeIdMap = const { TypeIdMap::new() };
|
||||
}
|
||||
TYPE_ID_MAP_CACHE.with(|cache| {
|
||||
cache.get_or_insert_with(|| {
|
||||
TYPE_ID_MAP.get_or_insert_with(|| Box::leak(Default::default()))
|
||||
})
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync> Default for Interner<T> {
|
||||
fn default() -> Self {
|
||||
Self {
|
||||
shards: [const {
|
||||
RwLock::new(InternerShard {
|
||||
table: HashTable::new(),
|
||||
})
|
||||
}; _],
|
||||
hasher: Default::default(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: ?Sized + 'static + Send + Sync + Hash + Eq + ToOwned> Interner<T> {
|
||||
fn intern<F: FnOnce(Cow<'_, T>) -> &'static T>(
|
||||
&self,
|
||||
alloc: F,
|
||||
value: Cow<'_, T>,
|
||||
) -> Interned<T> {
|
||||
let hash = self.hasher.hash_one(&*value);
|
||||
let shard_index = shard_index_from_hash(hash);
|
||||
let shard = &self.shards[shard_index];
|
||||
let shard_read = shard.read().unwrap();
|
||||
let Some(&inner) = shard_read.table.find(hash, |k| **k == *value) else {
|
||||
drop(shard_read);
|
||||
return self.intern_cold(alloc, value, hash, shard);
|
||||
};
|
||||
Interned { inner }
|
||||
}
|
||||
#[cold]
|
||||
fn intern_cold<F: FnOnce(Cow<'_, T>) -> &'static T>(
|
||||
&self,
|
||||
alloc: F,
|
||||
value: Cow<'_, T>,
|
||||
hash: u64,
|
||||
shard: &RwLock<InternerShard<T>>,
|
||||
) -> Interned<T> {
|
||||
let mut shard = shard.write().unwrap();
|
||||
let inner = *shard
|
||||
.table
|
||||
.entry(hash, |k| **k == *value, |k| self.hasher.hash_one(&**k))
|
||||
.or_insert_with(|| alloc(value))
|
||||
.get();
|
||||
Interned { inner }
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Clone + 'static + Send + Sync + Hash + Eq> Interner<T> {
|
||||
pub(crate) fn intern_sized(&self, value: Cow<'_, T>) -> Interned<T> {
|
||||
self.intern(|value| Box::leak(Box::new(value.into_owned())), value)
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Clone + 'static + Send + Sync + Hash + Eq> Interner<[T]> {
|
||||
pub(crate) fn intern_slice(&self, value: Cow<'_, [T]>) -> Interned<[T]> {
|
||||
self.intern(|value| value.into_owned().leak(), value)
|
||||
}
|
||||
}
|
||||
|
||||
impl Interner<BitSlice> {
|
||||
pub(crate) fn intern_bit_slice(&self, value: Cow<'_, BitSlice>) -> Interned<BitSlice> {
|
||||
self.intern(|value| value.into_owned().leak(), value)
|
||||
}
|
||||
}
|
||||
|
|
@ -6,7 +6,7 @@ use std::{
|
|||
sync::RwLock,
|
||||
};
|
||||
|
||||
pub(crate) struct TypeIdHasher(u64);
|
||||
struct TypeIdHasher(u64);
|
||||
|
||||
// assumes TypeId has at least 64 bits that is a good hash
|
||||
impl Hasher for TypeIdHasher {
|
||||
|
|
@ -63,7 +63,7 @@ impl Hasher for TypeIdHasher {
|
|||
}
|
||||
}
|
||||
|
||||
pub(crate) struct TypeIdBuildHasher;
|
||||
struct TypeIdBuildHasher;
|
||||
|
||||
impl BuildHasher for TypeIdBuildHasher {
|
||||
type Hasher = TypeIdHasher;
|
||||
|
|
@ -87,23 +87,20 @@ impl TypeIdMap {
|
|||
fn insert_slow(
|
||||
&self,
|
||||
type_id: TypeId,
|
||||
make: impl FnOnce() -> &'static (dyn Any + Sync + Send),
|
||||
make: fn() -> Box<dyn Any + Sync + Send>,
|
||||
) -> &'static (dyn Any + Sync + Send) {
|
||||
let value = make();
|
||||
let value = Box::leak(make());
|
||||
let mut write_guard = self.0.write().unwrap();
|
||||
*write_guard.entry(type_id).or_insert(value)
|
||||
}
|
||||
pub(crate) fn get_or_insert_with<T: Sized + Any + Send + Sync>(
|
||||
&self,
|
||||
make: impl FnOnce() -> &'static T,
|
||||
) -> &'static T {
|
||||
pub(crate) fn get_or_insert_default<T: Sized + Any + Send + Sync + Default>(&self) -> &T {
|
||||
let type_id = TypeId::of::<T>();
|
||||
let read_guard = self.0.read().unwrap();
|
||||
let retval = read_guard.get(&type_id).map(|v| *v);
|
||||
drop(read_guard);
|
||||
let retval = match retval {
|
||||
Some(retval) => retval,
|
||||
None => self.insert_slow(type_id, move || make()),
|
||||
None => self.insert_slow(type_id, move || Box::new(T::default())),
|
||||
};
|
||||
retval.downcast_ref().expect("known to have correct TypeId")
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
use crate::{
|
||||
expr::{Expr, HdlPartialEqImpl, HdlPartialOrdImpl, ToExpr, ValueType},
|
||||
int::Bool,
|
||||
intern::{Intern, Interned, InternedCompare, LazyInterned, Memoize},
|
||||
intern::{Intern, Interned, InternedCompare, LazyInterned, LazyInternedTrait, Memoize},
|
||||
sim::value::{SimValue, ToSimValue, ToSimValueWithType},
|
||||
source_location::SourceLocation,
|
||||
ty::{
|
||||
|
|
@ -240,17 +240,11 @@ impl<T: ?Sized + PhantomConstValue> PhantomConst<T> {
|
|||
{
|
||||
Self::new_interned(value.intern_deref())
|
||||
}
|
||||
pub const fn new_const<V: Default + Into<Interned<T>>>() -> Self {
|
||||
pub const fn new_lazy(v: &'static dyn LazyInternedTrait<T>) -> Self {
|
||||
Self {
|
||||
value: LazyInterned::new_const::<V>(),
|
||||
value: LazyInterned::new_lazy(v),
|
||||
}
|
||||
}
|
||||
pub const fn new_const_default() -> Self
|
||||
where
|
||||
Interned<T>: Default,
|
||||
{
|
||||
Self::new_const::<Interned<T>>()
|
||||
}
|
||||
pub fn get(self) -> Interned<T> {
|
||||
self.value.interned()
|
||||
}
|
||||
|
|
@ -340,7 +334,9 @@ impl<T: ?Sized + PhantomConstValue> StaticType for PhantomConst<T>
|
|||
where
|
||||
Interned<T>: Default,
|
||||
{
|
||||
const TYPE: Self = Self::new_const_default();
|
||||
const TYPE: Self = PhantomConst {
|
||||
value: LazyInterned::new_lazy(&Interned::<T>::default),
|
||||
};
|
||||
const MASK_TYPE: Self::MaskType = ();
|
||||
const TYPE_PROPERTIES: TypeProperties = <()>::TYPE_PROPERTIES;
|
||||
const MASK_TYPE_PROPERTIES: TypeProperties = <()>::TYPE_PROPERTIES;
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ use crate::{
|
|||
OpaqueSimValue, OpaqueSimValueSize, OpaqueSimValueSizeRange, OpaqueSimValueSlice,
|
||||
OpaqueSimValueWriter,
|
||||
},
|
||||
util::{BitSliceWriteWithBase, DebugAsDisplay, HashMap, HashSet, copy_le_bytes_to_bitslice},
|
||||
util::{BitSliceWriteWithBase, DebugAsDisplay, HashMap, HashSet},
|
||||
};
|
||||
use bitvec::{bits, order::Lsb0, slice::BitSlice, vec::BitVec, view::BitView};
|
||||
use num_bigint::BigInt;
|
||||
|
|
@ -2198,11 +2198,14 @@ impl SimulationImpl {
|
|||
SimTraceKind::BigUInt { index, ty: _ } | SimTraceKind::BigSInt { index, ty: _ } => {
|
||||
let state = state.unwrap_bits_mut();
|
||||
let bigint = &self.state.big_slots[index];
|
||||
copy_le_bytes_to_bitslice(
|
||||
state,
|
||||
&bigint.to_signed_bytes_le(),
|
||||
bigint.is_negative(),
|
||||
let mut bytes = bigint.to_signed_bytes_le();
|
||||
bytes.resize(
|
||||
state.len().div_ceil(8),
|
||||
if bigint.is_negative() { 0xFF } else { 0 },
|
||||
);
|
||||
let bitslice = BitSlice::<u8, Lsb0>::from_slice(&bytes);
|
||||
let bitslice = &bitslice[..state.len()];
|
||||
state.clone_from_bitslice(bitslice);
|
||||
}
|
||||
SimTraceKind::BigBool { index }
|
||||
| SimTraceKind::BigAsyncReset { index }
|
||||
|
|
|
|||
|
|
@ -21,30 +21,14 @@ use crate::{
|
|||
};
|
||||
use bitvec::{order::Lsb0, slice::BitSlice};
|
||||
use hashbrown::hash_map::Entry;
|
||||
use sha2::{Digest, Sha256};
|
||||
use std::{
|
||||
collections::BTreeMap,
|
||||
fmt::{self, Write as _},
|
||||
io, mem,
|
||||
};
|
||||
|
||||
#[derive(Default, Clone)]
|
||||
struct PathHash(Sha256);
|
||||
|
||||
impl PathHash {
|
||||
fn joined(mut self, segment: impl AsRef<[u8]>) -> Self {
|
||||
let segment = segment.as_ref();
|
||||
self.0.update(u32::to_le_bytes(
|
||||
segment.len().try_into().expect("path segment is too big"),
|
||||
));
|
||||
self.0.update(segment);
|
||||
self
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Default)]
|
||||
struct Scope {
|
||||
last_inserted: HashMap<Interned<str>, usize>,
|
||||
path_hash: PathHash,
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
|
|
@ -77,13 +61,6 @@ impl fmt::Display for VerilogIdentifier {
|
|||
}
|
||||
|
||||
impl Scope {
|
||||
fn new(path_hash: PathHash) -> Self {
|
||||
Self {
|
||||
last_inserted: Default::default(),
|
||||
path_hash,
|
||||
}
|
||||
}
|
||||
|
||||
fn new_identifier(&mut self, unescaped_name: Interned<str>) -> VerilogIdentifier {
|
||||
let next_disambiguator = match self.last_inserted.entry(unescaped_name) {
|
||||
Entry::Vacant(entry) => {
|
||||
|
|
@ -194,10 +171,12 @@ fn write_vcd_scope<W: io::Write, R>(
|
|||
scope: &mut Scope,
|
||||
f: impl FnOnce(&mut W, &mut Scope) -> io::Result<R>,
|
||||
) -> io::Result<R> {
|
||||
let path_hash = scope.path_hash.clone().joined(scope_name);
|
||||
let scope_name = scope.new_identifier(scope_name);
|
||||
writeln!(writer, "$scope {scope_type} {scope_name} $end")?;
|
||||
let retval = f(writer, &mut Scope::new(path_hash))?;
|
||||
writeln!(
|
||||
writer,
|
||||
"$scope {scope_type} {} $end",
|
||||
scope.new_identifier(scope_name),
|
||||
)?;
|
||||
let retval = f(writer, &mut Scope::default())?;
|
||||
writeln!(writer, "$upscope $end")?;
|
||||
Ok(retval)
|
||||
}
|
||||
|
|
@ -312,75 +291,19 @@ impl WriteTrace for TraceScalar {
|
|||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
|
||||
#[repr(transparent)]
|
||||
struct VcdId(u64);
|
||||
|
||||
impl VcdId {
|
||||
const CHAR_RANGE: std::ops::RangeInclusive<u8> = b'!'..=b'~';
|
||||
const BASE: u8 = *Self::CHAR_RANGE.end() - *Self::CHAR_RANGE.start() + 1;
|
||||
const LOW_HALF_CHARS: u32 = 5;
|
||||
const LOW_HALF_MODULUS: u64 = (Self::BASE as u64).pow(Self::LOW_HALF_CHARS);
|
||||
|
||||
const fn from_str(s: &str) -> Option<Self> {
|
||||
if s.is_empty() {
|
||||
return None;
|
||||
fn write_vcd_id<W: io::Write>(writer: &mut W, mut id: usize) -> io::Result<()> {
|
||||
let min_char = b'!';
|
||||
let max_char = b'~';
|
||||
let base = (max_char - min_char + 1) as usize;
|
||||
loop {
|
||||
let digit = (id % base) as u8 + min_char;
|
||||
id /= base;
|
||||
writer.write_all(&[digit])?;
|
||||
if id == 0 {
|
||||
break;
|
||||
}
|
||||
let mut retval = 0u64;
|
||||
let mut bytes = s.as_bytes();
|
||||
while let [ref rest @ .., digit] = *bytes {
|
||||
bytes = rest;
|
||||
let Some(digit) = digit.checked_sub(*Self::CHAR_RANGE.start()) else {
|
||||
return None;
|
||||
};
|
||||
if digit >= Self::BASE {
|
||||
return None;
|
||||
}
|
||||
let Some(v) = retval.checked_mul(Self::BASE as _) else {
|
||||
return None;
|
||||
};
|
||||
let Some(v) = v.checked_add(digit as _) else {
|
||||
return None;
|
||||
};
|
||||
retval = v;
|
||||
}
|
||||
Some(Self(retval))
|
||||
}
|
||||
#[must_use]
|
||||
const fn write(self, out: &mut [u8]) -> usize {
|
||||
let mut id = self.0;
|
||||
let mut len = 0;
|
||||
loop {
|
||||
let digit = (id % Self::BASE as u64) as u8 + *Self::CHAR_RANGE.start();
|
||||
id /= Self::BASE as u64;
|
||||
if len < out.len() {
|
||||
out[len] = digit;
|
||||
}
|
||||
len += 1;
|
||||
if id == 0 {
|
||||
break;
|
||||
}
|
||||
}
|
||||
len
|
||||
}
|
||||
const MAX_ID_LEN: usize = Self(u64::MAX).write(&mut []);
|
||||
}
|
||||
|
||||
/// check that VcdId properly round-trips
|
||||
const _: () = {
|
||||
let s = "RoundTrip";
|
||||
let Some(id) = VcdId::from_str(s) else {
|
||||
unreachable!();
|
||||
};
|
||||
let mut buf = [0u8; VcdId::MAX_ID_LEN];
|
||||
let len = id.write(&mut buf);
|
||||
assert!(crate::util::const_bytes_cmp(buf.split_at(len).0, s.as_bytes()).is_eq());
|
||||
};
|
||||
|
||||
fn write_vcd_id<W: io::Write>(writer: &mut W, id: VcdId) -> io::Result<()> {
|
||||
let mut buf = [0u8; VcdId::MAX_ID_LEN];
|
||||
let len = id.write(&mut buf);
|
||||
writer.write_all(&buf[..len])
|
||||
Ok(())
|
||||
}
|
||||
|
||||
struct Escaped<T: fmt::Display>(T);
|
||||
|
|
@ -423,16 +346,13 @@ impl<T: fmt::Display> fmt::Display for Escaped<T> {
|
|||
|
||||
fn write_vcd_var<W: io::Write>(
|
||||
properties: &mut VcdWriterProperties,
|
||||
scope: &mut Scope,
|
||||
memory_element_part_body: MemoryElementPartBody,
|
||||
writer: &mut W,
|
||||
var_type: &str,
|
||||
size: usize,
|
||||
location: TraceLocation,
|
||||
name: Interned<str>,
|
||||
name: VerilogIdentifier,
|
||||
) -> io::Result<()> {
|
||||
let path_hash = scope.path_hash.clone().joined(name);
|
||||
let name = scope.new_identifier(name);
|
||||
let id = match location {
|
||||
TraceLocation::Scalar(id) => id.as_usize(),
|
||||
TraceLocation::Memory(TraceMemoryLocation {
|
||||
|
|
@ -464,9 +384,6 @@ fn write_vcd_var<W: io::Write>(
|
|||
first_id + *element_index
|
||||
}
|
||||
};
|
||||
let id = properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.builder_get_or_insert(id, &path_hash);
|
||||
write!(writer, "$var {var_type} {size} ")?;
|
||||
write_vcd_id(writer, id)?;
|
||||
writeln!(writer, " {name} $end")
|
||||
|
|
@ -497,13 +414,12 @@ impl WriteTrace for TraceUInt {
|
|||
}
|
||||
write_vcd_var(
|
||||
properties,
|
||||
scope,
|
||||
MemoryElementPartBody::Scalar,
|
||||
writer,
|
||||
var_type,
|
||||
ty.width(),
|
||||
location,
|
||||
name,
|
||||
scope.new_identifier(name),
|
||||
)
|
||||
}
|
||||
}
|
||||
|
|
@ -578,13 +494,12 @@ impl WriteTrace for TraceEnumDiscriminant {
|
|||
} = self;
|
||||
write_vcd_var(
|
||||
properties,
|
||||
scope,
|
||||
MemoryElementPartBody::EnumDiscriminant { ty },
|
||||
writer,
|
||||
"string",
|
||||
1,
|
||||
location,
|
||||
name,
|
||||
scope.new_identifier(name),
|
||||
)
|
||||
}
|
||||
}
|
||||
|
|
@ -654,13 +569,12 @@ impl WriteTrace for TracePhantomConst {
|
|||
} = self;
|
||||
write_vcd_var(
|
||||
properties,
|
||||
scope,
|
||||
MemoryElementPartBody::Scalar,
|
||||
writer,
|
||||
"string",
|
||||
1,
|
||||
location,
|
||||
name,
|
||||
scope.new_identifier(name),
|
||||
)
|
||||
}
|
||||
}
|
||||
|
|
@ -682,13 +596,12 @@ impl WriteTrace for TraceSimOnly {
|
|||
} = self;
|
||||
write_vcd_var(
|
||||
properties,
|
||||
scope,
|
||||
MemoryElementPartBody::Scalar,
|
||||
writer,
|
||||
"string",
|
||||
1,
|
||||
location,
|
||||
name,
|
||||
scope.new_identifier(name),
|
||||
)
|
||||
}
|
||||
}
|
||||
|
|
@ -1010,9 +923,6 @@ impl<W: io::Write> TraceWriterDecls for VcdWriterDecls<W> {
|
|||
writeln!(writer, "$timescale {} $end", vcd_timescale(timescale))?;
|
||||
let mut properties = VcdWriterProperties {
|
||||
next_scalar_id: trace_scalar_id_count,
|
||||
scalar_id_to_vcd_id_map: ScalarIdToVcdIdMapOrBuilder::Builder(
|
||||
ScalarIdToVcdIdMapBuilder::default(),
|
||||
),
|
||||
memory_properties: (0..trace_memory_id_count)
|
||||
.map(|_| MemoryProperties {
|
||||
element_parts: Vec::with_capacity(8),
|
||||
|
|
@ -1025,16 +935,9 @@ impl<W: io::Write> TraceWriterDecls for VcdWriterDecls<W> {
|
|||
&mut writer,
|
||||
ArgModule {
|
||||
properties: &mut properties,
|
||||
scope: &mut Scope::new(PathHash::default()),
|
||||
scope: &mut Scope::default(),
|
||||
},
|
||||
)?;
|
||||
let ScalarIdToVcdIdMapOrBuilder::Builder(scalar_id_to_vcd_id_map_builder) =
|
||||
properties.scalar_id_to_vcd_id_map
|
||||
else {
|
||||
unreachable!();
|
||||
};
|
||||
properties.scalar_id_to_vcd_id_map =
|
||||
ScalarIdToVcdIdMapOrBuilder::Built(scalar_id_to_vcd_id_map_builder.build());
|
||||
writeln!(writer, "$enddefinitions $end")?;
|
||||
writeln!(writer, "$dumpvars")?;
|
||||
Ok(VcdWriter {
|
||||
|
|
@ -1064,88 +967,8 @@ struct MemoryProperties {
|
|||
element_index: usize,
|
||||
}
|
||||
|
||||
struct ScalarIdToVcdIdMap {
|
||||
scalar_id_to_vcd_id_map: Box<[VcdId]>,
|
||||
}
|
||||
|
||||
#[derive(Default)]
|
||||
struct ScalarIdToVcdIdMapBuilder {
|
||||
scalar_id_to_vcd_id_map: BTreeMap<usize, VcdId>,
|
||||
lower_half_to_next_upper_half_map: HashMap<u64, u64>,
|
||||
}
|
||||
|
||||
impl ScalarIdToVcdIdMapBuilder {
|
||||
/// `VcdId`s are based off of `path_hash` (and not `scalar_id`) since the hash doesn't change
|
||||
/// when unrelated variables are added/removed, making the generated VCD more friendly for git diff.
|
||||
fn get_or_insert(&mut self, scalar_id: usize, path_hash: &PathHash) -> VcdId {
|
||||
*self
|
||||
.scalar_id_to_vcd_id_map
|
||||
.entry(scalar_id)
|
||||
.or_insert_with(|| {
|
||||
let hash = u128::from_le_bytes(
|
||||
*path_hash
|
||||
.0
|
||||
.clone()
|
||||
.finalize()
|
||||
.first_chunk()
|
||||
.expect("known to be bigger than u128"),
|
||||
);
|
||||
let lower_half = (hash % VcdId::LOW_HALF_MODULUS as u128) as u64;
|
||||
let next_upper_half = self
|
||||
.lower_half_to_next_upper_half_map
|
||||
.entry(lower_half)
|
||||
.or_insert(0);
|
||||
let upper_half = *next_upper_half;
|
||||
*next_upper_half += 1;
|
||||
let Some(id) = upper_half
|
||||
.checked_mul(VcdId::LOW_HALF_MODULUS)
|
||||
.and_then(|v| v.checked_add(lower_half))
|
||||
else {
|
||||
panic!("too many VcdIds");
|
||||
};
|
||||
VcdId(id)
|
||||
})
|
||||
}
|
||||
fn build(self) -> ScalarIdToVcdIdMap {
|
||||
ScalarIdToVcdIdMap {
|
||||
scalar_id_to_vcd_id_map: self
|
||||
.scalar_id_to_vcd_id_map
|
||||
.into_iter()
|
||||
.enumerate()
|
||||
.map(|(index, (scalar_id, vcd_id))| {
|
||||
if index != scalar_id {
|
||||
panic!("missing scalar id {index}");
|
||||
}
|
||||
vcd_id
|
||||
})
|
||||
.collect(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
enum ScalarIdToVcdIdMapOrBuilder {
|
||||
Builder(ScalarIdToVcdIdMapBuilder),
|
||||
Built(ScalarIdToVcdIdMap),
|
||||
}
|
||||
|
||||
impl ScalarIdToVcdIdMapOrBuilder {
|
||||
fn built_scalar_id_to_vcd_id(&self, scalar_id: usize) -> VcdId {
|
||||
let Self::Built(v) = self else {
|
||||
panic!("ScalarIdToVcdIdMap isn't built yet");
|
||||
};
|
||||
v.scalar_id_to_vcd_id_map[scalar_id]
|
||||
}
|
||||
fn builder_get_or_insert(&mut self, scalar_id: usize, path_hash: &PathHash) -> VcdId {
|
||||
let Self::Builder(v) = self else {
|
||||
panic!("ScalarIdToVcdIdMap is already built");
|
||||
};
|
||||
v.get_or_insert(scalar_id, path_hash)
|
||||
}
|
||||
}
|
||||
|
||||
struct VcdWriterProperties {
|
||||
next_scalar_id: usize,
|
||||
scalar_id_to_vcd_id_map: ScalarIdToVcdIdMapOrBuilder,
|
||||
memory_properties: Box<[MemoryProperties]>,
|
||||
}
|
||||
|
||||
|
|
@ -1165,7 +988,7 @@ impl<W: io::Write + 'static> VcdWriter<W> {
|
|||
fn write_string_value_change(
|
||||
writer: &mut impl io::Write,
|
||||
value: impl fmt::Display,
|
||||
id: VcdId,
|
||||
id: usize,
|
||||
) -> io::Result<()> {
|
||||
write!(writer, "s{} ", Escaped(value))?;
|
||||
write_vcd_id(writer, id)?;
|
||||
|
|
@ -1175,7 +998,7 @@ fn write_string_value_change(
|
|||
fn write_bits_value_change(
|
||||
writer: &mut impl io::Write,
|
||||
value: &BitSlice,
|
||||
id: VcdId,
|
||||
id: usize,
|
||||
) -> io::Result<()> {
|
||||
match value.len() {
|
||||
0 => writer.write_all(b"s0 ")?,
|
||||
|
|
@ -1205,7 +1028,7 @@ fn write_enum_discriminant_value_change(
|
|||
writer: &mut impl io::Write,
|
||||
variant_index: usize,
|
||||
ty: Enum,
|
||||
id: VcdId,
|
||||
id: usize,
|
||||
) -> io::Result<()> {
|
||||
write_string_value_change(
|
||||
writer,
|
||||
|
|
@ -1240,9 +1063,7 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
MemoryElementPartBody::Scalar => write_bits_value_change(
|
||||
&mut self.writer,
|
||||
&element_data[start..start + len],
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(first_id + element_index),
|
||||
first_id + element_index,
|
||||
)?,
|
||||
MemoryElementPartBody::EnumDiscriminant { ty } => {
|
||||
let mut variant_index = 0;
|
||||
|
|
@ -1252,9 +1073,7 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
&mut self.writer,
|
||||
variant_index,
|
||||
*ty,
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(first_id + element_index),
|
||||
first_id + element_index,
|
||||
)?
|
||||
}
|
||||
}
|
||||
|
|
@ -1263,23 +1082,11 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
}
|
||||
|
||||
fn set_signal_uint(&mut self, id: TraceScalarId, value: &BitSlice) -> Result<(), Self::Error> {
|
||||
write_bits_value_change(
|
||||
&mut self.writer,
|
||||
value,
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(id.as_usize()),
|
||||
)
|
||||
write_bits_value_change(&mut self.writer, value, id.as_usize())
|
||||
}
|
||||
|
||||
fn set_signal_sint(&mut self, id: TraceScalarId, value: &BitSlice) -> Result<(), Self::Error> {
|
||||
write_bits_value_change(
|
||||
&mut self.writer,
|
||||
value,
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(id.as_usize()),
|
||||
)
|
||||
write_bits_value_change(&mut self.writer, value, id.as_usize())
|
||||
}
|
||||
|
||||
fn finish_init(&mut self) -> Result<(), Self::Error> {
|
||||
|
|
@ -1311,14 +1118,7 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
variant_index: usize,
|
||||
ty: Enum,
|
||||
) -> Result<(), Self::Error> {
|
||||
write_enum_discriminant_value_change(
|
||||
&mut self.writer,
|
||||
variant_index,
|
||||
ty,
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(id.as_usize()),
|
||||
)
|
||||
write_enum_discriminant_value_change(&mut self.writer, variant_index, ty, id.as_usize())
|
||||
}
|
||||
|
||||
fn set_signal_phantom_const(
|
||||
|
|
@ -1328,13 +1128,7 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
) -> Result<(), Self::Error> {
|
||||
// avoid multi-line strings because GTKWave can't display them properly:
|
||||
// https://github.com/gtkwave/gtkwave/issues/460
|
||||
write_string_value_change(
|
||||
&mut self.writer,
|
||||
format_args!("{ty:?}"),
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(id.as_usize()),
|
||||
)
|
||||
write_string_value_change(&mut self.writer, format_args!("{ty:?}"), id.as_usize())
|
||||
}
|
||||
|
||||
fn set_signal_sim_only_value(
|
||||
|
|
@ -1342,13 +1136,7 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
id: TraceScalarId,
|
||||
value: &DynSimOnlyValue,
|
||||
) -> Result<(), Self::Error> {
|
||||
write_string_value_change(
|
||||
&mut self.writer,
|
||||
format_args!("{value:?}"),
|
||||
self.properties
|
||||
.scalar_id_to_vcd_id_map
|
||||
.built_scalar_id_to_vcd_id(id.as_usize()),
|
||||
)
|
||||
write_string_value_change(&mut self.writer, format_args!("{value:?}"), id.as_usize())
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1373,7 +1161,7 @@ mod tests {
|
|||
|
||||
#[test]
|
||||
fn test_scope() {
|
||||
let mut scope = Scope::new(PathHash::default());
|
||||
let mut scope = Scope::default();
|
||||
assert_eq!(&*scope.new_identifier("foo".intern()).unescaped_name, "foo");
|
||||
assert_eq!(
|
||||
&*scope.new_identifier("foo_0".intern()).unescaped_name,
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ pub use misc::{
|
|||
os_str_strip_suffix, serialize_to_json_ascii, serialize_to_json_ascii_pretty,
|
||||
serialize_to_json_ascii_pretty_with_indent, slice_range, try_slice_range,
|
||||
};
|
||||
pub(crate) use misc::{InternedStrCompareAsStr, chain, copy_le_bytes_to_bitslice};
|
||||
pub(crate) use misc::{InternedStrCompareAsStr, chain};
|
||||
|
||||
pub mod job_server;
|
||||
pub mod prefix_sum;
|
||||
|
|
|
|||
|
|
@ -612,43 +612,3 @@ impl std::borrow::Borrow<str> for InternedStrCompareAsStr {
|
|||
&self.0
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) fn copy_le_bytes_to_bitslice(
|
||||
dest: &mut BitSlice<usize, Lsb0>,
|
||||
bytes: &[u8],
|
||||
msb_fill: bool,
|
||||
) {
|
||||
let (chunks, remainder) = bytes.as_chunks();
|
||||
let mut filled_to = 0;
|
||||
for (i, chunk) in chunks.iter().enumerate() {
|
||||
if let Some(start_bit_index) = i.checked_mul(usize::BITS as usize)
|
||||
&& start_bit_index < dest.len()
|
||||
{
|
||||
let end_bit_index = start_bit_index
|
||||
.saturating_add(usize::BITS as usize)
|
||||
.min(dest.len());
|
||||
let bit_len = end_bit_index - start_bit_index;
|
||||
let chunk = usize::from_le_bytes(*chunk);
|
||||
dest[start_bit_index..end_bit_index].copy_from_bitslice(&chunk.view_bits()[..bit_len]);
|
||||
filled_to = end_bit_index;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if !remainder.is_empty() {
|
||||
if let Some(start_bit_index) = chunks.len().checked_mul(usize::BITS as usize)
|
||||
&& start_bit_index < dest.len()
|
||||
{
|
||||
let end_bit_index = start_bit_index
|
||||
.saturating_add(usize::BITS as usize)
|
||||
.min(dest.len());
|
||||
let bit_len = end_bit_index - start_bit_index;
|
||||
let mut chunk = [if msb_fill { !0 } else { 0 }; _];
|
||||
chunk[..remainder.len()].copy_from_slice(remainder);
|
||||
let chunk = usize::from_le_bytes(chunk);
|
||||
dest[start_bit_index..end_bit_index].copy_from_bitslice(&chunk.view_bits()[..bit_len]);
|
||||
filled_to = end_bit_index;
|
||||
}
|
||||
}
|
||||
dest[filled_to..].fill(msb_fill);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,11 +2,14 @@
|
|||
// See Notices.txt for copyright information
|
||||
|
||||
pub mod xilinx;
|
||||
pub mod lattice;
|
||||
|
||||
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = crate::build::DynJobKind> {
|
||||
xilinx::built_in_job_kinds()
|
||||
xilinx::built_in_job_kinds();
|
||||
lattice::built_in_job_kinds()
|
||||
}
|
||||
|
||||
pub(crate) fn built_in_platforms() -> impl IntoIterator<Item = crate::platform::DynPlatform> {
|
||||
xilinx::built_in_platforms()
|
||||
xilinx::built_in_platforms();
|
||||
lattice::built_in_platforms()
|
||||
}
|
||||
|
|
|
|||
191
crates/fayalite/src/vendor/lattice.rs
vendored
Normal file
191
crates/fayalite/src/vendor/lattice.rs
vendored
Normal file
|
|
@ -0,0 +1,191 @@
|
|||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
// See Notices.txt for copyright information
|
||||
|
||||
use crate::{
|
||||
annotations::make_annotation_enum,
|
||||
build::{GlobalParams, ToArgs, WriteArgs},
|
||||
intern::Interned,
|
||||
prelude::{DynPlatform, Platform},
|
||||
};
|
||||
use clap::ValueEnum;
|
||||
use ordered_float::NotNan;
|
||||
use serde::{Deserialize, Serialize};
|
||||
use std::fmt;
|
||||
|
||||
pub mod orangecrab;
|
||||
pub mod primitives;
|
||||
pub mod yosys_nextpnr;
|
||||
|
||||
/* fixme make_annotation_enum! {
|
||||
#[non_exhaustive]
|
||||
pub enum LatticeAnnotation {
|
||||
XdcIOStandard(XdcIOStandardAnnotation),
|
||||
XdcLocation(XdcLocationAnnotation),
|
||||
XdcCreateClock(XdcCreateClockAnnotation),
|
||||
}
|
||||
} */
|
||||
|
||||
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
|
||||
pub struct LatticeArgs {
|
||||
#[arg(long)]
|
||||
pub device: Option<Device>,
|
||||
}
|
||||
|
||||
impl LatticeArgs {
|
||||
pub fn require_device(
|
||||
&self,
|
||||
platform: Option<&DynPlatform>,
|
||||
global_params: &GlobalParams,
|
||||
) -> clap::error::Result<Device> {
|
||||
if let Some(device) = self.device {
|
||||
return Ok(device);
|
||||
}
|
||||
if let Some(device) =
|
||||
platform.and_then(|platform| platform.aspects().get_single_by_type::<Device>().copied())
|
||||
{
|
||||
return Ok(device);
|
||||
}
|
||||
Err(global_params.clap_error(
|
||||
clap::error::ErrorKind::MissingRequiredArgument,
|
||||
"missing --device option",
|
||||
))
|
||||
}
|
||||
}
|
||||
|
||||
impl ToArgs for LatticeArgs {
|
||||
fn to_args(&self, args: &mut (impl WriteArgs + ?Sized)) {
|
||||
if let Some(device) = self.device {
|
||||
args.write_long_option_eq("device", device.as_str());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
macro_rules! make_device_enum {
|
||||
($vis:vis enum $Device:ident {
|
||||
$(
|
||||
#[
|
||||
name = $name:literal,
|
||||
xray_part = $xray_part:literal,
|
||||
xray_device = $xray_device:literal,
|
||||
xray_family = $xray_family:literal,
|
||||
]
|
||||
$variant:ident,
|
||||
)*
|
||||
}) => {
|
||||
#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug, ValueEnum)]
|
||||
$vis enum $Device {
|
||||
$(
|
||||
#[value(name = $name, alias = $xray_part)]
|
||||
$variant,
|
||||
)*
|
||||
}
|
||||
|
||||
impl $Device {
|
||||
$vis fn as_str(self) -> &'static str {
|
||||
match self {
|
||||
$(Self::$variant => $name,)*
|
||||
}
|
||||
}
|
||||
$vis fn xray_part(self) -> &'static str {
|
||||
match self {
|
||||
$(Self::$variant => $xray_part,)*
|
||||
}
|
||||
}
|
||||
$vis fn xray_device(self) -> &'static str {
|
||||
match self {
|
||||
$(Self::$variant => $xray_device,)*
|
||||
}
|
||||
}
|
||||
$vis fn xray_family(self) -> &'static str {
|
||||
match self {
|
||||
$(Self::$variant => $xray_family,)*
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
struct DeviceVisitor;
|
||||
|
||||
impl<'de> serde::de::Visitor<'de> for DeviceVisitor {
|
||||
type Value = $Device;
|
||||
|
||||
fn expecting(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
|
||||
f.write_str("a Lattice device string")
|
||||
}
|
||||
|
||||
fn visit_str<E>(self, v: &str) -> Result<Self::Value, E>
|
||||
where
|
||||
E: serde::de::Error,
|
||||
{
|
||||
match $Device::from_str(v, false) {
|
||||
Ok(v) => Ok(v),
|
||||
Err(_) => Err(E::invalid_value(serde::de::Unexpected::Str(v), &self)),
|
||||
}
|
||||
}
|
||||
|
||||
fn visit_bytes<E>(self, v: &[u8]) -> Result<Self::Value, E>
|
||||
where
|
||||
E: serde::de::Error,
|
||||
{
|
||||
match str::from_utf8(v).ok().and_then(|v| $Device::from_str(v, false).ok()) {
|
||||
Some(v) => Ok(v),
|
||||
None => Err(E::invalid_value(serde::de::Unexpected::Bytes(v), &self)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl<'de> Deserialize<'de> for $Device {
|
||||
fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
|
||||
where
|
||||
D: serde::Deserializer<'de>,
|
||||
{
|
||||
deserializer.deserialize_string(DeviceVisitor)
|
||||
}
|
||||
}
|
||||
|
||||
impl Serialize for $Device {
|
||||
fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
|
||||
where
|
||||
S: serde::Serializer,
|
||||
{
|
||||
self.as_str().serialize(serializer)
|
||||
}
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
make_device_enum! {
|
||||
pub enum Device {
|
||||
#[
|
||||
name = "xc7a35ticsg324-1L",
|
||||
xray_part = "xc7a35tcsg324-1",
|
||||
xray_device = "xc7a35t",
|
||||
xray_family = "artix7",
|
||||
]
|
||||
Xc7a35ticsg324_1l,
|
||||
#[
|
||||
name = "xc7a100ticsg324-1L",
|
||||
xray_part = "xc7a100tcsg324-1",
|
||||
xray_device = "xc7a100t",
|
||||
xray_family = "artix7",
|
||||
]
|
||||
Xc7a100ticsg324_1l,
|
||||
}
|
||||
}
|
||||
|
||||
impl fmt::Display for Device {
|
||||
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
|
||||
f.write_str(self.as_str())
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = crate::build::DynJobKind> {
|
||||
orangecrab::built_in_job_kinds()
|
||||
.into_iter()
|
||||
.chain(yosys_nextpnr::built_in_job_kinds())
|
||||
}
|
||||
|
||||
pub(crate) fn built_in_platforms() -> impl IntoIterator<Item = crate::platform::DynPlatform> {
|
||||
orangecrab::built_in_platforms()
|
||||
.into_iter()
|
||||
.chain(yosys_nextpnr::built_in_platforms())
|
||||
}
|
||||
405
crates/fayalite/src/vendor/lattice/orangecrab.rs
vendored
Normal file
405
crates/fayalite/src/vendor/lattice/orangecrab.rs
vendored
Normal file
|
|
@ -0,0 +1,405 @@
|
|||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
// See Notices.txt for copyright information
|
||||
|
||||
use crate::{
|
||||
intern::{Intern, Interned},
|
||||
module::{instance_with_loc, reg_builder_with_loc, wire_with_loc},
|
||||
platform::{
|
||||
DynPlatform, Peripheral, PeripheralRef, Peripherals, PeripheralsBuilderFactory,
|
||||
PeripheralsBuilderFinished, Platform, PlatformAspectSet,
|
||||
peripherals::{ClockInput, Led, RgbLed, Uart},
|
||||
},
|
||||
prelude::*,
|
||||
vendor::lattice::{
|
||||
Device,
|
||||
primitives,
|
||||
},
|
||||
};
|
||||
use ordered_float::NotNan;
|
||||
use std::sync::OnceLock;
|
||||
|
||||
macro_rules! orangecrab_platform {
|
||||
(
|
||||
$vis:vis enum $ArtyA7Platform:ident {
|
||||
$(#[name = $name:literal, device = $device:ident]
|
||||
$Variant:ident,)*
|
||||
}
|
||||
) => {
|
||||
#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
|
||||
#[non_exhaustive]
|
||||
$vis enum $ArtyA7Platform {
|
||||
$($Variant,)*
|
||||
}
|
||||
|
||||
impl $ArtyA7Platform {
|
||||
$vis const VARIANTS: &'static [Self] = &[$(Self::$Variant,)*];
|
||||
$vis fn device(self) -> Device {
|
||||
match self {
|
||||
$(Self::$Variant => Device::$device,)*
|
||||
}
|
||||
}
|
||||
$vis const fn as_str(self) -> &'static str {
|
||||
match self {
|
||||
$(Self::$Variant => $name,)*
|
||||
}
|
||||
}
|
||||
fn get_aspects(self) -> &'static PlatformAspectSet {
|
||||
match self {
|
||||
$(Self::$Variant => {
|
||||
static ASPECTS_SET: OnceLock<PlatformAspectSet> = OnceLock::new();
|
||||
ASPECTS_SET.get_or_init(|| self.make_aspects())
|
||||
})*
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
orangecrab_platform! {
|
||||
pub enum ArtyA7Platform {
|
||||
#[name = "arty-a7-35t", device = Xc7a35ticsg324_1l]
|
||||
ArtyA7_35T,
|
||||
#[name = "arty-a7-100t", device = Xc7a100ticsg324_1l]
|
||||
ArtyA7_100T,
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct ArtyA7Peripherals {
|
||||
clk100_div_pow2: [Peripheral<ClockInput>; 4],
|
||||
rst: Peripheral<Reset>,
|
||||
rst_sync: Peripheral<SyncReset>,
|
||||
ld0: Peripheral<RgbLed>,
|
||||
ld1: Peripheral<RgbLed>,
|
||||
ld2: Peripheral<RgbLed>,
|
||||
ld3: Peripheral<RgbLed>,
|
||||
ld4: Peripheral<Led>,
|
||||
ld5: Peripheral<Led>,
|
||||
ld6: Peripheral<Led>,
|
||||
ld7: Peripheral<Led>,
|
||||
uart: Peripheral<Uart>,
|
||||
// TODO: add rest of peripherals when we need them
|
||||
}
|
||||
|
||||
impl Peripherals for ArtyA7Peripherals {
|
||||
fn append_peripherals<'a>(&'a self, peripherals: &mut Vec<PeripheralRef<'a, CanonicalType>>) {
|
||||
let Self {
|
||||
clk100_div_pow2,
|
||||
rst,
|
||||
rst_sync,
|
||||
ld0,
|
||||
ld1,
|
||||
ld2,
|
||||
ld3,
|
||||
ld4,
|
||||
ld5,
|
||||
ld6,
|
||||
ld7,
|
||||
uart,
|
||||
} = self;
|
||||
clk100_div_pow2.append_peripherals(peripherals);
|
||||
rst.append_peripherals(peripherals);
|
||||
rst_sync.append_peripherals(peripherals);
|
||||
ld0.append_peripherals(peripherals);
|
||||
ld1.append_peripherals(peripherals);
|
||||
ld2.append_peripherals(peripherals);
|
||||
ld3.append_peripherals(peripherals);
|
||||
ld4.append_peripherals(peripherals);
|
||||
ld5.append_peripherals(peripherals);
|
||||
ld6.append_peripherals(peripherals);
|
||||
ld7.append_peripherals(peripherals);
|
||||
uart.append_peripherals(peripherals);
|
||||
}
|
||||
}
|
||||
|
||||
impl ArtyA7Platform {
|
||||
fn make_aspects(self) -> PlatformAspectSet {
|
||||
let mut retval = PlatformAspectSet::new();
|
||||
retval.insert_new(self.device());
|
||||
retval
|
||||
}
|
||||
}
|
||||
|
||||
#[hdl_module(extern)]
|
||||
fn reset_sync() {
|
||||
#[hdl]
|
||||
let clk: Clock = m.input();
|
||||
#[hdl]
|
||||
let inp: Bool = m.input();
|
||||
#[hdl]
|
||||
let out: SyncReset = m.output();
|
||||
m.annotate_module(BlackBoxInlineAnnotation {
|
||||
path: "fayalite_orangecrab_reset_sync.v".intern(),
|
||||
text: r#"module __fayalite_orangecrab_reset_sync(input clk, input inp, output out);
|
||||
wire reset_0_out;
|
||||
(* ASYNC_REG = "TRUE" *)
|
||||
FDPE #(
|
||||
.INIT(1'b1)
|
||||
) reset_0 (
|
||||
.Q(reset_0_out),
|
||||
.C(clk),
|
||||
.CE(1'b1),
|
||||
.PRE(inp),
|
||||
.D(1'b0)
|
||||
);
|
||||
(* ASYNC_REG = "TRUE" *)
|
||||
FDPE #(
|
||||
.INIT(1'b1)
|
||||
) reset_1 (
|
||||
.Q(out),
|
||||
.C(clk),
|
||||
.CE(1'b1),
|
||||
.PRE(inp),
|
||||
.D(reset_0_out)
|
||||
);
|
||||
endmodule
|
||||
"#
|
||||
.intern(),
|
||||
});
|
||||
m.verilog_name("__fayalite_orangecrab_reset_sync");
|
||||
}
|
||||
|
||||
impl Platform for ArtyA7Platform {
|
||||
type Peripherals = ArtyA7Peripherals;
|
||||
|
||||
fn name(&self) -> Interned<str> {
|
||||
self.as_str().intern()
|
||||
}
|
||||
|
||||
fn new_peripherals<'builder>(
|
||||
&self,
|
||||
builder_factory: PeripheralsBuilderFactory<'builder>,
|
||||
) -> (Self::Peripherals, PeripheralsBuilderFinished<'builder>) {
|
||||
let mut builder = builder_factory.builder();
|
||||
|
||||
let clk100_div_pow2 = std::array::from_fn(|log2_divisor| {
|
||||
let divisor = 1u64 << log2_divisor;
|
||||
let name = if divisor != 1 {
|
||||
format!("clk100_div_{divisor}")
|
||||
} else {
|
||||
"clk100".into()
|
||||
};
|
||||
builder.input_peripheral(name, ClockInput::new(100e6 / divisor as f64))
|
||||
});
|
||||
builder.add_conflicts(Vec::from_iter(clk100_div_pow2.iter().map(|v| v.id())));
|
||||
(
|
||||
ArtyA7Peripherals {
|
||||
clk100_div_pow2,
|
||||
rst: builder.input_peripheral("rst", Reset),
|
||||
rst_sync: builder.input_peripheral("rst_sync", SyncReset),
|
||||
ld0: builder.output_peripheral("ld0", RgbLed),
|
||||
ld1: builder.output_peripheral("ld1", RgbLed),
|
||||
ld2: builder.output_peripheral("ld2", RgbLed),
|
||||
ld3: builder.output_peripheral("ld3", RgbLed),
|
||||
ld4: builder.output_peripheral("ld4", Led),
|
||||
ld5: builder.output_peripheral("ld5", Led),
|
||||
ld6: builder.output_peripheral("ld6", Led),
|
||||
ld7: builder.output_peripheral("ld7", Led),
|
||||
uart: builder.output_peripheral("uart", Uart),
|
||||
},
|
||||
builder.finish(),
|
||||
)
|
||||
}
|
||||
|
||||
fn source_location(&self) -> SourceLocation {
|
||||
SourceLocation::builtin()
|
||||
}
|
||||
|
||||
fn add_peripherals_in_wrapper_module(&self, m: &ModuleBuilder, peripherals: Self::Peripherals) {
|
||||
let ArtyA7Peripherals {
|
||||
clk100_div_pow2,
|
||||
rst,
|
||||
rst_sync,
|
||||
ld0,
|
||||
ld1,
|
||||
ld2,
|
||||
ld3,
|
||||
ld4,
|
||||
ld5,
|
||||
ld6,
|
||||
ld7,
|
||||
uart,
|
||||
} = peripherals;
|
||||
let make_buffered_input = |name: &str, location: &str, io_standard: &str, invert: bool| {
|
||||
let pin = m.input_with_loc(name, SourceLocation::builtin(), Bool);
|
||||
/* fixme annotate(
|
||||
pin,
|
||||
XdcLocationAnnotation {
|
||||
location: location.intern(),
|
||||
},
|
||||
); */
|
||||
/* fixme annotate(
|
||||
pin,
|
||||
XdcIOStandardAnnotation {
|
||||
value: io_standard.intern(),
|
||||
},
|
||||
); */
|
||||
let buf = instance_with_loc(
|
||||
&format!("{name}_buf"),
|
||||
primitives::IBUF(),
|
||||
SourceLocation::builtin(),
|
||||
);
|
||||
connect(buf.I, pin);
|
||||
if invert { !buf.O } else { buf.O }
|
||||
};
|
||||
let make_buffered_output = |name: &str, location: &str, io_standard: &str| {
|
||||
let pin = m.output_with_loc(name, SourceLocation::builtin(), Bool);
|
||||
/* fixme annotate(
|
||||
pin,
|
||||
XdcLocationAnnotation {
|
||||
location: location.intern(),
|
||||
},
|
||||
);
|
||||
annotate(
|
||||
pin,
|
||||
XdcIOStandardAnnotation {
|
||||
value: io_standard.intern(),
|
||||
},
|
||||
); */
|
||||
let buf = instance_with_loc(
|
||||
&format!("{name}_buf"),
|
||||
primitives::OBUFT(),
|
||||
SourceLocation::builtin(),
|
||||
);
|
||||
connect(pin, buf.O);
|
||||
connect(buf.T, false);
|
||||
buf.I
|
||||
};
|
||||
let mut frequency = clk100_div_pow2[0].ty().frequency();
|
||||
let mut log2_divisor = 0;
|
||||
let mut clk = None;
|
||||
for (cur_log2_divisor, p) in clk100_div_pow2.into_iter().enumerate() {
|
||||
let Some(p) = p.into_used() else {
|
||||
continue;
|
||||
};
|
||||
debug_assert!(
|
||||
clk.is_none(),
|
||||
"conflict-handling logic should ensure at most one clock is used",
|
||||
);
|
||||
frequency = p.ty().frequency();
|
||||
clk = Some(p);
|
||||
log2_divisor = cur_log2_divisor;
|
||||
}
|
||||
let clk100_buf = make_buffered_input("clk100", "E3", "LVCMOS33", false);
|
||||
let startup = instance_with_loc(
|
||||
"startup",
|
||||
primitives::STARTUPE2_default_inputs(),
|
||||
SourceLocation::builtin(),
|
||||
);
|
||||
let clk_global_buf = instance_with_loc(
|
||||
"clk_global_buf",
|
||||
primitives::BUFGCE(),
|
||||
SourceLocation::builtin(),
|
||||
);
|
||||
connect(clk_global_buf.CE, startup.EOS);
|
||||
let mut clk_global_buf_in = clk100_buf.to_clock();
|
||||
for prev_log2_divisor in 0..log2_divisor {
|
||||
let prev_divisor = 1u64 << prev_log2_divisor;
|
||||
let clk_in = wire_with_loc(
|
||||
&format!("clk_div_{prev_divisor}"),
|
||||
SourceLocation::builtin(),
|
||||
Clock,
|
||||
);
|
||||
connect(clk_in, clk_global_buf_in);
|
||||
/* fixme
|
||||
annotate(
|
||||
clk_in,
|
||||
XdcCreateClockAnnotation {
|
||||
period: NotNan::new(1e9 / (100e6 / prev_divisor as f64))
|
||||
.expect("known to be valid"),
|
||||
},
|
||||
); */
|
||||
annotate(clk_in, DontTouchAnnotation);
|
||||
let cd = wire_with_loc(
|
||||
&format!("clk_div_{prev_divisor}_in"),
|
||||
SourceLocation::builtin(),
|
||||
ClockDomain[AsyncReset],
|
||||
);
|
||||
connect(cd.clk, clk_in);
|
||||
connect(cd.rst, (!startup.EOS).to_async_reset());
|
||||
let divider = reg_builder_with_loc("divider", SourceLocation::builtin())
|
||||
.clock_domain(cd)
|
||||
.reset(false)
|
||||
.build();
|
||||
connect(divider, !divider);
|
||||
clk_global_buf_in = divider.to_clock();
|
||||
}
|
||||
connect(clk_global_buf.I, clk_global_buf_in);
|
||||
let clk_out = wire_with_loc("clk_out", SourceLocation::builtin(), Clock);
|
||||
connect(clk_out, clk_global_buf.O);
|
||||
/* fixme annotate(
|
||||
clk_out,
|
||||
XdcCreateClockAnnotation {
|
||||
period: NotNan::new(1e9 / frequency).expect("known to be valid"),
|
||||
},
|
||||
); */
|
||||
annotate(clk_out, DontTouchAnnotation);
|
||||
if let Some(clk) = clk {
|
||||
connect(clk.instance_io_field().clk, clk_out);
|
||||
}
|
||||
let rst_value = {
|
||||
let rst_buf = make_buffered_input("rst", "C2", "LVCMOS33", true);
|
||||
let rst_sync = instance_with_loc("rst_sync", reset_sync(), SourceLocation::builtin());
|
||||
connect(rst_sync.clk, clk_out);
|
||||
connect(rst_sync.inp, rst_buf | !startup.EOS);
|
||||
rst_sync.out
|
||||
};
|
||||
if let Some(rst) = rst.into_used() {
|
||||
connect(rst.instance_io_field(), rst_value.to_reset());
|
||||
}
|
||||
if let Some(rst_sync) = rst_sync.into_used() {
|
||||
connect(rst_sync.instance_io_field(), rst_value);
|
||||
}
|
||||
let rgb_leds = [
|
||||
(ld0, ("G6", "F6", "E1")),
|
||||
(ld1, ("G3", "J4", "G4")),
|
||||
(ld2, ("J3", "J2", "H4")),
|
||||
(ld3, ("K1", "H6", "K2")),
|
||||
];
|
||||
for (rgb_led, (r_loc, g_loc, b_loc)) in rgb_leds {
|
||||
let r = make_buffered_output(&format!("{}_r", rgb_led.name()), r_loc, "LVCMOS33");
|
||||
let g = make_buffered_output(&format!("{}_g", rgb_led.name()), g_loc, "LVCMOS33");
|
||||
let b = make_buffered_output(&format!("{}_b", rgb_led.name()), b_loc, "LVCMOS33");
|
||||
if let Some(rgb_led) = rgb_led.into_used() {
|
||||
connect(r, rgb_led.instance_io_field().r);
|
||||
connect(g, rgb_led.instance_io_field().g);
|
||||
connect(b, rgb_led.instance_io_field().b);
|
||||
} else {
|
||||
connect(r, false);
|
||||
connect(g, false);
|
||||
connect(b, false);
|
||||
}
|
||||
}
|
||||
let leds = [(ld4, "H5"), (ld5, "J5"), (ld6, "T9"), (ld7, "T10")];
|
||||
for (led, loc) in leds {
|
||||
let o = make_buffered_output(&led.name(), loc, "LVCMOS33");
|
||||
if let Some(led) = led.into_used() {
|
||||
connect(o, led.instance_io_field().on);
|
||||
} else {
|
||||
connect(o, false);
|
||||
}
|
||||
}
|
||||
let uart_tx = make_buffered_output("uart_tx", "D10", "LVCMOS33");
|
||||
let uart_rx = make_buffered_input("uart_rx", "A9", "LVCMOS33", false);
|
||||
if let Some(uart) = uart.into_used() {
|
||||
connect(uart_tx, uart.instance_io_field().tx);
|
||||
connect(uart.instance_io_field().rx, uart_rx);
|
||||
} else {
|
||||
connect(uart_tx, true); // idle
|
||||
}
|
||||
}
|
||||
|
||||
fn aspects(&self) -> PlatformAspectSet {
|
||||
self.get_aspects().clone()
|
||||
}
|
||||
}
|
||||
|
||||
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = crate::build::DynJobKind> {
|
||||
[]
|
||||
}
|
||||
|
||||
pub(crate) fn built_in_platforms() -> impl IntoIterator<Item = DynPlatform> {
|
||||
ArtyA7Platform::VARIANTS
|
||||
.iter()
|
||||
.map(|&v| DynPlatform::new(v))
|
||||
}
|
||||
50
crates/fayalite/src/vendor/lattice/primitives.rs
vendored
Normal file
50
crates/fayalite/src/vendor/lattice/primitives.rs
vendored
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
// See Notices.txt for copyright information
|
||||
|
||||
#![allow(non_snake_case)]
|
||||
|
||||
use crate::prelude::*;
|
||||
|
||||
#[hdl_module(extern)]
|
||||
pub fn IBUF() {
|
||||
m.verilog_name("IBUF");
|
||||
#[hdl]
|
||||
let O: Bool = m.output();
|
||||
#[hdl]
|
||||
let I: Bool = m.input();
|
||||
}
|
||||
|
||||
#[hdl_module(extern)]
|
||||
pub fn OBUFT() {
|
||||
m.verilog_name("OBUFT");
|
||||
#[hdl]
|
||||
let O: Bool = m.output();
|
||||
#[hdl]
|
||||
let I: Bool = m.input();
|
||||
#[hdl]
|
||||
let T: Bool = m.input();
|
||||
}
|
||||
|
||||
#[hdl_module(extern)]
|
||||
pub fn BUFGCE() {
|
||||
m.verilog_name("BUFGCE");
|
||||
#[hdl]
|
||||
let O: Clock = m.output();
|
||||
#[hdl]
|
||||
let CE: Bool = m.input();
|
||||
#[hdl]
|
||||
let I: Clock = m.input();
|
||||
}
|
||||
|
||||
#[hdl_module(extern)]
|
||||
pub fn STARTUPE2_default_inputs() {
|
||||
m.verilog_name("STARTUPE2");
|
||||
#[hdl]
|
||||
let CFGCLK: Clock = m.output();
|
||||
#[hdl]
|
||||
let CFGMCLK: Clock = m.output();
|
||||
#[hdl]
|
||||
let EOS: Bool = m.output();
|
||||
#[hdl]
|
||||
let PREQ: Bool = m.output();
|
||||
}
|
||||
1044
crates/fayalite/src/vendor/lattice/yosys_nextpnr.rs
vendored
Normal file
1044
crates/fayalite/src/vendor/lattice/yosys_nextpnr.rs
vendored
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -244,13 +244,3 @@ pub struct MyTypeWithPrivateMembersWithArg<T> {
|
|||
pub(crate) b: MyPubCrateTypeWithArg<T>,
|
||||
pub c: T,
|
||||
}
|
||||
|
||||
#[hdl(outline_generated)]
|
||||
pub enum EnumWithOnlyOneVariant {
|
||||
A,
|
||||
}
|
||||
|
||||
#[hdl(outline_generated)]
|
||||
pub enum EnumWithOnlyOneVariant2<T> {
|
||||
A(T),
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,283 +1,283 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module array_rw $end
|
||||
$scope struct array_in $end
|
||||
$var wire 8 Yvfu^ \[0] $end
|
||||
$var wire 8 |Cs`W \[1] $end
|
||||
$var wire 8 M!nsb \[2] $end
|
||||
$var wire 8 59L{w \[3] $end
|
||||
$var wire 8 o2+|F \[4] $end
|
||||
$var wire 8 ikzV5 \[5] $end
|
||||
$var wire 8 [E$Z* \[6] $end
|
||||
$var wire 8 ?"~01 \[7] $end
|
||||
$var wire 8 /kghT \[8] $end
|
||||
$var wire 8 +}(9) \[9] $end
|
||||
$var wire 8 iMP}= \[10] $end
|
||||
$var wire 8 2M0tL \[11] $end
|
||||
$var wire 8 :AjkA \[12] $end
|
||||
$var wire 8 VM_:8 \[13] $end
|
||||
$var wire 8 UveL2 \[14] $end
|
||||
$var wire 8 A)9Z6 \[15] $end
|
||||
$var wire 8 ! \[0] $end
|
||||
$var wire 8 " \[1] $end
|
||||
$var wire 8 # \[2] $end
|
||||
$var wire 8 $ \[3] $end
|
||||
$var wire 8 % \[4] $end
|
||||
$var wire 8 & \[5] $end
|
||||
$var wire 8 ' \[6] $end
|
||||
$var wire 8 ( \[7] $end
|
||||
$var wire 8 ) \[8] $end
|
||||
$var wire 8 * \[9] $end
|
||||
$var wire 8 + \[10] $end
|
||||
$var wire 8 , \[11] $end
|
||||
$var wire 8 - \[12] $end
|
||||
$var wire 8 . \[13] $end
|
||||
$var wire 8 / \[14] $end
|
||||
$var wire 8 0 \[15] $end
|
||||
$upscope $end
|
||||
$scope struct array_out $end
|
||||
$var wire 8 2zdj1 \[0] $end
|
||||
$var wire 8 =;m_[ \[1] $end
|
||||
$var wire 8 @9Hd \[2] $end
|
||||
$var wire 8 C:="| \[3] $end
|
||||
$var wire 8 IDk7# \[4] $end
|
||||
$var wire 8 i]E1i \[5] $end
|
||||
$var wire 8 tK,M] \[6] $end
|
||||
$var wire 8 tGp!\ \[7] $end
|
||||
$var wire 8 ."qjK \[8] $end
|
||||
$var wire 8 AUO:R \[9] $end
|
||||
$var wire 8 'kx`n \[10] $end
|
||||
$var wire 8 U&(K\ \[11] $end
|
||||
$var wire 8 q<O41 \[12] $end
|
||||
$var wire 8 zvj)] \[13] $end
|
||||
$var wire 8 >0H<( \[14] $end
|
||||
$var wire 8 ARhXJ \[15] $end
|
||||
$var wire 8 1 \[0] $end
|
||||
$var wire 8 2 \[1] $end
|
||||
$var wire 8 3 \[2] $end
|
||||
$var wire 8 4 \[3] $end
|
||||
$var wire 8 5 \[4] $end
|
||||
$var wire 8 6 \[5] $end
|
||||
$var wire 8 7 \[6] $end
|
||||
$var wire 8 8 \[7] $end
|
||||
$var wire 8 9 \[8] $end
|
||||
$var wire 8 : \[9] $end
|
||||
$var wire 8 ; \[10] $end
|
||||
$var wire 8 < \[11] $end
|
||||
$var wire 8 = \[12] $end
|
||||
$var wire 8 > \[13] $end
|
||||
$var wire 8 ? \[14] $end
|
||||
$var wire 8 @ \[15] $end
|
||||
$upscope $end
|
||||
$var wire 8 -n:7@ read_index $end
|
||||
$var wire 8 >h<=Z read_data $end
|
||||
$var wire 8 [xld3 write_index $end
|
||||
$var wire 8 J+DYh write_data $end
|
||||
$var wire 1 z,@WW write_en $end
|
||||
$var wire 8 A read_index $end
|
||||
$var wire 8 B read_data $end
|
||||
$var wire 8 C write_index $end
|
||||
$var wire 8 D write_data $end
|
||||
$var wire 1 E write_en $end
|
||||
$scope struct array_wire $end
|
||||
$var wire 8 B{KJS \[0] $end
|
||||
$var wire 8 V'K*& \[1] $end
|
||||
$var wire 8 4zI$O \[2] $end
|
||||
$var wire 8 %TTk[ \[3] $end
|
||||
$var wire 8 IgSeY \[4] $end
|
||||
$var wire 8 &&1T" \[5] $end
|
||||
$var wire 8 5)-l\ \[6] $end
|
||||
$var wire 8 0RsLb \[7] $end
|
||||
$var wire 8 T>:}D \[8] $end
|
||||
$var wire 8 DPpZ* \[9] $end
|
||||
$var wire 8 %E(nf \[10] $end
|
||||
$var wire 8 2'pba \[11] $end
|
||||
$var wire 8 e/c1: \[12] $end
|
||||
$var wire 8 ;w.C7 \[13] $end
|
||||
$var wire 8 fwdfu \[14] $end
|
||||
$var wire 8 *R\vx \[15] $end
|
||||
$var wire 8 F \[0] $end
|
||||
$var wire 8 G \[1] $end
|
||||
$var wire 8 H \[2] $end
|
||||
$var wire 8 I \[3] $end
|
||||
$var wire 8 J \[4] $end
|
||||
$var wire 8 K \[5] $end
|
||||
$var wire 8 L \[6] $end
|
||||
$var wire 8 M \[7] $end
|
||||
$var wire 8 N \[8] $end
|
||||
$var wire 8 O \[9] $end
|
||||
$var wire 8 P \[10] $end
|
||||
$var wire 8 Q \[11] $end
|
||||
$var wire 8 R \[12] $end
|
||||
$var wire 8 S \[13] $end
|
||||
$var wire 8 T \[14] $end
|
||||
$var wire 8 U \[15] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
b11111111 Yvfu^
|
||||
b1111111 |Cs`W
|
||||
b111111 M!nsb
|
||||
b11111 59L{w
|
||||
b1111 o2+|F
|
||||
b111 ikzV5
|
||||
b11 [E$Z*
|
||||
b1 ?"~01
|
||||
b0 /kghT
|
||||
b10000000 +}(9)
|
||||
b11000000 iMP}=
|
||||
b11100000 2M0tL
|
||||
b11110000 :AjkA
|
||||
b11111000 VM_:8
|
||||
b11111100 UveL2
|
||||
b11111110 A)9Z6
|
||||
b11111111 2zdj1
|
||||
b1111111 =;m_[
|
||||
b111111 @9Hd
|
||||
b11111 C:="|
|
||||
b1111 IDk7#
|
||||
b111 i]E1i
|
||||
b11 tK,M]
|
||||
b1 tGp!\
|
||||
b0 ."qjK
|
||||
b10000000 AUO:R
|
||||
b11000000 'kx`n
|
||||
b11100000 U&(K\
|
||||
b11110000 q<O41
|
||||
b11111000 zvj)]
|
||||
b11111100 >0H<(
|
||||
b11111110 ARhXJ
|
||||
b0 -n:7@
|
||||
b11111111 >h<=Z
|
||||
b0 [xld3
|
||||
b0 J+DYh
|
||||
0z,@WW
|
||||
b11111111 B{KJS
|
||||
b1111111 V'K*&
|
||||
b111111 4zI$O
|
||||
b11111 %TTk[
|
||||
b1111 IgSeY
|
||||
b111 &&1T"
|
||||
b11 5)-l\
|
||||
b1 0RsLb
|
||||
b0 T>:}D
|
||||
b10000000 DPpZ*
|
||||
b11000000 %E(nf
|
||||
b11100000 2'pba
|
||||
b11110000 e/c1:
|
||||
b11111000 ;w.C7
|
||||
b11111100 fwdfu
|
||||
b11111110 *R\vx
|
||||
b11111111 !
|
||||
b1111111 "
|
||||
b111111 #
|
||||
b11111 $
|
||||
b1111 %
|
||||
b111 &
|
||||
b11 '
|
||||
b1 (
|
||||
b0 )
|
||||
b10000000 *
|
||||
b11000000 +
|
||||
b11100000 ,
|
||||
b11110000 -
|
||||
b11111000 .
|
||||
b11111100 /
|
||||
b11111110 0
|
||||
b11111111 1
|
||||
b1111111 2
|
||||
b111111 3
|
||||
b11111 4
|
||||
b1111 5
|
||||
b111 6
|
||||
b11 7
|
||||
b1 8
|
||||
b0 9
|
||||
b10000000 :
|
||||
b11000000 ;
|
||||
b11100000 <
|
||||
b11110000 =
|
||||
b11111000 >
|
||||
b11111100 ?
|
||||
b11111110 @
|
||||
b0 A
|
||||
b11111111 B
|
||||
b0 C
|
||||
b0 D
|
||||
0E
|
||||
b11111111 F
|
||||
b1111111 G
|
||||
b111111 H
|
||||
b11111 I
|
||||
b1111 J
|
||||
b111 K
|
||||
b11 L
|
||||
b1 M
|
||||
b0 N
|
||||
b10000000 O
|
||||
b11000000 P
|
||||
b11100000 Q
|
||||
b11110000 R
|
||||
b11111000 S
|
||||
b11111100 T
|
||||
b11111110 U
|
||||
$end
|
||||
#1000000
|
||||
b1 -n:7@
|
||||
b1111111 >h<=Z
|
||||
b1 A
|
||||
b1111111 B
|
||||
#2000000
|
||||
b10 -n:7@
|
||||
b111111 >h<=Z
|
||||
b10 A
|
||||
b111111 B
|
||||
#3000000
|
||||
b11 -n:7@
|
||||
b11111 >h<=Z
|
||||
b11 A
|
||||
b11111 B
|
||||
#4000000
|
||||
b100 -n:7@
|
||||
b1111 >h<=Z
|
||||
b100 A
|
||||
b1111 B
|
||||
#5000000
|
||||
b101 -n:7@
|
||||
b111 >h<=Z
|
||||
b101 A
|
||||
b111 B
|
||||
#6000000
|
||||
b110 -n:7@
|
||||
b11 >h<=Z
|
||||
b110 A
|
||||
b11 B
|
||||
#7000000
|
||||
b111 -n:7@
|
||||
b1 >h<=Z
|
||||
b111 A
|
||||
b1 B
|
||||
#8000000
|
||||
b1000 -n:7@
|
||||
b0 >h<=Z
|
||||
b1000 A
|
||||
b0 B
|
||||
#9000000
|
||||
b1001 -n:7@
|
||||
b10000000 >h<=Z
|
||||
b1001 A
|
||||
b10000000 B
|
||||
#10000000
|
||||
b1010 -n:7@
|
||||
b11000000 >h<=Z
|
||||
b1010 A
|
||||
b11000000 B
|
||||
#11000000
|
||||
b1011 -n:7@
|
||||
b11100000 >h<=Z
|
||||
b1011 A
|
||||
b11100000 B
|
||||
#12000000
|
||||
b1100 -n:7@
|
||||
b11110000 >h<=Z
|
||||
b1100 A
|
||||
b11110000 B
|
||||
#13000000
|
||||
b1101 -n:7@
|
||||
b11111000 >h<=Z
|
||||
b1101 A
|
||||
b11111000 B
|
||||
#14000000
|
||||
b1110 -n:7@
|
||||
b11111100 >h<=Z
|
||||
b1110 A
|
||||
b11111100 B
|
||||
#15000000
|
||||
b1111 -n:7@
|
||||
b11111110 >h<=Z
|
||||
b1111 A
|
||||
b11111110 B
|
||||
#16000000
|
||||
b10000 -n:7@
|
||||
b0 >h<=Z
|
||||
b10000 A
|
||||
b0 B
|
||||
#17000000
|
||||
b0 2zdj1
|
||||
b0 -n:7@
|
||||
1z,@WW
|
||||
b0 B{KJS
|
||||
b0 1
|
||||
b0 A
|
||||
1E
|
||||
b0 F
|
||||
#18000000
|
||||
b11111111 2zdj1
|
||||
b1 =;m_[
|
||||
b11111111 >h<=Z
|
||||
b1 [xld3
|
||||
b1 J+DYh
|
||||
b11111111 B{KJS
|
||||
b1 V'K*&
|
||||
b11111111 1
|
||||
b1 2
|
||||
b11111111 B
|
||||
b1 C
|
||||
b1 D
|
||||
b11111111 F
|
||||
b1 G
|
||||
#19000000
|
||||
b1111111 =;m_[
|
||||
b100 @9Hd
|
||||
b10 [xld3
|
||||
b100 J+DYh
|
||||
b1111111 V'K*&
|
||||
b100 4zI$O
|
||||
b1111111 2
|
||||
b100 3
|
||||
b10 C
|
||||
b100 D
|
||||
b1111111 G
|
||||
b100 H
|
||||
#20000000
|
||||
b111111 @9Hd
|
||||
b1001 C:="|
|
||||
b11 [xld3
|
||||
b1001 J+DYh
|
||||
b111111 4zI$O
|
||||
b1001 %TTk[
|
||||
b111111 3
|
||||
b1001 4
|
||||
b11 C
|
||||
b1001 D
|
||||
b111111 H
|
||||
b1001 I
|
||||
#21000000
|
||||
b11111 C:="|
|
||||
b10000 IDk7#
|
||||
b100 [xld3
|
||||
b10000 J+DYh
|
||||
b11111 %TTk[
|
||||
b10000 IgSeY
|
||||
b11111 4
|
||||
b10000 5
|
||||
b100 C
|
||||
b10000 D
|
||||
b11111 I
|
||||
b10000 J
|
||||
#22000000
|
||||
b1111 IDk7#
|
||||
b11001 i]E1i
|
||||
b101 [xld3
|
||||
b11001 J+DYh
|
||||
b1111 IgSeY
|
||||
b11001 &&1T"
|
||||
b1111 5
|
||||
b11001 6
|
||||
b101 C
|
||||
b11001 D
|
||||
b1111 J
|
||||
b11001 K
|
||||
#23000000
|
||||
b111 i]E1i
|
||||
b100100 tK,M]
|
||||
b110 [xld3
|
||||
b100100 J+DYh
|
||||
b111 &&1T"
|
||||
b100100 5)-l\
|
||||
b111 6
|
||||
b100100 7
|
||||
b110 C
|
||||
b100100 D
|
||||
b111 K
|
||||
b100100 L
|
||||
#24000000
|
||||
b11 tK,M]
|
||||
b110001 tGp!\
|
||||
b111 [xld3
|
||||
b110001 J+DYh
|
||||
b11 5)-l\
|
||||
b110001 0RsLb
|
||||
b11 7
|
||||
b110001 8
|
||||
b111 C
|
||||
b110001 D
|
||||
b11 L
|
||||
b110001 M
|
||||
#25000000
|
||||
b1 tGp!\
|
||||
b1000000 ."qjK
|
||||
b1000 [xld3
|
||||
b1000000 J+DYh
|
||||
b1 0RsLb
|
||||
b1000000 T>:}D
|
||||
b1 8
|
||||
b1000000 9
|
||||
b1000 C
|
||||
b1000000 D
|
||||
b1 M
|
||||
b1000000 N
|
||||
#26000000
|
||||
b0 ."qjK
|
||||
b1010001 AUO:R
|
||||
b1001 [xld3
|
||||
b1010001 J+DYh
|
||||
b0 T>:}D
|
||||
b1010001 DPpZ*
|
||||
b0 9
|
||||
b1010001 :
|
||||
b1001 C
|
||||
b1010001 D
|
||||
b0 N
|
||||
b1010001 O
|
||||
#27000000
|
||||
b10000000 AUO:R
|
||||
b1100100 'kx`n
|
||||
b1010 [xld3
|
||||
b1100100 J+DYh
|
||||
b10000000 DPpZ*
|
||||
b1100100 %E(nf
|
||||
b10000000 :
|
||||
b1100100 ;
|
||||
b1010 C
|
||||
b1100100 D
|
||||
b10000000 O
|
||||
b1100100 P
|
||||
#28000000
|
||||
b11000000 'kx`n
|
||||
b1111001 U&(K\
|
||||
b1011 [xld3
|
||||
b1111001 J+DYh
|
||||
b11000000 %E(nf
|
||||
b1111001 2'pba
|
||||
b11000000 ;
|
||||
b1111001 <
|
||||
b1011 C
|
||||
b1111001 D
|
||||
b11000000 P
|
||||
b1111001 Q
|
||||
#29000000
|
||||
b11100000 U&(K\
|
||||
b10010000 q<O41
|
||||
b1100 [xld3
|
||||
b10010000 J+DYh
|
||||
b11100000 2'pba
|
||||
b10010000 e/c1:
|
||||
b11100000 <
|
||||
b10010000 =
|
||||
b1100 C
|
||||
b10010000 D
|
||||
b11100000 Q
|
||||
b10010000 R
|
||||
#30000000
|
||||
b11110000 q<O41
|
||||
b10101001 zvj)]
|
||||
b1101 [xld3
|
||||
b10101001 J+DYh
|
||||
b11110000 e/c1:
|
||||
b10101001 ;w.C7
|
||||
b11110000 =
|
||||
b10101001 >
|
||||
b1101 C
|
||||
b10101001 D
|
||||
b11110000 R
|
||||
b10101001 S
|
||||
#31000000
|
||||
b11111000 zvj)]
|
||||
b11000100 >0H<(
|
||||
b1110 [xld3
|
||||
b11000100 J+DYh
|
||||
b11111000 ;w.C7
|
||||
b11000100 fwdfu
|
||||
b11111000 >
|
||||
b11000100 ?
|
||||
b1110 C
|
||||
b11000100 D
|
||||
b11111000 S
|
||||
b11000100 T
|
||||
#32000000
|
||||
b11111100 >0H<(
|
||||
b11100001 ARhXJ
|
||||
b1111 [xld3
|
||||
b11100001 J+DYh
|
||||
b11111100 fwdfu
|
||||
b11100001 *R\vx
|
||||
b11111100 ?
|
||||
b11100001 @
|
||||
b1111 C
|
||||
b11100001 D
|
||||
b11111100 T
|
||||
b11100001 U
|
||||
#33000000
|
||||
b11111110 ARhXJ
|
||||
b10000 [xld3
|
||||
b0 J+DYh
|
||||
b11111110 *R\vx
|
||||
b11111110 @
|
||||
b10000 C
|
||||
b0 D
|
||||
b11111110 U
|
||||
#34000000
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module conditional_assignment_last $end
|
||||
$var wire 1 xt~(W i $end
|
||||
$var wire 1 6:7im w $end
|
||||
$var wire 1 ! i $end
|
||||
$var wire 1 " w $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0xt~(W
|
||||
16:7im
|
||||
0!
|
||||
1"
|
||||
$end
|
||||
#1000000
|
||||
1xt~(W
|
||||
06:7im
|
||||
1!
|
||||
0"
|
||||
#2000000
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module connect_const_reset $end
|
||||
$var wire 1 8ke|= reset_out $end
|
||||
$var wire 1 {"c@= bit_out $end
|
||||
$var wire 1 ! reset_out $end
|
||||
$var wire 1 " bit_out $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
18ke|=
|
||||
1{"c@=
|
||||
1!
|
||||
1"
|
||||
$end
|
||||
#1000000
|
||||
|
|
|
|||
|
|
@ -1,217 +1,217 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 `[J;" clk $end
|
||||
$var wire 1 4pZx7 rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 4 rPs;{ count $end
|
||||
$var reg 4 6_+(g count_reg $end
|
||||
$var wire 4 # count $end
|
||||
$var reg 4 $ count_reg $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0`[J;"
|
||||
04pZx7
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
0!
|
||||
0"
|
||||
b0 #
|
||||
b0 $
|
||||
$end
|
||||
#500000
|
||||
14pZx7
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
1"
|
||||
b11 #
|
||||
b11 $
|
||||
#1000000
|
||||
1`[J;"
|
||||
1!
|
||||
#1500000
|
||||
04pZx7
|
||||
0"
|
||||
#2000000
|
||||
0`[J;"
|
||||
0!
|
||||
#3000000
|
||||
1`[J;"
|
||||
b100 rPs;{
|
||||
b100 6_+(g
|
||||
1!
|
||||
b100 #
|
||||
b100 $
|
||||
#4000000
|
||||
0`[J;"
|
||||
0!
|
||||
#5000000
|
||||
1`[J;"
|
||||
b101 rPs;{
|
||||
b101 6_+(g
|
||||
1!
|
||||
b101 #
|
||||
b101 $
|
||||
#6000000
|
||||
0`[J;"
|
||||
0!
|
||||
#7000000
|
||||
1`[J;"
|
||||
b110 rPs;{
|
||||
b110 6_+(g
|
||||
1!
|
||||
b110 #
|
||||
b110 $
|
||||
#8000000
|
||||
0`[J;"
|
||||
0!
|
||||
#9000000
|
||||
1`[J;"
|
||||
b111 rPs;{
|
||||
b111 6_+(g
|
||||
1!
|
||||
b111 #
|
||||
b111 $
|
||||
#10000000
|
||||
0`[J;"
|
||||
0!
|
||||
#11000000
|
||||
1`[J;"
|
||||
b1000 rPs;{
|
||||
b1000 6_+(g
|
||||
1!
|
||||
b1000 #
|
||||
b1000 $
|
||||
#12000000
|
||||
0`[J;"
|
||||
0!
|
||||
#13000000
|
||||
1`[J;"
|
||||
b1001 rPs;{
|
||||
b1001 6_+(g
|
||||
1!
|
||||
b1001 #
|
||||
b1001 $
|
||||
#14000000
|
||||
0`[J;"
|
||||
0!
|
||||
#15000000
|
||||
1`[J;"
|
||||
b1010 rPs;{
|
||||
b1010 6_+(g
|
||||
1!
|
||||
b1010 #
|
||||
b1010 $
|
||||
#16000000
|
||||
0`[J;"
|
||||
0!
|
||||
#17000000
|
||||
1`[J;"
|
||||
b1011 rPs;{
|
||||
b1011 6_+(g
|
||||
1!
|
||||
b1011 #
|
||||
b1011 $
|
||||
#18000000
|
||||
0`[J;"
|
||||
0!
|
||||
#19000000
|
||||
1`[J;"
|
||||
b1100 rPs;{
|
||||
b1100 6_+(g
|
||||
1!
|
||||
b1100 #
|
||||
b1100 $
|
||||
#20000000
|
||||
0`[J;"
|
||||
0!
|
||||
#21000000
|
||||
1`[J;"
|
||||
b1101 rPs;{
|
||||
b1101 6_+(g
|
||||
1!
|
||||
b1101 #
|
||||
b1101 $
|
||||
#22000000
|
||||
0`[J;"
|
||||
0!
|
||||
#23000000
|
||||
1`[J;"
|
||||
b1110 rPs;{
|
||||
b1110 6_+(g
|
||||
1!
|
||||
b1110 #
|
||||
b1110 $
|
||||
#24000000
|
||||
0`[J;"
|
||||
0!
|
||||
#25000000
|
||||
1`[J;"
|
||||
b1111 rPs;{
|
||||
b1111 6_+(g
|
||||
1!
|
||||
b1111 #
|
||||
b1111 $
|
||||
#26000000
|
||||
0`[J;"
|
||||
0!
|
||||
#27000000
|
||||
1`[J;"
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
1!
|
||||
b0 #
|
||||
b0 $
|
||||
#28000000
|
||||
0`[J;"
|
||||
0!
|
||||
#29000000
|
||||
1`[J;"
|
||||
b1 rPs;{
|
||||
b1 6_+(g
|
||||
1!
|
||||
b1 #
|
||||
b1 $
|
||||
#30000000
|
||||
0`[J;"
|
||||
0!
|
||||
#31000000
|
||||
1`[J;"
|
||||
b10 rPs;{
|
||||
b10 6_+(g
|
||||
1!
|
||||
b10 #
|
||||
b10 $
|
||||
#32000000
|
||||
0`[J;"
|
||||
0!
|
||||
#33000000
|
||||
1`[J;"
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
1!
|
||||
b11 #
|
||||
b11 $
|
||||
#34000000
|
||||
0`[J;"
|
||||
0!
|
||||
#35000000
|
||||
1`[J;"
|
||||
b100 rPs;{
|
||||
b100 6_+(g
|
||||
1!
|
||||
b100 #
|
||||
b100 $
|
||||
#36000000
|
||||
0`[J;"
|
||||
0!
|
||||
#37000000
|
||||
1`[J;"
|
||||
b101 rPs;{
|
||||
b101 6_+(g
|
||||
1!
|
||||
b101 #
|
||||
b101 $
|
||||
#38000000
|
||||
0`[J;"
|
||||
0!
|
||||
#39000000
|
||||
1`[J;"
|
||||
b110 rPs;{
|
||||
b110 6_+(g
|
||||
1!
|
||||
b110 #
|
||||
b110 $
|
||||
#40000000
|
||||
0`[J;"
|
||||
0!
|
||||
#41000000
|
||||
1`[J;"
|
||||
b111 rPs;{
|
||||
b111 6_+(g
|
||||
1!
|
||||
b111 #
|
||||
b111 $
|
||||
#42000000
|
||||
0`[J;"
|
||||
0!
|
||||
#43000000
|
||||
1`[J;"
|
||||
b1000 rPs;{
|
||||
b1000 6_+(g
|
||||
1!
|
||||
b1000 #
|
||||
b1000 $
|
||||
#44000000
|
||||
0`[J;"
|
||||
0!
|
||||
#45000000
|
||||
1`[J;"
|
||||
b1001 rPs;{
|
||||
b1001 6_+(g
|
||||
1!
|
||||
b1001 #
|
||||
b1001 $
|
||||
#46000000
|
||||
0`[J;"
|
||||
0!
|
||||
#47000000
|
||||
1`[J;"
|
||||
b1010 rPs;{
|
||||
b1010 6_+(g
|
||||
1!
|
||||
b1010 #
|
||||
b1010 $
|
||||
#48000000
|
||||
0`[J;"
|
||||
0!
|
||||
#49000000
|
||||
1`[J;"
|
||||
b1011 rPs;{
|
||||
b1011 6_+(g
|
||||
1!
|
||||
b1011 #
|
||||
b1011 $
|
||||
#50000000
|
||||
0`[J;"
|
||||
0!
|
||||
#51000000
|
||||
1`[J;"
|
||||
b1100 rPs;{
|
||||
b1100 6_+(g
|
||||
1!
|
||||
b1100 #
|
||||
b1100 $
|
||||
#52000000
|
||||
0`[J;"
|
||||
0!
|
||||
#53000000
|
||||
1`[J;"
|
||||
b1101 rPs;{
|
||||
b1101 6_+(g
|
||||
1!
|
||||
b1101 #
|
||||
b1101 $
|
||||
#54000000
|
||||
0`[J;"
|
||||
0!
|
||||
#55000000
|
||||
1`[J;"
|
||||
b1110 rPs;{
|
||||
b1110 6_+(g
|
||||
1!
|
||||
b1110 #
|
||||
b1110 $
|
||||
#56000000
|
||||
0`[J;"
|
||||
0!
|
||||
#57000000
|
||||
1`[J;"
|
||||
b1111 rPs;{
|
||||
b1111 6_+(g
|
||||
1!
|
||||
b1111 #
|
||||
b1111 $
|
||||
#58000000
|
||||
0`[J;"
|
||||
0!
|
||||
#59000000
|
||||
1`[J;"
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
1!
|
||||
b0 #
|
||||
b0 $
|
||||
#60000000
|
||||
0`[J;"
|
||||
0!
|
||||
#61000000
|
||||
1`[J;"
|
||||
b1 rPs;{
|
||||
b1 6_+(g
|
||||
1!
|
||||
b1 #
|
||||
b1 $
|
||||
#62000000
|
||||
0`[J;"
|
||||
0!
|
||||
#63000000
|
||||
1`[J;"
|
||||
b10 rPs;{
|
||||
b10 6_+(g
|
||||
1!
|
||||
b10 #
|
||||
b10 $
|
||||
#64000000
|
||||
0`[J;"
|
||||
0!
|
||||
#65000000
|
||||
1`[J;"
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
1!
|
||||
b11 #
|
||||
b11 $
|
||||
#66000000
|
||||
|
|
|
|||
|
|
@ -1,214 +1,214 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 `[J;" clk $end
|
||||
$var wire 1 4pZx7 rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 4 rPs;{ count $end
|
||||
$var reg 4 6_+(g count_reg $end
|
||||
$var wire 4 # count $end
|
||||
$var reg 4 $ count_reg $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0`[J;"
|
||||
14pZx7
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
b0 $
|
||||
$end
|
||||
#1000000
|
||||
1`[J;"
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
04pZx7
|
||||
1!
|
||||
b11 #
|
||||
b11 $
|
||||
0"
|
||||
#2000000
|
||||
0`[J;"
|
||||
0!
|
||||
#3000000
|
||||
1`[J;"
|
||||
b100 rPs;{
|
||||
b100 6_+(g
|
||||
1!
|
||||
b100 #
|
||||
b100 $
|
||||
#4000000
|
||||
0`[J;"
|
||||
0!
|
||||
#5000000
|
||||
1`[J;"
|
||||
b101 rPs;{
|
||||
b101 6_+(g
|
||||
1!
|
||||
b101 #
|
||||
b101 $
|
||||
#6000000
|
||||
0`[J;"
|
||||
0!
|
||||
#7000000
|
||||
1`[J;"
|
||||
b110 rPs;{
|
||||
b110 6_+(g
|
||||
1!
|
||||
b110 #
|
||||
b110 $
|
||||
#8000000
|
||||
0`[J;"
|
||||
0!
|
||||
#9000000
|
||||
1`[J;"
|
||||
b111 rPs;{
|
||||
b111 6_+(g
|
||||
1!
|
||||
b111 #
|
||||
b111 $
|
||||
#10000000
|
||||
0`[J;"
|
||||
0!
|
||||
#11000000
|
||||
1`[J;"
|
||||
b1000 rPs;{
|
||||
b1000 6_+(g
|
||||
1!
|
||||
b1000 #
|
||||
b1000 $
|
||||
#12000000
|
||||
0`[J;"
|
||||
0!
|
||||
#13000000
|
||||
1`[J;"
|
||||
b1001 rPs;{
|
||||
b1001 6_+(g
|
||||
1!
|
||||
b1001 #
|
||||
b1001 $
|
||||
#14000000
|
||||
0`[J;"
|
||||
0!
|
||||
#15000000
|
||||
1`[J;"
|
||||
b1010 rPs;{
|
||||
b1010 6_+(g
|
||||
1!
|
||||
b1010 #
|
||||
b1010 $
|
||||
#16000000
|
||||
0`[J;"
|
||||
0!
|
||||
#17000000
|
||||
1`[J;"
|
||||
b1011 rPs;{
|
||||
b1011 6_+(g
|
||||
1!
|
||||
b1011 #
|
||||
b1011 $
|
||||
#18000000
|
||||
0`[J;"
|
||||
0!
|
||||
#19000000
|
||||
1`[J;"
|
||||
b1100 rPs;{
|
||||
b1100 6_+(g
|
||||
1!
|
||||
b1100 #
|
||||
b1100 $
|
||||
#20000000
|
||||
0`[J;"
|
||||
0!
|
||||
#21000000
|
||||
1`[J;"
|
||||
b1101 rPs;{
|
||||
b1101 6_+(g
|
||||
1!
|
||||
b1101 #
|
||||
b1101 $
|
||||
#22000000
|
||||
0`[J;"
|
||||
0!
|
||||
#23000000
|
||||
1`[J;"
|
||||
b1110 rPs;{
|
||||
b1110 6_+(g
|
||||
1!
|
||||
b1110 #
|
||||
b1110 $
|
||||
#24000000
|
||||
0`[J;"
|
||||
0!
|
||||
#25000000
|
||||
1`[J;"
|
||||
b1111 rPs;{
|
||||
b1111 6_+(g
|
||||
1!
|
||||
b1111 #
|
||||
b1111 $
|
||||
#26000000
|
||||
0`[J;"
|
||||
0!
|
||||
#27000000
|
||||
1`[J;"
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
1!
|
||||
b0 #
|
||||
b0 $
|
||||
#28000000
|
||||
0`[J;"
|
||||
0!
|
||||
#29000000
|
||||
1`[J;"
|
||||
b1 rPs;{
|
||||
b1 6_+(g
|
||||
1!
|
||||
b1 #
|
||||
b1 $
|
||||
#30000000
|
||||
0`[J;"
|
||||
0!
|
||||
#31000000
|
||||
1`[J;"
|
||||
b10 rPs;{
|
||||
b10 6_+(g
|
||||
1!
|
||||
b10 #
|
||||
b10 $
|
||||
#32000000
|
||||
0`[J;"
|
||||
0!
|
||||
#33000000
|
||||
1`[J;"
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
1!
|
||||
b11 #
|
||||
b11 $
|
||||
#34000000
|
||||
0`[J;"
|
||||
0!
|
||||
#35000000
|
||||
1`[J;"
|
||||
b100 rPs;{
|
||||
b100 6_+(g
|
||||
1!
|
||||
b100 #
|
||||
b100 $
|
||||
#36000000
|
||||
0`[J;"
|
||||
0!
|
||||
#37000000
|
||||
1`[J;"
|
||||
b101 rPs;{
|
||||
b101 6_+(g
|
||||
1!
|
||||
b101 #
|
||||
b101 $
|
||||
#38000000
|
||||
0`[J;"
|
||||
0!
|
||||
#39000000
|
||||
1`[J;"
|
||||
b110 rPs;{
|
||||
b110 6_+(g
|
||||
1!
|
||||
b110 #
|
||||
b110 $
|
||||
#40000000
|
||||
0`[J;"
|
||||
0!
|
||||
#41000000
|
||||
1`[J;"
|
||||
b111 rPs;{
|
||||
b111 6_+(g
|
||||
1!
|
||||
b111 #
|
||||
b111 $
|
||||
#42000000
|
||||
0`[J;"
|
||||
0!
|
||||
#43000000
|
||||
1`[J;"
|
||||
b1000 rPs;{
|
||||
b1000 6_+(g
|
||||
1!
|
||||
b1000 #
|
||||
b1000 $
|
||||
#44000000
|
||||
0`[J;"
|
||||
0!
|
||||
#45000000
|
||||
1`[J;"
|
||||
b1001 rPs;{
|
||||
b1001 6_+(g
|
||||
1!
|
||||
b1001 #
|
||||
b1001 $
|
||||
#46000000
|
||||
0`[J;"
|
||||
0!
|
||||
#47000000
|
||||
1`[J;"
|
||||
b1010 rPs;{
|
||||
b1010 6_+(g
|
||||
1!
|
||||
b1010 #
|
||||
b1010 $
|
||||
#48000000
|
||||
0`[J;"
|
||||
0!
|
||||
#49000000
|
||||
1`[J;"
|
||||
b1011 rPs;{
|
||||
b1011 6_+(g
|
||||
1!
|
||||
b1011 #
|
||||
b1011 $
|
||||
#50000000
|
||||
0`[J;"
|
||||
0!
|
||||
#51000000
|
||||
1`[J;"
|
||||
b1100 rPs;{
|
||||
b1100 6_+(g
|
||||
1!
|
||||
b1100 #
|
||||
b1100 $
|
||||
#52000000
|
||||
0`[J;"
|
||||
0!
|
||||
#53000000
|
||||
1`[J;"
|
||||
b1101 rPs;{
|
||||
b1101 6_+(g
|
||||
1!
|
||||
b1101 #
|
||||
b1101 $
|
||||
#54000000
|
||||
0`[J;"
|
||||
0!
|
||||
#55000000
|
||||
1`[J;"
|
||||
b1110 rPs;{
|
||||
b1110 6_+(g
|
||||
1!
|
||||
b1110 #
|
||||
b1110 $
|
||||
#56000000
|
||||
0`[J;"
|
||||
0!
|
||||
#57000000
|
||||
1`[J;"
|
||||
b1111 rPs;{
|
||||
b1111 6_+(g
|
||||
1!
|
||||
b1111 #
|
||||
b1111 $
|
||||
#58000000
|
||||
0`[J;"
|
||||
0!
|
||||
#59000000
|
||||
1`[J;"
|
||||
b0 rPs;{
|
||||
b0 6_+(g
|
||||
1!
|
||||
b0 #
|
||||
b0 $
|
||||
#60000000
|
||||
0`[J;"
|
||||
0!
|
||||
#61000000
|
||||
1`[J;"
|
||||
b1 rPs;{
|
||||
b1 6_+(g
|
||||
1!
|
||||
b1 #
|
||||
b1 $
|
||||
#62000000
|
||||
0`[J;"
|
||||
0!
|
||||
#63000000
|
||||
1`[J;"
|
||||
b10 rPs;{
|
||||
b10 6_+(g
|
||||
1!
|
||||
b10 #
|
||||
b10 $
|
||||
#64000000
|
||||
0`[J;"
|
||||
0!
|
||||
#65000000
|
||||
1`[J;"
|
||||
b11 rPs;{
|
||||
b11 6_+(g
|
||||
1!
|
||||
b11 #
|
||||
b11 $
|
||||
#66000000
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module duplicate_names $end
|
||||
$var wire 8 7[_7. w $end
|
||||
$var wire 8 7[_7." w_2 $end
|
||||
$var wire 8 ! w $end
|
||||
$var wire 8 " w_2 $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
b101 7[_7.
|
||||
b110 7[_7."
|
||||
b101 !
|
||||
b110 "
|
||||
$end
|
||||
#1000000
|
||||
|
|
|
|||
|
|
@ -1,126 +1,126 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module enums $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 0n\U< clk $end
|
||||
$var wire 1 a?A!) rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 1 #ZQY# en $end
|
||||
$var wire 2 8?II+ which_in $end
|
||||
$var wire 4 OO,N+ data_in $end
|
||||
$var wire 2 yr2gr which_out $end
|
||||
$var wire 4 q_O;Y data_out $end
|
||||
$var wire 1 # en $end
|
||||
$var wire 2 $ which_in $end
|
||||
$var wire 4 % data_in $end
|
||||
$var wire 2 & which_out $end
|
||||
$var wire 4 ' data_out $end
|
||||
$scope struct b_out $end
|
||||
$var string 1 7L1gf \$tag $end
|
||||
$var string 1 ( \$tag $end
|
||||
$scope struct HdlSome $end
|
||||
$var wire 1 EO?Ju \0 $end
|
||||
$var wire 1 cGtNN \1 $end
|
||||
$var wire 1 ) \0 $end
|
||||
$var wire 1 * \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct b2_out $end
|
||||
$var string 1 dqd@B \$tag $end
|
||||
$var string 1 + \$tag $end
|
||||
$scope struct HdlSome $end
|
||||
$var wire 1 (FG:I \0 $end
|
||||
$var wire 1 dzy-= \1 $end
|
||||
$var wire 1 , \0 $end
|
||||
$var wire 1 - \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct the_reg $end
|
||||
$var string 1 J#9uO \$tag $end
|
||||
$var string 1 . \$tag $end
|
||||
$scope struct B $end
|
||||
$var reg 1 ca2Gh \0 $end
|
||||
$var reg 1 f)r)? \1 $end
|
||||
$var reg 1 / \0 $end
|
||||
$var reg 1 0 \1 $end
|
||||
$upscope $end
|
||||
$scope struct C $end
|
||||
$scope struct a $end
|
||||
$var reg 1 ;BepJ \[0] $end
|
||||
$var reg 1 J~2;e \[1] $end
|
||||
$var reg 1 1 \[0] $end
|
||||
$var reg 1 2 \[1] $end
|
||||
$upscope $end
|
||||
$var reg 2 w\b)K b $end
|
||||
$var reg 2 3 b $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
00n\U<
|
||||
1a?A!)
|
||||
0#ZQY#
|
||||
b0 8?II+
|
||||
b0 OO,N+
|
||||
b0 yr2gr
|
||||
b0 q_O;Y
|
||||
sHdlNone\x20(0) 7L1gf
|
||||
0EO?Ju
|
||||
0cGtNN
|
||||
sHdlNone\x20(0) dqd@B
|
||||
0(FG:I
|
||||
0dzy-=
|
||||
sA\x20(0) J#9uO
|
||||
0ca2Gh
|
||||
0f)r)?
|
||||
0;BepJ
|
||||
0J~2;e
|
||||
b0 w\b)K
|
||||
0!
|
||||
1"
|
||||
0#
|
||||
b0 $
|
||||
b0 %
|
||||
b0 &
|
||||
b0 '
|
||||
sHdlNone\x20(0) (
|
||||
0)
|
||||
0*
|
||||
sHdlNone\x20(0) +
|
||||
0,
|
||||
0-
|
||||
sA\x20(0) .
|
||||
0/
|
||||
00
|
||||
01
|
||||
02
|
||||
b0 3
|
||||
$end
|
||||
#1000000
|
||||
10n\U<
|
||||
1!
|
||||
#1100000
|
||||
0a?A!)
|
||||
0"
|
||||
#2000000
|
||||
00n\U<
|
||||
0!
|
||||
#3000000
|
||||
10n\U<
|
||||
1!
|
||||
#4000000
|
||||
1#ZQY#
|
||||
b1 8?II+
|
||||
00n\U<
|
||||
1#
|
||||
b1 $
|
||||
0!
|
||||
#5000000
|
||||
10n\U<
|
||||
b1 yr2gr
|
||||
sHdlSome\x20(1) 7L1gf
|
||||
sHdlSome\x20(1) dqd@B
|
||||
sB\x20(1) J#9uO
|
||||
1!
|
||||
b1 &
|
||||
sHdlSome\x20(1) (
|
||||
sHdlSome\x20(1) +
|
||||
sB\x20(1) .
|
||||
#6000000
|
||||
0#ZQY#
|
||||
b0 8?II+
|
||||
00n\U<
|
||||
0#
|
||||
b0 $
|
||||
0!
|
||||
#7000000
|
||||
10n\U<
|
||||
1!
|
||||
#8000000
|
||||
1#ZQY#
|
||||
b1 8?II+
|
||||
b1111 OO,N+
|
||||
00n\U<
|
||||
1#
|
||||
b1 $
|
||||
b1111 %
|
||||
0!
|
||||
#9000000
|
||||
10n\U<
|
||||
b11 q_O;Y
|
||||
1EO?Ju
|
||||
1cGtNN
|
||||
1(FG:I
|
||||
1dzy-=
|
||||
1ca2Gh
|
||||
1f)r)?
|
||||
1;BepJ
|
||||
1J~2;e
|
||||
1!
|
||||
b11 '
|
||||
1)
|
||||
1*
|
||||
1,
|
||||
1-
|
||||
1/
|
||||
10
|
||||
11
|
||||
12
|
||||
#10000000
|
||||
00n\U<
|
||||
0!
|
||||
#11000000
|
||||
10n\U<
|
||||
1!
|
||||
#12000000
|
||||
b10 8?II+
|
||||
00n\U<
|
||||
b10 $
|
||||
0!
|
||||
#13000000
|
||||
10n\U<
|
||||
b10 yr2gr
|
||||
b1111 q_O;Y
|
||||
sHdlNone\x20(0) 7L1gf
|
||||
0EO?Ju
|
||||
0cGtNN
|
||||
sHdlNone\x20(0) dqd@B
|
||||
0(FG:I
|
||||
0dzy-=
|
||||
sC\x20(2) J#9uO
|
||||
b11 w\b)K
|
||||
1!
|
||||
b10 &
|
||||
b1111 '
|
||||
sHdlNone\x20(0) (
|
||||
0)
|
||||
0*
|
||||
sHdlNone\x20(0) +
|
||||
0,
|
||||
0-
|
||||
sC\x20(2) .
|
||||
b11 3
|
||||
#14000000
|
||||
00n\U<
|
||||
0!
|
||||
#15000000
|
||||
10n\U<
|
||||
1!
|
||||
#16000000
|
||||
|
|
|
|||
|
|
@ -1,52 +1,52 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module extern_module $end
|
||||
$var wire 1 `MLd_ i $end
|
||||
$var wire 1 ^;OnJ o $end
|
||||
$var wire 1 ! i $end
|
||||
$var wire 1 " o $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0`MLd_
|
||||
0^;OnJ
|
||||
0!
|
||||
0"
|
||||
$end
|
||||
1^;OnJ
|
||||
1"
|
||||
#500000
|
||||
#1500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#2500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#3500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#4500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#5500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#6500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#7500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#8500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#9500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#10000000
|
||||
1`MLd_
|
||||
1!
|
||||
#10500000
|
||||
#11500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#12500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#13500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#14500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#15500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#16500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#17500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#18500000
|
||||
0^;OnJ
|
||||
0"
|
||||
#19500000
|
||||
1^;OnJ
|
||||
1"
|
||||
#20000000
|
||||
|
|
|
|||
|
|
@ -1,151 +1,151 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module extern_module2 $end
|
||||
$var wire 1 oHT(x en $end
|
||||
$var wire 1 nHT-: clk $end
|
||||
$var wire 8 0:wF& o $end
|
||||
$var wire 1 ! en $end
|
||||
$var wire 1 " clk $end
|
||||
$var wire 8 # o $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
1oHT(x
|
||||
0nHT-:
|
||||
b0 0:wF&
|
||||
1!
|
||||
0"
|
||||
b0 #
|
||||
$end
|
||||
b1001000 0:wF&
|
||||
b1001000 #
|
||||
#1000000
|
||||
1nHT-:
|
||||
b1100101 0:wF&
|
||||
1"
|
||||
b1100101 #
|
||||
#2000000
|
||||
0nHT-:
|
||||
0"
|
||||
#3000000
|
||||
1nHT-:
|
||||
b1101100 0:wF&
|
||||
1"
|
||||
b1101100 #
|
||||
#4000000
|
||||
0nHT-:
|
||||
0"
|
||||
#5000000
|
||||
1nHT-:
|
||||
1"
|
||||
#6000000
|
||||
0nHT-:
|
||||
0"
|
||||
#7000000
|
||||
1nHT-:
|
||||
b1101111 0:wF&
|
||||
1"
|
||||
b1101111 #
|
||||
#8000000
|
||||
0nHT-:
|
||||
0"
|
||||
#9000000
|
||||
1nHT-:
|
||||
b101100 0:wF&
|
||||
1"
|
||||
b101100 #
|
||||
#10000000
|
||||
0oHT(x
|
||||
0nHT-:
|
||||
0!
|
||||
0"
|
||||
#11000000
|
||||
1nHT-:
|
||||
1"
|
||||
#12000000
|
||||
0nHT-:
|
||||
0"
|
||||
#13000000
|
||||
1nHT-:
|
||||
1"
|
||||
#14000000
|
||||
0nHT-:
|
||||
0"
|
||||
#15000000
|
||||
1nHT-:
|
||||
1"
|
||||
#16000000
|
||||
0nHT-:
|
||||
0"
|
||||
#17000000
|
||||
1nHT-:
|
||||
1"
|
||||
#18000000
|
||||
0nHT-:
|
||||
0"
|
||||
#19000000
|
||||
1nHT-:
|
||||
1"
|
||||
#20000000
|
||||
1oHT(x
|
||||
0nHT-:
|
||||
1!
|
||||
0"
|
||||
#21000000
|
||||
1nHT-:
|
||||
b100000 0:wF&
|
||||
1"
|
||||
b100000 #
|
||||
#22000000
|
||||
0nHT-:
|
||||
0"
|
||||
#23000000
|
||||
1nHT-:
|
||||
b1010111 0:wF&
|
||||
1"
|
||||
b1010111 #
|
||||
#24000000
|
||||
0nHT-:
|
||||
0"
|
||||
#25000000
|
||||
1nHT-:
|
||||
b1101111 0:wF&
|
||||
1"
|
||||
b1101111 #
|
||||
#26000000
|
||||
0nHT-:
|
||||
0"
|
||||
#27000000
|
||||
1nHT-:
|
||||
b1110010 0:wF&
|
||||
1"
|
||||
b1110010 #
|
||||
#28000000
|
||||
0nHT-:
|
||||
0"
|
||||
#29000000
|
||||
1nHT-:
|
||||
b1101100 0:wF&
|
||||
1"
|
||||
b1101100 #
|
||||
#30000000
|
||||
0oHT(x
|
||||
0nHT-:
|
||||
0!
|
||||
0"
|
||||
#31000000
|
||||
1nHT-:
|
||||
1"
|
||||
#32000000
|
||||
0nHT-:
|
||||
0"
|
||||
#33000000
|
||||
1nHT-:
|
||||
1"
|
||||
#34000000
|
||||
0nHT-:
|
||||
0"
|
||||
#35000000
|
||||
1nHT-:
|
||||
1"
|
||||
#36000000
|
||||
0nHT-:
|
||||
0"
|
||||
#37000000
|
||||
1nHT-:
|
||||
1"
|
||||
#38000000
|
||||
0nHT-:
|
||||
0"
|
||||
#39000000
|
||||
1nHT-:
|
||||
1"
|
||||
#40000000
|
||||
1oHT(x
|
||||
0nHT-:
|
||||
1!
|
||||
0"
|
||||
#41000000
|
||||
1nHT-:
|
||||
b1100100 0:wF&
|
||||
1"
|
||||
b1100100 #
|
||||
#42000000
|
||||
0nHT-:
|
||||
0"
|
||||
#43000000
|
||||
1nHT-:
|
||||
b100001 0:wF&
|
||||
1"
|
||||
b100001 #
|
||||
#44000000
|
||||
0nHT-:
|
||||
0"
|
||||
#45000000
|
||||
1nHT-:
|
||||
b1010 0:wF&
|
||||
1"
|
||||
b1010 #
|
||||
#46000000
|
||||
0nHT-:
|
||||
0"
|
||||
#47000000
|
||||
1nHT-:
|
||||
b1001000 0:wF&
|
||||
1"
|
||||
b1001000 #
|
||||
#48000000
|
||||
0nHT-:
|
||||
0"
|
||||
#49000000
|
||||
1nHT-:
|
||||
b1100101 0:wF&
|
||||
1"
|
||||
b1100101 #
|
||||
#50000000
|
||||
0oHT(x
|
||||
0nHT-:
|
||||
0!
|
||||
0"
|
||||
#51000000
|
||||
1nHT-:
|
||||
1"
|
||||
#52000000
|
||||
0nHT-:
|
||||
0"
|
||||
#53000000
|
||||
1nHT-:
|
||||
1"
|
||||
#54000000
|
||||
0nHT-:
|
||||
0"
|
||||
#55000000
|
||||
1nHT-:
|
||||
1"
|
||||
#56000000
|
||||
0nHT-:
|
||||
0"
|
||||
#57000000
|
||||
1nHT-:
|
||||
1"
|
||||
#58000000
|
||||
0nHT-:
|
||||
0"
|
||||
#59000000
|
||||
1nHT-:
|
||||
1"
|
||||
#60000000
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,408 +1,408 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module memories $end
|
||||
$scope struct r $end
|
||||
$var wire 4 z&0Qk addr $end
|
||||
$var wire 1 o.T)# en $end
|
||||
$var wire 1 :XNoK clk $end
|
||||
$var wire 4 ! addr $end
|
||||
$var wire 1 " en $end
|
||||
$var wire 1 # clk $end
|
||||
$scope struct data $end
|
||||
$var wire 8 Cq]A% \0 $end
|
||||
$var wire 8 avKNj \1 $end
|
||||
$var wire 8 $ \0 $end
|
||||
$var wire 8 % \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct w $end
|
||||
$var wire 4 p<O.M addr $end
|
||||
$var wire 1 #9)l8 en $end
|
||||
$var wire 1 QX!^| clk $end
|
||||
$var wire 4 & addr $end
|
||||
$var wire 1 ' en $end
|
||||
$var wire 1 ( clk $end
|
||||
$scope struct data $end
|
||||
$var wire 8 G"IXQ \0 $end
|
||||
$var wire 8 h\t:E \1 $end
|
||||
$var wire 8 ) \0 $end
|
||||
$var wire 8 * \1 $end
|
||||
$upscope $end
|
||||
$scope struct mask $end
|
||||
$var wire 1 FCuNz \0 $end
|
||||
$var wire 1 /Y7%J \1 $end
|
||||
$var wire 1 + \0 $end
|
||||
$var wire 1 , \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct mem $end
|
||||
$scope struct contents $end
|
||||
$scope struct \[0] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 4d[cL \0 $end
|
||||
$var reg 8 {qEUV \1 $end
|
||||
$var reg 8 9 \0 $end
|
||||
$var reg 8 I \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[1] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 c`NPR \0 $end
|
||||
$var reg 8 vK:33 \1 $end
|
||||
$var reg 8 : \0 $end
|
||||
$var reg 8 J \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[2] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 ihYp_ \0 $end
|
||||
$var reg 8 QZb%P \1 $end
|
||||
$var reg 8 ; \0 $end
|
||||
$var reg 8 K \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[3] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 ,O%<$ \0 $end
|
||||
$var reg 8 @?uSf \1 $end
|
||||
$var reg 8 < \0 $end
|
||||
$var reg 8 L \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[4] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 N[IF& \0 $end
|
||||
$var reg 8 Zf9lw \1 $end
|
||||
$var reg 8 = \0 $end
|
||||
$var reg 8 M \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[5] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 dr6lq \0 $end
|
||||
$var reg 8 fc"UR \1 $end
|
||||
$var reg 8 > \0 $end
|
||||
$var reg 8 N \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[6] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 xpw5\ \0 $end
|
||||
$var reg 8 dd$?K \1 $end
|
||||
$var reg 8 ? \0 $end
|
||||
$var reg 8 O \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[7] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 vH;}2 \0 $end
|
||||
$var reg 8 ILB?4 \1 $end
|
||||
$var reg 8 @ \0 $end
|
||||
$var reg 8 P \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[8] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 /X4v> \0 $end
|
||||
$var reg 8 &V*EE \1 $end
|
||||
$var reg 8 A \0 $end
|
||||
$var reg 8 Q \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[9] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 IczZe \0 $end
|
||||
$var reg 8 unX>R \1 $end
|
||||
$var reg 8 B \0 $end
|
||||
$var reg 8 R \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[10] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 0hTyY \0 $end
|
||||
$var reg 8 9K_w) \1 $end
|
||||
$var reg 8 C \0 $end
|
||||
$var reg 8 S \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[11] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 +C/Sz \0 $end
|
||||
$var reg 8 }Y{:o \1 $end
|
||||
$var reg 8 D \0 $end
|
||||
$var reg 8 T \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[12] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 S6-5u \0 $end
|
||||
$var reg 8 9q6)w \1 $end
|
||||
$var reg 8 E \0 $end
|
||||
$var reg 8 U \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[13] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 !c<w* \0 $end
|
||||
$var reg 8 Ve@)M \1 $end
|
||||
$var reg 8 F \0 $end
|
||||
$var reg 8 V \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[14] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 OiF9* \0 $end
|
||||
$var reg 8 Ylyz~ \1 $end
|
||||
$var reg 8 G \0 $end
|
||||
$var reg 8 W \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[15] $end
|
||||
$scope struct mem $end
|
||||
$var reg 8 ?+m9D \0 $end
|
||||
$var reg 8 A6sb~ \1 $end
|
||||
$var reg 8 H \0 $end
|
||||
$var reg 8 X \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct r0 $end
|
||||
$var wire 4 ="2wN addr $end
|
||||
$var wire 1 jy78F en $end
|
||||
$var wire 1 \o>8T clk $end
|
||||
$var wire 4 - addr $end
|
||||
$var wire 1 . en $end
|
||||
$var wire 1 / clk $end
|
||||
$scope struct data $end
|
||||
$var wire 8 \k#l \0 $end
|
||||
$var wire 8 olx7O \1 $end
|
||||
$var wire 8 0 \0 $end
|
||||
$var wire 8 1 \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct w1 $end
|
||||
$var wire 4 H,W!J addr $end
|
||||
$var wire 1 "7?3I en $end
|
||||
$var wire 1 DC/;" clk $end
|
||||
$var wire 4 2 addr $end
|
||||
$var wire 1 3 en $end
|
||||
$var wire 1 4 clk $end
|
||||
$scope struct data $end
|
||||
$var wire 8 0DrV' \0 $end
|
||||
$var wire 8 wa!Cx \1 $end
|
||||
$var wire 8 5 \0 $end
|
||||
$var wire 8 6 \1 $end
|
||||
$upscope $end
|
||||
$scope struct mask $end
|
||||
$var wire 1 u^b&R \0 $end
|
||||
$var wire 1 Ic\|v \1 $end
|
||||
$var wire 1 7 \0 $end
|
||||
$var wire 1 8 \1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
b1 4d[cL
|
||||
b100011 {qEUV
|
||||
b1 c`NPR
|
||||
b100011 vK:33
|
||||
b1 ihYp_
|
||||
b100011 QZb%P
|
||||
b1 ,O%<$
|
||||
b100011 @?uSf
|
||||
b1 N[IF&
|
||||
b100011 Zf9lw
|
||||
b1 dr6lq
|
||||
b100011 fc"UR
|
||||
b1 xpw5\
|
||||
b100011 dd$?K
|
||||
b1 vH;}2
|
||||
b100011 ILB?4
|
||||
b1 /X4v>
|
||||
b100011 &V*EE
|
||||
b1 IczZe
|
||||
b100011 unX>R
|
||||
b1 0hTyY
|
||||
b100011 9K_w)
|
||||
b1 +C/Sz
|
||||
b100011 }Y{:o
|
||||
b1 S6-5u
|
||||
b100011 9q6)w
|
||||
b1 !c<w*
|
||||
b100011 Ve@)M
|
||||
b1 OiF9*
|
||||
b100011 Ylyz~
|
||||
b1 ?+m9D
|
||||
b100011 A6sb~
|
||||
b0 z&0Qk
|
||||
0o.T)#
|
||||
0:XNoK
|
||||
b0 Cq]A%
|
||||
b0 avKNj
|
||||
b0 p<O.M
|
||||
0#9)l8
|
||||
0QX!^|
|
||||
b0 G"IXQ
|
||||
b0 h\t:E
|
||||
0FCuNz
|
||||
0/Y7%J
|
||||
b0 ="2wN
|
||||
0jy78F
|
||||
0\o>8T
|
||||
b0 \k#l
|
||||
b0 olx7O
|
||||
b0 H,W!J
|
||||
0"7?3I
|
||||
0DC/;"
|
||||
b0 0DrV'
|
||||
b0 wa!Cx
|
||||
0u^b&R
|
||||
0Ic\|v
|
||||
b1 9
|
||||
b100011 I
|
||||
b1 :
|
||||
b100011 J
|
||||
b1 ;
|
||||
b100011 K
|
||||
b1 <
|
||||
b100011 L
|
||||
b1 =
|
||||
b100011 M
|
||||
b1 >
|
||||
b100011 N
|
||||
b1 ?
|
||||
b100011 O
|
||||
b1 @
|
||||
b100011 P
|
||||
b1 A
|
||||
b100011 Q
|
||||
b1 B
|
||||
b100011 R
|
||||
b1 C
|
||||
b100011 S
|
||||
b1 D
|
||||
b100011 T
|
||||
b1 E
|
||||
b100011 U
|
||||
b1 F
|
||||
b100011 V
|
||||
b1 G
|
||||
b100011 W
|
||||
b1 H
|
||||
b100011 X
|
||||
b0 !
|
||||
0"
|
||||
0#
|
||||
b0 $
|
||||
b0 %
|
||||
b0 &
|
||||
0'
|
||||
0(
|
||||
b0 )
|
||||
b0 *
|
||||
0+
|
||||
0,
|
||||
b0 -
|
||||
0.
|
||||
0/
|
||||
b0 0
|
||||
b0 1
|
||||
b0 2
|
||||
03
|
||||
04
|
||||
b0 5
|
||||
b0 6
|
||||
07
|
||||
08
|
||||
$end
|
||||
#1000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#2000000
|
||||
1o.T)#
|
||||
0:XNoK
|
||||
b1 Cq]A%
|
||||
b100011 avKNj
|
||||
1#9)l8
|
||||
0QX!^|
|
||||
b10000 G"IXQ
|
||||
b100000 h\t:E
|
||||
1FCuNz
|
||||
1/Y7%J
|
||||
1jy78F
|
||||
0\o>8T
|
||||
b1 \k#l
|
||||
b100011 olx7O
|
||||
1"7?3I
|
||||
0DC/;"
|
||||
b10000 0DrV'
|
||||
b100000 wa!Cx
|
||||
1u^b&R
|
||||
1Ic\|v
|
||||
1"
|
||||
0#
|
||||
b1 $
|
||||
b100011 %
|
||||
1'
|
||||
0(
|
||||
b10000 )
|
||||
b100000 *
|
||||
1+
|
||||
1,
|
||||
1.
|
||||
0/
|
||||
b1 0
|
||||
b100011 1
|
||||
13
|
||||
04
|
||||
b10000 5
|
||||
b100000 6
|
||||
17
|
||||
18
|
||||
#3000000
|
||||
b10000 4d[cL
|
||||
b100000 {qEUV
|
||||
1:XNoK
|
||||
b10000 Cq]A%
|
||||
b100000 avKNj
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
b10000 \k#l
|
||||
b100000 olx7O
|
||||
1DC/;"
|
||||
b10000 9
|
||||
b100000 I
|
||||
1#
|
||||
b10000 $
|
||||
b100000 %
|
||||
1(
|
||||
1/
|
||||
b10000 0
|
||||
b100000 1
|
||||
14
|
||||
#4000000
|
||||
0:XNoK
|
||||
0QX!^|
|
||||
b110000 G"IXQ
|
||||
b1000000 h\t:E
|
||||
0FCuNz
|
||||
0\o>8T
|
||||
0DC/;"
|
||||
b110000 0DrV'
|
||||
b1000000 wa!Cx
|
||||
0u^b&R
|
||||
0#
|
||||
0(
|
||||
b110000 )
|
||||
b1000000 *
|
||||
0+
|
||||
0/
|
||||
04
|
||||
b110000 5
|
||||
b1000000 6
|
||||
07
|
||||
#5000000
|
||||
b10000 4d[cL
|
||||
b1000000 {qEUV
|
||||
1:XNoK
|
||||
b1000000 avKNj
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
b1000000 olx7O
|
||||
1DC/;"
|
||||
b10000 9
|
||||
b1000000 I
|
||||
1#
|
||||
b1000000 %
|
||||
1(
|
||||
1/
|
||||
b1000000 1
|
||||
14
|
||||
#6000000
|
||||
0:XNoK
|
||||
0QX!^|
|
||||
b1010000 G"IXQ
|
||||
b1100000 h\t:E
|
||||
1FCuNz
|
||||
0/Y7%J
|
||||
0\o>8T
|
||||
0DC/;"
|
||||
b1010000 0DrV'
|
||||
b1100000 wa!Cx
|
||||
1u^b&R
|
||||
0Ic\|v
|
||||
0#
|
||||
0(
|
||||
b1010000 )
|
||||
b1100000 *
|
||||
1+
|
||||
0,
|
||||
0/
|
||||
04
|
||||
b1010000 5
|
||||
b1100000 6
|
||||
17
|
||||
08
|
||||
#7000000
|
||||
b1010000 4d[cL
|
||||
b1000000 {qEUV
|
||||
1:XNoK
|
||||
b1010000 Cq]A%
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
b1010000 \k#l
|
||||
1DC/;"
|
||||
b1010000 9
|
||||
b1000000 I
|
||||
1#
|
||||
b1010000 $
|
||||
1(
|
||||
1/
|
||||
b1010000 0
|
||||
14
|
||||
#8000000
|
||||
0:XNoK
|
||||
0QX!^|
|
||||
b1110000 G"IXQ
|
||||
b10000000 h\t:E
|
||||
0FCuNz
|
||||
0\o>8T
|
||||
0DC/;"
|
||||
b1110000 0DrV'
|
||||
b10000000 wa!Cx
|
||||
0u^b&R
|
||||
0#
|
||||
0(
|
||||
b1110000 )
|
||||
b10000000 *
|
||||
0+
|
||||
0/
|
||||
04
|
||||
b1110000 5
|
||||
b10000000 6
|
||||
07
|
||||
#9000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#10000000
|
||||
0:XNoK
|
||||
0#9)l8
|
||||
0QX!^|
|
||||
b10010000 G"IXQ
|
||||
b10100000 h\t:E
|
||||
0\o>8T
|
||||
0"7?3I
|
||||
0DC/;"
|
||||
b10010000 0DrV'
|
||||
b10100000 wa!Cx
|
||||
0#
|
||||
0'
|
||||
0(
|
||||
b10010000 )
|
||||
b10100000 *
|
||||
0/
|
||||
03
|
||||
04
|
||||
b10010000 5
|
||||
b10100000 6
|
||||
#11000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#12000000
|
||||
0:XNoK
|
||||
b1 p<O.M
|
||||
1#9)l8
|
||||
0QX!^|
|
||||
1FCuNz
|
||||
1/Y7%J
|
||||
0\o>8T
|
||||
b1 H,W!J
|
||||
1"7?3I
|
||||
0DC/;"
|
||||
1u^b&R
|
||||
1Ic\|v
|
||||
0#
|
||||
b1 &
|
||||
1'
|
||||
0(
|
||||
1+
|
||||
1,
|
||||
0/
|
||||
b1 2
|
||||
13
|
||||
04
|
||||
17
|
||||
18
|
||||
#13000000
|
||||
b10010000 c`NPR
|
||||
b10100000 vK:33
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
b10010000 :
|
||||
b10100000 J
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#14000000
|
||||
0:XNoK
|
||||
b10 p<O.M
|
||||
0QX!^|
|
||||
b10110000 G"IXQ
|
||||
b11000000 h\t:E
|
||||
0\o>8T
|
||||
b10 H,W!J
|
||||
0DC/;"
|
||||
b10110000 0DrV'
|
||||
b11000000 wa!Cx
|
||||
0#
|
||||
b10 &
|
||||
0(
|
||||
b10110000 )
|
||||
b11000000 *
|
||||
0/
|
||||
b10 2
|
||||
04
|
||||
b10110000 5
|
||||
b11000000 6
|
||||
#15000000
|
||||
b10110000 ihYp_
|
||||
b11000000 QZb%P
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
b10110000 ;
|
||||
b11000000 K
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#16000000
|
||||
0:XNoK
|
||||
0#9)l8
|
||||
0QX!^|
|
||||
b11010000 G"IXQ
|
||||
b11100000 h\t:E
|
||||
0\o>8T
|
||||
0"7?3I
|
||||
0DC/;"
|
||||
b11010000 0DrV'
|
||||
b11100000 wa!Cx
|
||||
0#
|
||||
0'
|
||||
0(
|
||||
b11010000 )
|
||||
b11100000 *
|
||||
0/
|
||||
03
|
||||
04
|
||||
b11010000 5
|
||||
b11100000 6
|
||||
#17000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#18000000
|
||||
b1 z&0Qk
|
||||
0:XNoK
|
||||
b10010000 Cq]A%
|
||||
b10100000 avKNj
|
||||
0QX!^|
|
||||
b1 ="2wN
|
||||
0\o>8T
|
||||
b10010000 \k#l
|
||||
b10100000 olx7O
|
||||
0DC/;"
|
||||
b1 !
|
||||
0#
|
||||
b10010000 $
|
||||
b10100000 %
|
||||
0(
|
||||
b1 -
|
||||
0/
|
||||
b10010000 0
|
||||
b10100000 1
|
||||
04
|
||||
#19000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#20000000
|
||||
b10 z&0Qk
|
||||
0:XNoK
|
||||
b10110000 Cq]A%
|
||||
b11000000 avKNj
|
||||
0QX!^|
|
||||
b10 ="2wN
|
||||
0\o>8T
|
||||
b10110000 \k#l
|
||||
b11000000 olx7O
|
||||
0DC/;"
|
||||
b10 !
|
||||
0#
|
||||
b10110000 $
|
||||
b11000000 %
|
||||
0(
|
||||
b10 -
|
||||
0/
|
||||
b10110000 0
|
||||
b11000000 1
|
||||
04
|
||||
#21000000
|
||||
1:XNoK
|
||||
1QX!^|
|
||||
1\o>8T
|
||||
1DC/;"
|
||||
1#
|
||||
1(
|
||||
1/
|
||||
14
|
||||
#22000000
|
||||
0:XNoK
|
||||
0QX!^|
|
||||
0\o>8T
|
||||
0DC/;"
|
||||
0#
|
||||
0(
|
||||
0/
|
||||
04
|
||||
|
|
|
|||
|
|
@ -1,363 +1,363 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module memories2 $end
|
||||
$scope struct rw $end
|
||||
$var wire 3 xkkG> addr $end
|
||||
$var wire 1 HoA{1 en $end
|
||||
$var wire 1 C*2BQ clk $end
|
||||
$var wire 2 ueF!x rdata $end
|
||||
$var wire 1 m\l/p wmode $end
|
||||
$var wire 2 WmjEh wdata $end
|
||||
$var wire 1 +3E@H wmask $end
|
||||
$var wire 3 ! addr $end
|
||||
$var wire 1 " en $end
|
||||
$var wire 1 # clk $end
|
||||
$var wire 2 $ rdata $end
|
||||
$var wire 1 % wmode $end
|
||||
$var wire 2 & wdata $end
|
||||
$var wire 1 ' wmask $end
|
||||
$upscope $end
|
||||
$scope struct mem $end
|
||||
$scope struct contents $end
|
||||
$scope struct \[0] $end
|
||||
$scope struct mem $end
|
||||
$var string 1 ujd9u \$tag $end
|
||||
$var reg 1 *5lV# HdlSome $end
|
||||
$var string 1 1 \$tag $end
|
||||
$var reg 1 6 HdlSome $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[1] $end
|
||||
$scope struct mem $end
|
||||
$var string 1 *qL|n \$tag $end
|
||||
$var reg 1 ^/FDC HdlSome $end
|
||||
$var string 1 2 \$tag $end
|
||||
$var reg 1 7 HdlSome $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[2] $end
|
||||
$scope struct mem $end
|
||||
$var string 1 r*7|@ \$tag $end
|
||||
$var reg 1 YMY"3 HdlSome $end
|
||||
$var string 1 3 \$tag $end
|
||||
$var reg 1 8 HdlSome $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[3] $end
|
||||
$scope struct mem $end
|
||||
$var string 1 jj/6F \$tag $end
|
||||
$var reg 1 S+Uy} HdlSome $end
|
||||
$var string 1 4 \$tag $end
|
||||
$var reg 1 9 HdlSome $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct \[4] $end
|
||||
$scope struct mem $end
|
||||
$var string 1 H72IP \$tag $end
|
||||
$var reg 1 vH{({ HdlSome $end
|
||||
$var string 1 5 \$tag $end
|
||||
$var reg 1 : HdlSome $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct rw0 $end
|
||||
$var wire 3 uabMI addr $end
|
||||
$var wire 1 LEn[l en $end
|
||||
$var wire 1 OpH)U clk $end
|
||||
$var wire 3 ( addr $end
|
||||
$var wire 1 ) en $end
|
||||
$var wire 1 * clk $end
|
||||
$scope struct rdata $end
|
||||
$var string 1 [}rcZ \$tag $end
|
||||
$var wire 1 5f=Y~ HdlSome $end
|
||||
$var string 1 + \$tag $end
|
||||
$var wire 1 , HdlSome $end
|
||||
$upscope $end
|
||||
$var wire 1 6c_9_ wmode $end
|
||||
$var wire 1 - wmode $end
|
||||
$scope struct wdata $end
|
||||
$var string 1 $hfRN \$tag $end
|
||||
$var wire 1 rop,b HdlSome $end
|
||||
$var string 1 . \$tag $end
|
||||
$var wire 1 / HdlSome $end
|
||||
$upscope $end
|
||||
$var wire 1 Ly=US wmask $end
|
||||
$var wire 1 0 wmask $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
sHdlSome\x20(1) ujd9u
|
||||
1*5lV#
|
||||
sHdlSome\x20(1) *qL|n
|
||||
1^/FDC
|
||||
sHdlSome\x20(1) r*7|@
|
||||
1YMY"3
|
||||
sHdlSome\x20(1) jj/6F
|
||||
1S+Uy}
|
||||
sHdlSome\x20(1) H72IP
|
||||
1vH{({
|
||||
b0 xkkG>
|
||||
0HoA{1
|
||||
0C*2BQ
|
||||
b0 ueF!x
|
||||
0m\l/p
|
||||
b0 WmjEh
|
||||
0+3E@H
|
||||
b0 uabMI
|
||||
0LEn[l
|
||||
0OpH)U
|
||||
sHdlNone\x20(0) [}rcZ
|
||||
05f=Y~
|
||||
06c_9_
|
||||
sHdlNone\x20(0) $hfRN
|
||||
0rop,b
|
||||
0Ly=US
|
||||
sHdlSome\x20(1) 1
|
||||
16
|
||||
sHdlSome\x20(1) 2
|
||||
17
|
||||
sHdlSome\x20(1) 3
|
||||
18
|
||||
sHdlSome\x20(1) 4
|
||||
19
|
||||
sHdlSome\x20(1) 5
|
||||
1:
|
||||
b0 !
|
||||
0"
|
||||
0#
|
||||
b0 $
|
||||
0%
|
||||
b0 &
|
||||
0'
|
||||
b0 (
|
||||
0)
|
||||
0*
|
||||
sHdlNone\x20(0) +
|
||||
0,
|
||||
0-
|
||||
sHdlNone\x20(0) .
|
||||
0/
|
||||
00
|
||||
$end
|
||||
#250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#500000
|
||||
#750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#1000000
|
||||
1HoA{1
|
||||
1LEn[l
|
||||
1"
|
||||
1)
|
||||
#1250000
|
||||
1C*2BQ
|
||||
b11 ueF!x
|
||||
1OpH)U
|
||||
sHdlSome\x20(1) [}rcZ
|
||||
15f=Y~
|
||||
1#
|
||||
b11 $
|
||||
1*
|
||||
sHdlSome\x20(1) +
|
||||
1,
|
||||
#1500000
|
||||
#1750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#2000000
|
||||
0HoA{1
|
||||
0LEn[l
|
||||
0"
|
||||
0)
|
||||
#2250000
|
||||
1C*2BQ
|
||||
b0 ueF!x
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) [}rcZ
|
||||
05f=Y~
|
||||
1#
|
||||
b0 $
|
||||
1*
|
||||
sHdlNone\x20(0) +
|
||||
0,
|
||||
#2500000
|
||||
#2750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#3000000
|
||||
1HoA{1
|
||||
1m\l/p
|
||||
1+3E@H
|
||||
1LEn[l
|
||||
16c_9_
|
||||
1Ly=US
|
||||
1"
|
||||
1%
|
||||
1'
|
||||
1)
|
||||
1-
|
||||
10
|
||||
#3250000
|
||||
sHdlNone\x20(0) ujd9u
|
||||
0*5lV#
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) 1
|
||||
06
|
||||
1#
|
||||
1*
|
||||
#3500000
|
||||
#3750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#4000000
|
||||
0m\l/p
|
||||
0+3E@H
|
||||
06c_9_
|
||||
0Ly=US
|
||||
0%
|
||||
0'
|
||||
0-
|
||||
00
|
||||
#4250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#4500000
|
||||
#4750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#5000000
|
||||
1m\l/p
|
||||
b11 WmjEh
|
||||
16c_9_
|
||||
sHdlSome\x20(1) $hfRN
|
||||
1rop,b
|
||||
1%
|
||||
b11 &
|
||||
1-
|
||||
sHdlSome\x20(1) .
|
||||
1/
|
||||
#5250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#5500000
|
||||
#5750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#6000000
|
||||
b1 xkkG>
|
||||
b1 WmjEh
|
||||
1+3E@H
|
||||
b1 uabMI
|
||||
0rop,b
|
||||
1Ly=US
|
||||
b1 !
|
||||
b1 &
|
||||
1'
|
||||
b1 (
|
||||
0/
|
||||
10
|
||||
#6250000
|
||||
sHdlSome\x20(1) *qL|n
|
||||
0^/FDC
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
sHdlSome\x20(1) 2
|
||||
07
|
||||
1#
|
||||
1*
|
||||
#6500000
|
||||
#6750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#7000000
|
||||
b10 xkkG>
|
||||
b10 WmjEh
|
||||
b10 uabMI
|
||||
sHdlNone\x20(0) $hfRN
|
||||
b10 !
|
||||
b10 &
|
||||
b10 (
|
||||
sHdlNone\x20(0) .
|
||||
#7250000
|
||||
sHdlNone\x20(0) r*7|@
|
||||
0YMY"3
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) 3
|
||||
08
|
||||
1#
|
||||
1*
|
||||
#7500000
|
||||
#7750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#8000000
|
||||
b11 xkkG>
|
||||
b11 WmjEh
|
||||
b11 uabMI
|
||||
sHdlSome\x20(1) $hfRN
|
||||
1rop,b
|
||||
b11 !
|
||||
b11 &
|
||||
b11 (
|
||||
sHdlSome\x20(1) .
|
||||
1/
|
||||
#8250000
|
||||
sHdlSome\x20(1) jj/6F
|
||||
1S+Uy}
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
sHdlSome\x20(1) 4
|
||||
19
|
||||
1#
|
||||
1*
|
||||
#8500000
|
||||
#8750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#9000000
|
||||
b100 xkkG>
|
||||
b10 WmjEh
|
||||
b100 uabMI
|
||||
sHdlNone\x20(0) $hfRN
|
||||
0rop,b
|
||||
b100 !
|
||||
b10 &
|
||||
b100 (
|
||||
sHdlNone\x20(0) .
|
||||
0/
|
||||
#9250000
|
||||
sHdlNone\x20(0) H72IP
|
||||
0vH{({
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) 5
|
||||
0:
|
||||
1#
|
||||
1*
|
||||
#9500000
|
||||
#9750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#10000000
|
||||
b101 xkkG>
|
||||
b1 WmjEh
|
||||
b101 uabMI
|
||||
sHdlSome\x20(1) $hfRN
|
||||
b101 !
|
||||
b1 &
|
||||
b101 (
|
||||
sHdlSome\x20(1) .
|
||||
#10250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#10500000
|
||||
#10750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#11000000
|
||||
b110 xkkG>
|
||||
b110 uabMI
|
||||
b110 !
|
||||
b110 (
|
||||
#11250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#11500000
|
||||
#11750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#12000000
|
||||
b111 xkkG>
|
||||
b111 uabMI
|
||||
b111 !
|
||||
b111 (
|
||||
#12250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#12500000
|
||||
#12750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#13000000
|
||||
0m\l/p
|
||||
b0 WmjEh
|
||||
0+3E@H
|
||||
06c_9_
|
||||
sHdlNone\x20(0) $hfRN
|
||||
0Ly=US
|
||||
0%
|
||||
b0 &
|
||||
0'
|
||||
0-
|
||||
sHdlNone\x20(0) .
|
||||
00
|
||||
#13250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#13500000
|
||||
#13750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#14000000
|
||||
b110 xkkG>
|
||||
b110 uabMI
|
||||
b110 !
|
||||
b110 (
|
||||
#14250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#14500000
|
||||
#14750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#15000000
|
||||
b101 xkkG>
|
||||
b101 uabMI
|
||||
b101 !
|
||||
b101 (
|
||||
#15250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#15500000
|
||||
#15750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#16000000
|
||||
b100 xkkG>
|
||||
b100 uabMI
|
||||
b100 !
|
||||
b100 (
|
||||
#16250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#16500000
|
||||
#16750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#17000000
|
||||
b11 xkkG>
|
||||
b11 uabMI
|
||||
b11 !
|
||||
b11 (
|
||||
#17250000
|
||||
1C*2BQ
|
||||
b11 ueF!x
|
||||
1OpH)U
|
||||
sHdlSome\x20(1) [}rcZ
|
||||
15f=Y~
|
||||
1#
|
||||
b11 $
|
||||
1*
|
||||
sHdlSome\x20(1) +
|
||||
1,
|
||||
#17500000
|
||||
#17750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#18000000
|
||||
b10 xkkG>
|
||||
b10 uabMI
|
||||
b10 !
|
||||
b10 (
|
||||
#18250000
|
||||
1C*2BQ
|
||||
b0 ueF!x
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) [}rcZ
|
||||
05f=Y~
|
||||
1#
|
||||
b0 $
|
||||
1*
|
||||
sHdlNone\x20(0) +
|
||||
0,
|
||||
#18500000
|
||||
#18750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#19000000
|
||||
b0 xkkG>
|
||||
b0 uabMI
|
||||
b0 !
|
||||
b0 (
|
||||
#19250000
|
||||
1C*2BQ
|
||||
1OpH)U
|
||||
1#
|
||||
1*
|
||||
#19500000
|
||||
#19750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#20000000
|
||||
b1 xkkG>
|
||||
b1 uabMI
|
||||
b1 !
|
||||
b1 (
|
||||
#20250000
|
||||
1C*2BQ
|
||||
b1 ueF!x
|
||||
1OpH)U
|
||||
sHdlSome\x20(1) [}rcZ
|
||||
1#
|
||||
b1 $
|
||||
1*
|
||||
sHdlSome\x20(1) +
|
||||
#20500000
|
||||
#20750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#21000000
|
||||
b0 xkkG>
|
||||
0HoA{1
|
||||
b0 uabMI
|
||||
0LEn[l
|
||||
b0 !
|
||||
0"
|
||||
b0 (
|
||||
0)
|
||||
#21250000
|
||||
1C*2BQ
|
||||
b0 ueF!x
|
||||
1OpH)U
|
||||
sHdlNone\x20(0) [}rcZ
|
||||
1#
|
||||
b0 $
|
||||
1*
|
||||
sHdlNone\x20(0) +
|
||||
#21500000
|
||||
#21750000
|
||||
0C*2BQ
|
||||
0OpH)U
|
||||
0#
|
||||
0*
|
||||
#22000000
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,47 +1,47 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module mod1 $end
|
||||
$scope struct o $end
|
||||
$var wire 4 avK(^ i $end
|
||||
$var wire 2 Q2~aG o $end
|
||||
$var wire 2 DXK'| i2 $end
|
||||
$var wire 4 cPuix o2 $end
|
||||
$var wire 4 ! i $end
|
||||
$var wire 2 " o $end
|
||||
$var wire 2 # i2 $end
|
||||
$var wire 4 $ o2 $end
|
||||
$upscope $end
|
||||
$scope struct child $end
|
||||
$var wire 4 ($5K7 i $end
|
||||
$var wire 2 %6Wv" o $end
|
||||
$var wire 2 +|-AU i2 $end
|
||||
$var wire 4 Hw?%j o2 $end
|
||||
$var wire 4 ) i $end
|
||||
$var wire 2 * o $end
|
||||
$var wire 2 + i2 $end
|
||||
$var wire 4 , o2 $end
|
||||
$upscope $end
|
||||
$scope module mod1_child $end
|
||||
$var wire 4 4}s%= i $end
|
||||
$var wire 2 }IY?g o $end
|
||||
$var wire 2 of42K i2 $end
|
||||
$var wire 4 D9]&= o2 $end
|
||||
$var wire 4 % i $end
|
||||
$var wire 2 & o $end
|
||||
$var wire 2 ' i2 $end
|
||||
$var wire 4 ( o2 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
b11 avK(^
|
||||
b11 Q2~aG
|
||||
b10 DXK'|
|
||||
b1110 cPuix
|
||||
b11 4}s%=
|
||||
b11 }IY?g
|
||||
b10 of42K
|
||||
b1110 D9]&=
|
||||
b11 ($5K7
|
||||
b11 %6Wv"
|
||||
b10 +|-AU
|
||||
b1110 Hw?%j
|
||||
b11 !
|
||||
b11 "
|
||||
b10 #
|
||||
b1110 $
|
||||
b11 %
|
||||
b11 &
|
||||
b10 '
|
||||
b1110 (
|
||||
b11 )
|
||||
b11 *
|
||||
b10 +
|
||||
b1110 ,
|
||||
$end
|
||||
#1000000
|
||||
b1010 avK(^
|
||||
b10 Q2~aG
|
||||
b1111 cPuix
|
||||
b1010 4}s%=
|
||||
b10 }IY?g
|
||||
b1111 D9]&=
|
||||
b1010 ($5K7
|
||||
b10 %6Wv"
|
||||
b1111 Hw?%j
|
||||
b1010 !
|
||||
b10 "
|
||||
b1111 $
|
||||
b1010 %
|
||||
b10 &
|
||||
b1111 (
|
||||
b1010 )
|
||||
b10 *
|
||||
b1111 ,
|
||||
#2000000
|
||||
|
|
|
|||
|
|
@ -1,31 +1,31 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module phantom_const $end
|
||||
$scope struct out $end
|
||||
$var string 1 Ru)8A \[0] $end
|
||||
$var string 1 y&ssi \[1] $end
|
||||
$var string 1 ! \[0] $end
|
||||
$var string 1 " \[1] $end
|
||||
$upscope $end
|
||||
$scope struct mem $end
|
||||
$scope struct contents $end
|
||||
$scope struct \[0] $end
|
||||
$var string 1 =+olp mem $end
|
||||
$var string 1 ' mem $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct r0 $end
|
||||
$var string 0 U5SS1 addr $end
|
||||
$var wire 1 rx@_T en $end
|
||||
$var wire 1 o[(us clk $end
|
||||
$var string 1 %Bg(6 data $end
|
||||
$var string 0 # addr $end
|
||||
$var wire 1 $ en $end
|
||||
$var wire 1 % clk $end
|
||||
$var string 1 & data $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
s0 =+olp
|
||||
sPhantomConst([\"a\",\"b\"]) Ru)8A
|
||||
sPhantomConst([\"a\",\"b\"]) y&ssi
|
||||
s0 U5SS1
|
||||
0rx@_T
|
||||
0o[(us
|
||||
sPhantomConst(\"mem_element\") %Bg(6
|
||||
s0 '
|
||||
sPhantomConst([\"a\",\"b\"]) !
|
||||
sPhantomConst([\"a\",\"b\"]) "
|
||||
s0 #
|
||||
0$
|
||||
0%
|
||||
sPhantomConst(\"mem_element\") &
|
||||
$end
|
||||
#1000000
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,193 +1,193 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module shift_register $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 <Ol<I clk $end
|
||||
$var wire 1 ,E;9k rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 1 %2/Zc d $end
|
||||
$var wire 1 '1p#x q $end
|
||||
$var reg 1 vd~J{ reg0 $end
|
||||
$var reg 1 ~7wBy reg1 $end
|
||||
$var reg 1 s@[|n reg2 $end
|
||||
$var reg 1 %.BqD reg3 $end
|
||||
$var wire 1 # d $end
|
||||
$var wire 1 $ q $end
|
||||
$var reg 1 % reg0 $end
|
||||
$var reg 1 & reg1 $end
|
||||
$var reg 1 ' reg2 $end
|
||||
$var reg 1 ( reg3 $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0<Ol<I
|
||||
1,E;9k
|
||||
0%2/Zc
|
||||
0'1p#x
|
||||
0vd~J{
|
||||
0~7wBy
|
||||
0s@[|n
|
||||
0%.BqD
|
||||
0!
|
||||
1"
|
||||
0#
|
||||
0$
|
||||
0%
|
||||
0&
|
||||
0'
|
||||
0(
|
||||
$end
|
||||
#1000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#1100000
|
||||
0,E;9k
|
||||
0"
|
||||
#2000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#3000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#4000000
|
||||
0<Ol<I
|
||||
1%2/Zc
|
||||
0!
|
||||
1#
|
||||
#5000000
|
||||
1<Ol<I
|
||||
1vd~J{
|
||||
1!
|
||||
1%
|
||||
#6000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#7000000
|
||||
1<Ol<I
|
||||
1~7wBy
|
||||
1!
|
||||
1&
|
||||
#8000000
|
||||
0<Ol<I
|
||||
0%2/Zc
|
||||
0!
|
||||
0#
|
||||
#9000000
|
||||
1<Ol<I
|
||||
0vd~J{
|
||||
1s@[|n
|
||||
1!
|
||||
0%
|
||||
1'
|
||||
#10000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#11000000
|
||||
1<Ol<I
|
||||
1'1p#x
|
||||
0~7wBy
|
||||
1%.BqD
|
||||
1!
|
||||
1$
|
||||
0&
|
||||
1(
|
||||
#12000000
|
||||
0<Ol<I
|
||||
1%2/Zc
|
||||
0!
|
||||
1#
|
||||
#13000000
|
||||
1<Ol<I
|
||||
1vd~J{
|
||||
0s@[|n
|
||||
1!
|
||||
1%
|
||||
0'
|
||||
#14000000
|
||||
0<Ol<I
|
||||
0%2/Zc
|
||||
0!
|
||||
0#
|
||||
#15000000
|
||||
1<Ol<I
|
||||
0'1p#x
|
||||
0vd~J{
|
||||
1~7wBy
|
||||
0%.BqD
|
||||
1!
|
||||
0$
|
||||
0%
|
||||
1&
|
||||
0(
|
||||
#16000000
|
||||
0<Ol<I
|
||||
1%2/Zc
|
||||
0!
|
||||
1#
|
||||
#17000000
|
||||
1<Ol<I
|
||||
1vd~J{
|
||||
0~7wBy
|
||||
1s@[|n
|
||||
1!
|
||||
1%
|
||||
0&
|
||||
1'
|
||||
#18000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#19000000
|
||||
1<Ol<I
|
||||
1'1p#x
|
||||
1~7wBy
|
||||
0s@[|n
|
||||
1%.BqD
|
||||
1!
|
||||
1$
|
||||
1&
|
||||
0'
|
||||
1(
|
||||
#20000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#21000000
|
||||
1<Ol<I
|
||||
0'1p#x
|
||||
1s@[|n
|
||||
0%.BqD
|
||||
1!
|
||||
0$
|
||||
1'
|
||||
0(
|
||||
#22000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#23000000
|
||||
1<Ol<I
|
||||
1'1p#x
|
||||
1%.BqD
|
||||
1!
|
||||
1$
|
||||
1(
|
||||
#24000000
|
||||
0<Ol<I
|
||||
0%2/Zc
|
||||
0!
|
||||
0#
|
||||
#25000000
|
||||
1<Ol<I
|
||||
0vd~J{
|
||||
1!
|
||||
0%
|
||||
#26000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#27000000
|
||||
1<Ol<I
|
||||
0~7wBy
|
||||
1!
|
||||
0&
|
||||
#28000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#29000000
|
||||
1<Ol<I
|
||||
0s@[|n
|
||||
1!
|
||||
0'
|
||||
#30000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#31000000
|
||||
1<Ol<I
|
||||
0'1p#x
|
||||
0%.BqD
|
||||
1!
|
||||
0$
|
||||
0(
|
||||
#32000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#33000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#34000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#35000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#36000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#37000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#38000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#39000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#40000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#41000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#42000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#43000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#44000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#45000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#46000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#47000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#48000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#49000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#50000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#51000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#52000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#53000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#54000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#55000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#56000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#57000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#58000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#59000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#60000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#61000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#62000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#63000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#64000000
|
||||
0<Ol<I
|
||||
0!
|
||||
#65000000
|
||||
1<Ol<I
|
||||
1!
|
||||
#66000000
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,182 +1,182 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module sim_only_connects $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 tq:(w clk $end
|
||||
$var wire 1 FVlgb rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var string 1 g:xf? inp $end
|
||||
$var string 1 [OKKg out1 $end
|
||||
$var string 1 9pB-> out2 $end
|
||||
$var string 1 8(7-4 out3 $end
|
||||
$var string 1 # inp $end
|
||||
$var string 1 $ out1 $end
|
||||
$var string 1 % out2 $end
|
||||
$var string 1 & out3 $end
|
||||
$scope struct helper1 $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 $Kwp\ clk $end
|
||||
$var wire 1 nmVq' rst $end
|
||||
$var wire 1 + clk $end
|
||||
$var wire 1 , rst $end
|
||||
$upscope $end
|
||||
$var string 1 qS)@z inp $end
|
||||
$var string 1 ~je// out $end
|
||||
$var string 1 - inp $end
|
||||
$var string 1 . out $end
|
||||
$upscope $end
|
||||
$scope module sim_only_connects_helper $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 %uCn6 clk $end
|
||||
$var wire 1 Apu`K rst $end
|
||||
$var wire 1 ' clk $end
|
||||
$var wire 1 ( rst $end
|
||||
$upscope $end
|
||||
$var string 1 $U*lA inp $end
|
||||
$var string 1 !prwC out $end
|
||||
$var string 1 ) inp $end
|
||||
$var string 1 * out $end
|
||||
$upscope $end
|
||||
$var string 1 CyjVm delay1 $end
|
||||
$var reg 1 z~g{\ delay1_empty $end
|
||||
$var string 1 / delay1 $end
|
||||
$var reg 1 0 delay1_empty $end
|
||||
$scope struct helper2 $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 Ph.=# clk $end
|
||||
$var wire 1 !GXK\ rst $end
|
||||
$var wire 1 5 clk $end
|
||||
$var wire 1 6 rst $end
|
||||
$upscope $end
|
||||
$var string 1 /YVv: inp $end
|
||||
$var string 1 Kk*{# out $end
|
||||
$var string 1 7 inp $end
|
||||
$var string 1 8 out $end
|
||||
$upscope $end
|
||||
$scope module sim_only_connects_helper_2 $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 %uCn6" clk $end
|
||||
$var wire 1 Apu`K" rst $end
|
||||
$var wire 1 1 clk $end
|
||||
$var wire 1 2 rst $end
|
||||
$upscope $end
|
||||
$var string 1 $U*lA" inp $end
|
||||
$var string 1 !prwC" out $end
|
||||
$var string 1 3 inp $end
|
||||
$var string 1 4 out $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0tq:(w
|
||||
1FVlgb
|
||||
s{\"extra\":\x20\"value\"} g:xf?
|
||||
s{} [OKKg
|
||||
s{} 9pB->
|
||||
s{} 8(7-4
|
||||
0%uCn6
|
||||
1Apu`K
|
||||
s{} $U*lA
|
||||
s{} !prwC
|
||||
0$Kwp\
|
||||
1nmVq'
|
||||
s{} qS)@z
|
||||
s{} ~je//
|
||||
s{} CyjVm
|
||||
0z~g{\
|
||||
0%uCn6"
|
||||
1Apu`K"
|
||||
s{} $U*lA"
|
||||
s{} !prwC"
|
||||
0Ph.=#
|
||||
1!GXK\
|
||||
s{} /YVv:
|
||||
s{} Kk*{#
|
||||
0!
|
||||
1"
|
||||
s{\"extra\":\x20\"value\"} #
|
||||
s{} $
|
||||
s{} %
|
||||
s{} &
|
||||
0'
|
||||
1(
|
||||
s{} )
|
||||
s{} *
|
||||
0+
|
||||
1,
|
||||
s{} -
|
||||
s{} .
|
||||
s{} /
|
||||
00
|
||||
01
|
||||
12
|
||||
s{} 3
|
||||
s{} 4
|
||||
05
|
||||
16
|
||||
s{} 7
|
||||
s{} 8
|
||||
$end
|
||||
#1000000
|
||||
1tq:(w
|
||||
s{\"extra\":\x20\"value\"} [OKKg
|
||||
1%uCn6
|
||||
s{\"extra\":\x20\"value\"} $U*lA
|
||||
1$Kwp\
|
||||
s{\"extra\":\x20\"value\"} qS)@z
|
||||
1z~g{\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 9pB->
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} !prwC
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} ~je//
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} $U*lA"
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} /YVv:
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 8(7-4
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} !prwC"
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} Kk*{#
|
||||
1!
|
||||
s{\"extra\":\x20\"value\"} $
|
||||
1'
|
||||
s{\"extra\":\x20\"value\"} )
|
||||
1+
|
||||
s{\"extra\":\x20\"value\"} -
|
||||
10
|
||||
11
|
||||
15
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} %
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} *
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} .
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 3
|
||||
s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 7
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} &
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 4
|
||||
s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 8
|
||||
#2000000
|
||||
0tq:(w
|
||||
0FVlgb
|
||||
0%uCn6
|
||||
0Apu`K
|
||||
0$Kwp\
|
||||
0nmVq'
|
||||
0%uCn6"
|
||||
0Apu`K"
|
||||
0Ph.=#
|
||||
0!GXK\
|
||||
0!
|
||||
0"
|
||||
0'
|
||||
0(
|
||||
0+
|
||||
0,
|
||||
01
|
||||
02
|
||||
05
|
||||
06
|
||||
#3000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
s{\"extra\":\x20\"value\"} CyjVm
|
||||
0z~g{\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
s{\"extra\":\x20\"value\"} /
|
||||
00
|
||||
11
|
||||
15
|
||||
#4000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#5000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#6000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#7000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#8000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#9000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#10000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#11000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#12000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#13000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#14000000
|
||||
0tq:(w
|
||||
0%uCn6
|
||||
0$Kwp\
|
||||
0%uCn6"
|
||||
0Ph.=#
|
||||
0!
|
||||
0'
|
||||
0+
|
||||
01
|
||||
05
|
||||
#15000000
|
||||
1tq:(w
|
||||
1%uCn6
|
||||
1$Kwp\
|
||||
1%uCn6"
|
||||
1Ph.=#
|
||||
1!
|
||||
1'
|
||||
1+
|
||||
11
|
||||
15
|
||||
#16000000
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,68 +1,68 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module sim_resettable_counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 zGup) clk $end
|
||||
$var wire 1 TfzI\ rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 8 #$b%i out $end
|
||||
$var wire 8 # out $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0zGup)
|
||||
0TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
0"
|
||||
b0 #
|
||||
$end
|
||||
#1000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#2000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
#3000000
|
||||
1zGup)
|
||||
1!
|
||||
#4000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#5000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#6000000
|
||||
0zGup)
|
||||
0!
|
||||
#7000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#8000000
|
||||
0zGup)
|
||||
0!
|
||||
#9000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#10000000
|
||||
0zGup)
|
||||
0!
|
||||
#11000000
|
||||
1zGup)
|
||||
b100 #$b%i
|
||||
1!
|
||||
b100 #
|
||||
#12000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
#13000000
|
||||
1zGup)
|
||||
1!
|
||||
#14000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#15000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#16000000
|
||||
0zGup)
|
||||
0!
|
||||
#17000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#18000000
|
||||
0zGup)
|
||||
0!
|
||||
#19000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#20000000
|
||||
0zGup)
|
||||
0!
|
||||
|
|
|
|||
|
|
@ -1,65 +1,65 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module sim_resettable_counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 zGup) clk $end
|
||||
$var wire 1 TfzI\ rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 8 #$b%i out $end
|
||||
$var wire 8 # out $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0zGup)
|
||||
1TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
$end
|
||||
#1000000
|
||||
1zGup)
|
||||
1!
|
||||
#2000000
|
||||
0zGup)
|
||||
0!
|
||||
#3000000
|
||||
1zGup)
|
||||
1!
|
||||
#4000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#5000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#6000000
|
||||
0zGup)
|
||||
0!
|
||||
#7000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#8000000
|
||||
0zGup)
|
||||
0!
|
||||
#9000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#10000000
|
||||
0zGup)
|
||||
0!
|
||||
#11000000
|
||||
1zGup)
|
||||
b100 #$b%i
|
||||
1!
|
||||
b100 #
|
||||
#12000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
#13000000
|
||||
1zGup)
|
||||
1!
|
||||
#14000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#15000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#16000000
|
||||
0zGup)
|
||||
0!
|
||||
#17000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#18000000
|
||||
0zGup)
|
||||
0!
|
||||
#19000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#20000000
|
||||
0zGup)
|
||||
0!
|
||||
|
|
|
|||
|
|
@ -1,70 +1,70 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module sim_resettable_counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 zGup) clk $end
|
||||
$var wire 1 TfzI\ rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 8 #$b%i out $end
|
||||
$var wire 8 # out $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0zGup)
|
||||
0TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
0"
|
||||
b0 #
|
||||
$end
|
||||
#1000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#2000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
0!
|
||||
1"
|
||||
#3000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
b0 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
b0 #
|
||||
#4000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#5000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#6000000
|
||||
0zGup)
|
||||
0!
|
||||
#7000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#8000000
|
||||
0zGup)
|
||||
0!
|
||||
#9000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#10000000
|
||||
0zGup)
|
||||
0!
|
||||
#11000000
|
||||
1zGup)
|
||||
b100 #$b%i
|
||||
1!
|
||||
b100 #
|
||||
#12000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
0!
|
||||
1"
|
||||
#13000000
|
||||
1zGup)
|
||||
b101 #$b%i
|
||||
b0 #$b%i
|
||||
1!
|
||||
b101 #
|
||||
b0 #
|
||||
#14000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#15000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#16000000
|
||||
0zGup)
|
||||
0!
|
||||
#17000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#18000000
|
||||
0zGup)
|
||||
0!
|
||||
#19000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#20000000
|
||||
0zGup)
|
||||
0!
|
||||
|
|
|
|||
|
|
@ -1,70 +1,70 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module sim_resettable_counter $end
|
||||
$scope struct cd $end
|
||||
$var wire 1 zGup) clk $end
|
||||
$var wire 1 TfzI\ rst $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 1 " rst $end
|
||||
$upscope $end
|
||||
$var wire 8 #$b%i out $end
|
||||
$var wire 8 # out $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
0zGup)
|
||||
1TfzI\
|
||||
b0 #$b%i
|
||||
0!
|
||||
1"
|
||||
b0 #
|
||||
$end
|
||||
#1000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
b0 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
b0 #
|
||||
#2000000
|
||||
0zGup)
|
||||
0!
|
||||
#3000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
b0 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
b0 #
|
||||
#4000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#5000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#6000000
|
||||
0zGup)
|
||||
0!
|
||||
#7000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#8000000
|
||||
0zGup)
|
||||
0!
|
||||
#9000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#10000000
|
||||
0zGup)
|
||||
0!
|
||||
#11000000
|
||||
1zGup)
|
||||
b100 #$b%i
|
||||
1!
|
||||
b100 #
|
||||
#12000000
|
||||
0zGup)
|
||||
1TfzI\
|
||||
0!
|
||||
1"
|
||||
#13000000
|
||||
1zGup)
|
||||
b101 #$b%i
|
||||
b0 #$b%i
|
||||
1!
|
||||
b101 #
|
||||
b0 #
|
||||
#14000000
|
||||
0zGup)
|
||||
0TfzI\
|
||||
0!
|
||||
0"
|
||||
#15000000
|
||||
1zGup)
|
||||
b1 #$b%i
|
||||
1!
|
||||
b1 #
|
||||
#16000000
|
||||
0zGup)
|
||||
0!
|
||||
#17000000
|
||||
1zGup)
|
||||
b10 #$b%i
|
||||
1!
|
||||
b10 #
|
||||
#18000000
|
||||
0zGup)
|
||||
0!
|
||||
#19000000
|
||||
1zGup)
|
||||
b11 #$b%i
|
||||
1!
|
||||
b11 #
|
||||
#20000000
|
||||
0zGup)
|
||||
0!
|
||||
|
|
|
|||
|
|
@ -1,95 +1,107 @@
|
|||
error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
||||
error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
||||
error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:11:26
|
||||
|
|
||||
11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
note: required because it appears within the type `DynSimOnlyValue`
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
|
||||
--> $RUST/core/src/marker.rs
|
||||
--> $RUST/core/src/marker.rs
|
||||
|
|
||||
| pub struct PhantomData<T: PointeeSized>;
|
||||
| ^^^^^^^^^^^
|
||||
note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
|
|
||||
| pub(crate) struct RawVec<T, A: Allocator = Global> {
|
||||
| ^^^^^^
|
||||
note: required because it appears within the type `Vec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
|
|
||||
| pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
|
||||
| ^^^
|
||||
note: required because it appears within the type `OpaqueSimValue`
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `value::SimValueInner<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
51 | struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> $RUST/core/src/cell.rs
|
||||
--> $RUST/core/src/cell.rs
|
||||
|
|
||||
| pub struct UnsafeCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
||||
error[E0277]: the trait bound `fayalite::prelude::SimValue<()>: Intern` is not satisfied
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
@ -106,214 +118,238 @@ help: consider dereferencing here
|
|||
| +
|
||||
|
||||
error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
...
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
help: consider dereferencing here
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
||||
error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
...
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
help: consider dereferencing here
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
||||
error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:26
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| -------------------- ^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
| |
|
||||
| required by a bound introduced by this call
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
note: required because it appears within the type `DynSimOnlyValue`
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
|
||||
--> $RUST/core/src/marker.rs
|
||||
--> $RUST/core/src/marker.rs
|
||||
|
|
||||
| pub struct PhantomData<T: PointeeSized>;
|
||||
| ^^^^^^^^^^^
|
||||
note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
|
|
||||
| pub(crate) struct RawVec<T, A: Allocator = Global> {
|
||||
| ^^^^^^
|
||||
note: required because it appears within the type `Vec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
|
|
||||
| pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
|
||||
| ^^^
|
||||
note: required because it appears within the type `OpaqueSimValue`
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `value::SimValueInner<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
51 | struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> $RUST/core/src/cell.rs
|
||||
--> $RUST/core/src/cell.rs
|
||||
|
|
||||
| pub struct UnsafeCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub trait Intern: Any + Send + Sync {
|
||||
| ^^^^ required by this bound in `Intern::intern_sized`
|
||||
...
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
| fn intern_sized(self) -> Interned<Self>
|
||||
| ------------ required by a bound in this associated function
|
||||
help: consider dereferencing here
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
|
||||
12 | Intern::intern_sized(*v)
|
||||
| +
|
||||
|
||||
error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
|
||||
= note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
||||
error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
||||
error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
--> tests/ui/simvalue_is_not_internable.rs:12:5
|
||||
|
|
||||
12 | Intern::intern_sized(v)
|
||||
| ^^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
|
||||
|
|
||||
= help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
|
||||
note: required because it appears within the type `DynSimOnlyValue`
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/sim/value/sim_only_value_unsafe.rs
|
||||
|
|
||||
| pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
|
||||
--> $RUST/core/src/marker.rs
|
||||
--> $RUST/core/src/marker.rs
|
||||
|
|
||||
| pub struct PhantomData<T: PointeeSized>;
|
||||
| ^^^^^^^^^^^
|
||||
note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
--> $RUST/alloc/src/raw_vec/mod.rs
|
||||
|
|
||||
| pub(crate) struct RawVec<T, A: Allocator = Global> {
|
||||
| ^^^^^^
|
||||
note: required because it appears within the type `Vec<DynSimOnlyValue>`
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
--> $RUST/alloc/src/vec/mod.rs
|
||||
|
|
||||
| pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
|
||||
| ^^^
|
||||
note: required because it appears within the type `OpaqueSimValue`
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
--> src/ty.rs
|
||||
|
|
||||
| pub struct OpaqueSimValue {
|
||||
| ^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `value::SimValueInner<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
51 | struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| struct SimValueInner<T: Type> {
|
||||
| ^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
|
||||
--> $RUST/core/src/cell.rs
|
||||
--> $RUST/core/src/cell.rs
|
||||
|
|
||||
| pub struct UnsafeCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^
|
||||
note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
22 | pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
--> src/util/alternating_cell.rs
|
||||
|
|
||||
| pub(crate) struct AlternatingCell<T: ?Sized> {
|
||||
| ^^^^^^^^^^^^^^^
|
||||
note: required because it appears within the type `fayalite::prelude::SimValue<()>`
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
--> src/sim/value.rs
|
||||
|
|
||||
| pub struct SimValue<T: Type> {
|
||||
| ^^^^^^^^
|
||||
note: required by a bound in `fayalite::intern::Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
--> src/intern.rs
|
||||
|
|
||||
| pub struct Interned<T: ?Sized + 'static + Send + Sync> {
|
||||
| ^^^^ required by this bound in `Interned`
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue