add repeat()
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parent
78edfc97b2
commit
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@ -9,7 +9,7 @@ use crate::{
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ops::ExprCastTo,
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ops::ExprCastTo,
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target::{GetTarget, Target},
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target::{GetTarget, Target},
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},
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},
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int::{Bool, DynSize, IntType, SIntType, SIntValue, Size, UInt, UIntType, UIntValue},
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int::{Bool, DynSize, IntType, SIntType, SIntValue, Size, SizeType, UInt, UIntType, UIntValue},
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intern::{Intern, Interned},
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intern::{Intern, Interned},
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memory::{DynPortType, MemPort, PortType},
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memory::{DynPortType, MemPort, PortType},
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module::{
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module::{
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@ -720,3 +720,18 @@ impl<T: Type> MakeUninitExpr for T {
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ops::Uninit::new(self).to_expr()
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ops::Uninit::new(self).to_expr()
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}
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}
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}
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}
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pub fn repeat<T: Type, L: SizeType>(
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element: impl ToExpr<Type = T>,
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len: L,
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) -> Expr<ArrayType<T, L::Size>> {
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let element = element.to_expr();
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let canonical_element = Expr::canonical(element);
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ops::ArrayLiteral::new(
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Expr::ty(element),
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std::iter::repeat(canonical_element)
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.take(L::Size::as_usize(len))
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.collect(),
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)
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.to_expr()
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}
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@ -7,7 +7,7 @@ pub use crate::{
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clock::{Clock, ClockDomain, ToClock},
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clock::{Clock, ClockDomain, ToClock},
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enum_::{HdlNone, HdlOption, HdlSome},
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enum_::{HdlNone, HdlOption, HdlSome},
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expr::{
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expr::{
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CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd, MakeUninitExpr,
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repeat, CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd, MakeUninitExpr,
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ReduceBits, ToExpr,
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ReduceBits, ToExpr,
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},
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},
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hdl, hdl_module,
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hdl, hdl_module,
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