add formal subcommand
This commit is contained in:
parent
bb860d54cc
commit
45dbb554d0
1
Cargo.lock
generated
1
Cargo.lock
generated
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@ -252,6 +252,7 @@ dependencies = [
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"os_pipe",
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"serde",
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"serde_json",
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"tempfile",
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"trybuild",
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"which",
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]
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@ -24,6 +24,7 @@ num-traits.workspace = true
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os_pipe.workspace = true
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serde_json.workspace = true
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serde.workspace = true
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tempfile.workspace = true
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which.workspace = true
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[dev-dependencies]
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@ -13,6 +13,7 @@ use clap::{
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};
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use eyre::{eyre, Report};
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use std::{error, ffi::OsString, fmt, io, path::PathBuf, process};
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use tempfile::TempDir;
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pub type Result<T = (), E = CliError> = std::result::Result<T, E>;
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@ -47,22 +48,41 @@ pub trait RunPhase<Arg> {
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#[non_exhaustive]
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pub struct BaseArgs {
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/// the directory to put the generated main output file and associated files in
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#[arg(short, long, value_hint = ValueHint::DirPath)]
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pub output: PathBuf,
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#[arg(short, long, value_hint = ValueHint::DirPath, required = true)]
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pub output: Option<PathBuf>,
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/// the stem of the generated main output file, e.g. to get foo.v, pass --file-stem=foo
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#[arg(long)]
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pub file_stem: Option<String>,
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#[arg(long, env = "FAYALITE_KEEP_TEMP_DIR")]
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pub keep_temp_dir: bool,
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#[arg(skip = false)]
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pub redirect_output_for_rust_test: bool,
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}
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impl BaseArgs {
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pub fn to_firrtl_file_backend(&self) -> firrtl::FileBackend {
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firrtl::FileBackend {
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dir_path: self.output.clone(),
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top_fir_file_stem: self.file_stem.clone(),
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fn make_firrtl_file_backend(&self) -> Result<(firrtl::FileBackend, Option<TempDir>)> {
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let (dir_path, temp_dir) = match &self.output {
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Some(output) => (output.clone(), None),
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None => {
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let temp_dir = TempDir::new()?;
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if self.keep_temp_dir {
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let temp_dir = temp_dir.into_path();
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println!("created temporary directory: {}", temp_dir.display());
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(temp_dir, None)
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} else {
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(temp_dir.path().to_path_buf(), Some(temp_dir))
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}
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}
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};
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Ok((
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firrtl::FileBackend {
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dir_path,
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top_fir_file_stem: self.file_stem.clone(),
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circuit_name: None,
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},
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temp_dir,
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))
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}
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/// handles possibly redirecting the command's output for Rust tests
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pub fn run_external_command(
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&self,
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@ -106,25 +126,37 @@ pub struct FirrtlArgs {
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#[non_exhaustive]
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pub struct FirrtlOutput {
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pub file_stem: String,
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pub top_module: String,
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pub output_dir: PathBuf,
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pub temp_dir: Option<TempDir>,
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}
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impl FirrtlOutput {
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pub fn firrtl_file(&self, args: &FirrtlArgs) -> PathBuf {
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let mut retval = args.base.output.join(&self.file_stem);
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retval.set_extension("fir");
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pub fn file_with_ext(&self, ext: &str) -> PathBuf {
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let mut retval = self.output_dir.join(&self.file_stem);
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retval.set_extension(ext);
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retval
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}
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pub fn firrtl_file(&self) -> PathBuf {
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self.file_with_ext("fir")
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}
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}
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impl FirrtlArgs {
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fn run_impl(&self, top_module: Module<Bundle>) -> Result<FirrtlOutput> {
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let (file_backend, temp_dir) = self.base.make_firrtl_file_backend()?;
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let firrtl::FileBackend {
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top_fir_file_stem, ..
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} = firrtl::export(self.base.to_firrtl_file_backend(), &top_module, self.export_options)?;
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top_fir_file_stem,
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circuit_name,
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dir_path,
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} = firrtl::export(file_backend, &top_module, self.export_options)?;
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Ok(FirrtlOutput {
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file_stem: top_fir_file_stem.expect(
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"export is known to set the file stem from the circuit name if not provided",
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),
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top_module: circuit_name.expect("export is known to set the circuit name"),
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output_dir: dir_path,
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temp_dir,
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})
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}
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}
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@ -155,7 +187,22 @@ pub enum VerilogDialect {
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Yosys,
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}
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impl fmt::Display for VerilogDialect {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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f.write_str(self.as_str())
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}
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}
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impl VerilogDialect {
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pub fn as_str(self) -> &'static str {
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match self {
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VerilogDialect::Questa => "questa",
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VerilogDialect::Spyglass => "spyglass",
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VerilogDialect::Verilator => "verilator",
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VerilogDialect::Vivado => "vivado",
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VerilogDialect::Yosys => "yosys",
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}
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}
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pub fn firtool_extra_args(self) -> &'static [&'static str] {
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match self {
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VerilogDialect::Questa => &["--lowering-options=emitWireInPorts"],
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@ -191,6 +238,8 @@ pub struct VerilogArgs {
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/// adapt the generated Verilog for a particular toolchain
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#[arg(long)]
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pub verilog_dialect: Option<VerilogDialect>,
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#[arg(long, short = 'g')]
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pub debug: bool,
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}
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#[derive(Debug)]
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@ -200,28 +249,37 @@ pub struct VerilogOutput {
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}
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impl VerilogOutput {
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pub fn verilog_file(&self, args: &VerilogArgs) -> PathBuf {
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let mut retval = args.firrtl.base.output.join(&self.firrtl.file_stem);
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retval.set_extension("v");
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retval
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pub fn verilog_file(&self) -> PathBuf {
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self.firrtl.file_with_ext("v")
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}
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}
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impl VerilogArgs {
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fn run_impl(&self, firrtl_output: FirrtlOutput) -> Result<VerilogOutput> {
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let Self {
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firrtl,
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firtool,
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firtool_extra_args,
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verilog_dialect,
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debug,
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} = self;
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let output = VerilogOutput {
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firrtl: firrtl_output,
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};
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let mut cmd = process::Command::new(&self.firtool);
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cmd.arg(output.firrtl.firrtl_file(&self.firrtl));
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let mut cmd = process::Command::new(firtool);
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cmd.arg(output.firrtl.firrtl_file());
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cmd.arg("-o");
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cmd.arg(output.verilog_file(self));
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if let Some(dialect) = self.verilog_dialect {
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cmd.arg(output.verilog_file());
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if *debug {
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cmd.arg("-g");
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cmd.arg("--preserve-values=named");
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}
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if let Some(dialect) = verilog_dialect {
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cmd.args(dialect.firtool_extra_args());
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}
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cmd.args(&self.firtool_extra_args);
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cmd.current_dir(&self.firrtl.base.output);
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let status = self.firrtl.base.run_external_command(cmd)?;
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cmd.args(firtool_extra_args);
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cmd.current_dir(&output.firrtl.output_dir);
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let status = firrtl.base.run_external_command(cmd)?;
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if status.success() {
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Ok(output)
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} else {
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@ -244,12 +302,217 @@ where
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}
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}
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#[derive(ValueEnum, Copy, Clone, Debug, PartialEq, Eq, Hash, Default)]
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#[non_exhaustive]
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pub enum FormalMode {
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#[default]
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BMC,
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Prove,
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Live,
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Cover,
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}
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impl FormalMode {
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pub fn as_str(self) -> &'static str {
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match self {
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FormalMode::BMC => "bmc",
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FormalMode::Prove => "prove",
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FormalMode::Live => "live",
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FormalMode::Cover => "cover",
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}
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}
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}
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impl fmt::Display for FormalMode {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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f.write_str(self.as_str())
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}
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}
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#[derive(Clone)]
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struct FormalAdjustArgs;
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impl clap::FromArgMatches for FormalAdjustArgs {
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fn from_arg_matches(_matches: &clap::ArgMatches) -> Result<Self, clap::Error> {
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Ok(Self)
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}
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fn update_from_arg_matches(&mut self, _matches: &clap::ArgMatches) -> Result<(), clap::Error> {
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Ok(())
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}
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}
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impl clap::Args for FormalAdjustArgs {
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fn augment_args(cmd: clap::Command) -> clap::Command {
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cmd.mut_arg("output", |arg| arg.required(false))
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.mut_arg("verilog_dialect", |arg| {
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arg.default_value(VerilogDialect::Yosys.to_string())
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.hide(true)
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})
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}
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fn augment_args_for_update(cmd: clap::Command) -> clap::Command {
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Self::augment_args(cmd)
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}
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}
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#[derive(Parser, Clone)]
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#[non_exhaustive]
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pub struct FormalArgs {
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#[command(flatten)]
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pub verilog: VerilogArgs,
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#[arg(
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long,
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default_value = "sby",
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env = "SBY",
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value_hint = ValueHint::CommandName,
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value_parser = OsStringValueParser::new().try_map(which::which)
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)]
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pub sby: PathBuf,
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#[arg(long)]
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pub sby_extra_args: Vec<OsString>,
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#[arg(long, default_value_t)]
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pub mode: FormalMode,
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#[arg(long, default_value_t = Self::DEFAULT_DEPTH)]
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pub depth: u64,
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#[arg(long)]
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pub solver: Option<String>,
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#[arg(long)]
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pub smtbmc_extra_args: Vec<String>,
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#[command(flatten)]
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_formal_adjust_args: FormalAdjustArgs,
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}
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impl fmt::Debug for FormalArgs {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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let Self {
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verilog,
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sby,
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sby_extra_args,
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mode,
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depth,
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solver,
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smtbmc_extra_args,
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_formal_adjust_args: _,
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} = self;
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f.debug_struct("FormalArgs")
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.field("verilog", &verilog)
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.field("sby", &sby)
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.field("sby_extra_args", &sby_extra_args)
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.field("mode", &mode)
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.field("depth", &depth)
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.field("solver", &solver)
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.field("smtbmc_extra_args", &smtbmc_extra_args)
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.finish_non_exhaustive()
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}
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}
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impl FormalArgs {
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pub const DEFAULT_DEPTH: u64 = 20;
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}
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#[derive(Debug)]
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#[non_exhaustive]
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pub struct FormalOutput {
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pub verilog: VerilogOutput,
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}
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impl FormalOutput {
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pub fn sby_file(&self) -> PathBuf {
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self.verilog.firrtl.file_with_ext("sby")
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}
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}
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impl FormalArgs {
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fn sby_contents(&self, output: &FormalOutput) -> String {
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let Self {
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verilog: _,
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sby: _,
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sby_extra_args: _,
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mode,
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depth,
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smtbmc_extra_args,
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solver,
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_formal_adjust_args: _,
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} = self;
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struct OptArg<T>(Option<T>);
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impl<T: fmt::Display> fmt::Display for OptArg<T> {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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if let Some(v) = &self.0 {
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f.write_str(" ")?;
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v.fmt(f)
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} else {
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Ok(())
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}
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}
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}
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let space_solver = OptArg(solver.as_ref());
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let smtbmc_options = smtbmc_extra_args.join(" ");
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let verilog_file = output
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.verilog
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.verilog_file()
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.into_os_string()
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.into_string()
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.ok()
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.expect("verilog file path is not UTF-8");
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let top_module = &output.verilog.firrtl.top_module;
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format!(
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"[options]\n\
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mode {mode}\n\
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depth {depth}\n\
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wait on\n\
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\n\
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[engines]\n\
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smtbmc{space_solver} -- -- {smtbmc_options}\n\
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\n\
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[script]\n\
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read_verilog -sv -formal {verilog_file}\n\
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prep -top {top_module}\n
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"
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)
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}
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fn run_impl(&self, verilog_output: VerilogOutput) -> Result<FormalOutput> {
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let output = FormalOutput {
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verilog: verilog_output,
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};
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let sby_file = output.sby_file();
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std::fs::write(&sby_file, self.sby_contents(&output))?;
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let mut cmd = process::Command::new(&self.sby);
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cmd.arg("-f");
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cmd.arg(sby_file);
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cmd.args(&self.sby_extra_args);
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cmd.current_dir(&output.verilog.firrtl.output_dir);
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let status = self.verilog.firrtl.base.run_external_command(cmd)?;
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if status.success() {
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Ok(output)
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} else {
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Err(CliError(eyre!(
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"running {} failed: {status}",
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self.sby.display()
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)))
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}
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}
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}
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impl<Arg> RunPhase<Arg> for FormalArgs
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where
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VerilogArgs: RunPhase<Arg, Output = VerilogOutput>,
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{
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type Output = FormalOutput;
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fn run(&self, arg: Arg) -> Result<Self::Output> {
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let verilog_output = self.verilog.run(arg)?;
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self.run_impl(verilog_output)
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}
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}
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#[derive(Subcommand, Debug)]
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enum CliCommand {
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/// Generate FIRRTL
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Firrtl(FirrtlArgs),
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/// Generate Verilog
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Verilog(VerilogArgs),
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/// Run a formal proof
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Formal(FormalArgs),
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}
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/// a simple CLI
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@ -335,6 +598,9 @@ where
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CliCommand::Verilog(c) => {
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c.run(arg)?;
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}
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CliCommand::Formal(c) => {
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c.run(arg)?;
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}
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}
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Ok(())
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}
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|
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@ -2311,6 +2311,7 @@ impl<T: ?Sized + FileBackendTrait> FileBackendTrait for &'_ mut T {
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#[non_exhaustive]
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pub struct FileBackend {
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pub dir_path: PathBuf,
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pub circuit_name: Option<String>,
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pub top_fir_file_stem: Option<String>,
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}
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@ -2318,6 +2319,7 @@ impl FileBackend {
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pub fn new(dir_path: impl AsRef<Path>) -> Self {
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Self {
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dir_path: dir_path.as_ref().to_owned(),
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circuit_name: None,
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top_fir_file_stem: None,
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}
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}
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@ -2353,7 +2355,10 @@ impl FileBackendTrait for FileBackend {
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circuit_name: String,
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contents: String,
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) -> Result<(), Self::Error> {
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let top_fir_file_stem = self.top_fir_file_stem.get_or_insert(circuit_name);
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let top_fir_file_stem = self
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.top_fir_file_stem
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.get_or_insert_with(|| circuit_name.clone());
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self.circuit_name = Some(circuit_name);
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let mut path = self.dir_path.join(top_fir_file_stem);
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if let Some(parent) = path.parent().filter(|v| !v.as_os_str().is_empty()) {
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fs::create_dir_all(parent)?;
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