fix DynShr[SU]'s literal bits to properly shift right instead of left
This commit is contained in:
parent
2817cd3d58
commit
2a65aa2bd5
1 changed files with 1 additions and 1 deletions
|
|
@ -1272,7 +1272,7 @@ macro_rules! impl_dyn_shr {
|
||||||
literal_bits: Err(NotALiteralExpr),
|
literal_bits: Err(NotALiteralExpr),
|
||||||
};
|
};
|
||||||
retval.literal_bits = binary_op_literal_bits(retval.ty(), lhs, rhs, |lhs, rhs| {
|
retval.literal_bits = binary_op_literal_bits(retval.ty(), lhs, rhs, |lhs, rhs| {
|
||||||
Ok(lhs << rhs.to_usize().ok_or(NotALiteralExpr)?)
|
Ok(lhs >> rhs.to_usize().ok_or(NotALiteralExpr)?)
|
||||||
});
|
});
|
||||||
retval
|
retval
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue