fix DynShr[SU]'s literal bits to properly shift right instead of left

crates/fayalite/src/expr/ops.rs

@@ -1272,7 +1272,7 @@ macro_rules! impl_dyn_shr {
                     literal_bits: Err(NotALiteralExpr),
                 };
                 retval.literal_bits = binary_op_literal_bits(retval.ty(), lhs, rhs, |lhs, rhs| {
-                    Ok(lhs << rhs.to_usize().ok_or(NotALiteralExpr)?)
+                    Ok(lhs >> rhs.to_usize().ok_or(NotALiteralExpr)?)
                 });
                 retval
             }