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WIP: add cpu::test::decode_and_run_single_insn and some formal tests of running PowerISA instructions #15

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programmerjake wants to merge 7 commits from programmerjake/cpu:decode-and-test-harness into master
pull from: programmerjake/cpu:decode-and-test-harness
merge into: libre-chip:master
Conversation 0 Commits 7 Files changed 23 +2 -2
1 changed files with 2 additions and 2 deletions
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4
crates/cpu/src/rename_execute_retire.rs
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@ -13,7 +13,7 @@ use crate::{
COMMON_MOP_SRC_LEN, L2RegNum, MOp, MOpDestReg, MOpRegNum, MOpTrait, PRegNum, ReadL2RegMOp,
UnitNum, UnitOutRegNum, WriteL2RegMOp,
},
next_pc::{CallStackOp, SimValueDefault},
next_pc::{CallStackOp, FETCH_BLOCK_ID_WIDTH, SimValueDefault},
register::{FlagsMode, PRegFlagsPowerISA, PRegValue},
rename_execute_retire::{
rename_table::{RenameTable, RenameTableDebugState, RenameTableEntry, RenameTableUpdate},
@ -42,7 +42,7 @@ pub type MOpId = UInt<{ MOP_ID_WIDTH }>;
#[hdl(custom_debug(sim))]
/// A &micro;Op along with the state needed for this instance of the &micro;Op.
pub struct MOpInstance<MOp> {
pub fetch_block_id: UInt<8>,
pub fetch_block_id: UInt<{ FETCH_BLOCK_ID_WIDTH }>,
pub id: MOpId,
pub pc: UInt<64>,
/// initialized to 0 by decoder, overwritten by `next_pc()`