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WIP: add cpu::test::decode_and_run_single_insn and some formal tests of running PowerISA instructions #15

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programmerjake wants to merge 7 commits from programmerjake/cpu:decode-and-test-harness into master
pull from: programmerjake/cpu:decode-and-test-harness
merge into: libre-chip:master
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crates/cpu/src/rename_execute_retire.rs
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@ -217,6 +217,7 @@ pub struct UnitMOpCantCauseCancel<C: PhantomConstGet<CpuConfig>> {
pub struct ExecuteToUnitInterface<C: PhantomConstGet<CpuConfig>> {
pub global_state: GlobalState,
/// Enqueues happen in program order, they are not re-ordered by out-of-order execution.
/// if [`Self::unit_outputs_ready`] is `false`, then `enqueue.data` is always [`HdlNone`].
pub enqueue: ReadyValid<UnitEnqueue<C>>,
/// if [`Self::unit_outputs_ready`] is `false`, then this is always [`HdlNone`]
pub inputs_ready: HdlOption<UnitInputsReady<C>>,