programmerjake
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  • Joined on 2024-07-08
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programmerjake pushed to next-pc at programmerjake/cpu 2025-12-11 08:31:15 +00:00
f1d4e508cb WIP
cfd04469ce WIP linking next_pc stages together
231f5e72ec WIP: completed stages of next-pc logic, still need to combine them into a pipeline
033d5d4f34 WIP adding next_pc: add call stack
7a77c02cda WIP adding next_pc: added mock_fetch_decode_pipe
Compare 8 commits »
programmerjake deleted branch add-fill-in-defaulted-generics-for-size-type from programmerjake/fayalite 2025-12-11 04:27:59 +00:00
programmerjake pushed to master at libre-chip/fayalite 2025-12-11 04:27:58 +00:00
fbe4585578 add FillInDefaultedGenerics<Type = Self> bound for SizeType
programmerjake merged pull request libre-chip/fayalite#57 2025-12-11 04:27:55 +00:00
add FillInDefaultedGenerics<Type = Self> bound for SizeType
fbe4585578 add FillInDefaultedGenerics<Type = Self> bound for SizeType
e4210a672f Check copyright header in Rocq files.
e54558d848 Demonstrates state with multiple variables and hidden state.
46f3519c76 Demonstrate a preliminary mapping from HDL to Rocq.
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programmerjake created pull request libre-chip/fayalite#57 2025-12-11 04:09:45 +00:00
add FillInDefaultedGenerics<Type = Self> bound for SizeType
0548c47496 add FillInDefaultedGenerics<Type = Self> bound for SizeType
9e803223d0 support operations directly on SimValue, UIntValue, and SIntValue, and shared references to those
2a65aa2bd5 fix DynShr[SU]'s literal bits to properly shift right instead of left
2817cd3d58 support Rust's default binding modes when destructuring with #[hdl(sim)] let/match
053c1b2b10 implement Display for SimValue<T>
Compare 10 commits »
programmerjake pushed to next-pc at programmerjake/cpu 2025-12-10 06:37:11 +00:00
1d8adba04c WIP linking next_pc stages together
programmerjake pushed to master at libre-chip/fayalite 2025-12-09 16:34:38 +00:00
e4210a672f Check copyright header in Rocq files.
e54558d848 Demonstrates state with multiple variables and hidden state.
46f3519c76 Demonstrate a preliminary mapping from HDL to Rocq.
Compare 3 commits »
programmerjake merged pull request libre-chip/fayalite#56 2025-12-09 16:34:36 +00:00
Initial work on representing HDL and formal verification in Rocq.
programmerjake pushed to next-pc at programmerjake/cpu 2025-12-09 05:59:14 +00:00
e3ebbe6b40 WIP: completed stages of next-pc logic, still need to combine them into a pipeline
programmerjake commented on pull request libre-chip/fayalite#56 2025-12-09 01:18:05 +00:00
Initial work on representing HDL and formal verification in Rocq.

as you probably saw, you'll also need to add the code for checking for copyright headers to scripts/check-copyright.sh

programmerjake pushed to next-pc at programmerjake/cpu 2025-12-05 04:38:52 +00:00
429a36837f WIP
programmerjake pushed to next-pc at programmerjake/cpu 2025-12-04 05:27:35 +00:00
b6f3ecfb32 WIP
programmerjake pushed to main at libre-chip/website 2025-12-01 03:14:40 +00:00
2543b1ce72 add NLnet project code
991b15c320 move text to fit within length constraint
a79c7fe8bb replace xml entities with unicode characters
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programmerjake merged pull request libre-chip/website#2 2025-12-01 03:14:38 +00:00
submitted programmable decoder grant proposal as well as some necessary adjustments for submission
programmerjake created pull request libre-chip/website#2 2025-12-01 03:14:30 +00:00
submitted programmable decoder grant proposal as well as some necessary adjustments for submission
2543b1ce72 add NLnet project code
991b15c320 move text to fit within length constraint
a79c7fe8bb replace xml entities with unicode characters
Compare 2 commits »