programmerjake
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  • Joined on 2024-07-08
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programmerjake pushed to master at libre-chip/fayalite 2025-10-22 05:36:15 +00:00
c6feea6d51 properly handle all XilinxAnnotations, this makes nextpnr-xilinx properly pick up the clock frequency
409992961c switch to using verilog for reset synchronizer so we can use attributes on FDPE instances
2bdc8a7c72 WIP adding xdc create_clock -- nextpnr-xilinx currently ignores it
477a1f2d29 Add peripherals and Arty A7 platforms -- blinky works correctly now on arty-a7-100t!
4d54f903be move vendor module to top level
Compare 20 commits »
programmerjake merged pull request libre-chip/fayalite#38 2025-10-22 05:36:13 +00:00
fpga support and arty a7 100t
programmerjake closed issue libre-chip/grant-tracking#4 2025-10-22 05:36:13 +00:00
NLnet 2024-12-324 Write support for board interface descriptions and the code for running the FPGA toolchain (similar to the existing code for running SymbiYosys -- the current formal verification toolchain).
programmerjake closed issue libre-chip/grant-tracking#6 2025-10-22 05:36:13 +00:00
NLnet 2024-12-324 Add support for the Arty A7 100T since that's what we're using for CI.
programmerjake commented on pull request libre-chip/fayalite#38 2025-10-22 05:29:35 +00:00
fpga support and arty a7 100t

@programmerjake wrote in libre-chip/fayalite#38 (comment):

also I need to adjust the generated xdc so the clock properly gets the frequency constraint…

programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-22 05:24:14 +00:00
c6feea6d51 properly handle all XilinxAnnotations, this makes nextpnr-xilinx properly pick up the clock frequency
409992961c switch to using verilog for reset synchronizer so we can use attributes on FDPE instances
Compare 2 commits »
programmerjake commented on pull request libre-chip/fayalite#38 2025-10-22 03:02:43 +00:00
fpga support and arty a7 100t

@programmerjake wrote in libre-chip/fayalite#38 (comment):

I got everything to work except that either blinky has an error or the board is broken --…

programmerjake commented on pull request libre-chip/fayalite#38 2025-10-20 10:40:52 +00:00
fpga support and arty a7 100t

I got everything to work except that either blinky has an error or the board is broken -- one of the rgb leds blinks randomly as if there's a broken connection somewhere.

also I need to adjust…

programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-20 06:13:36 +00:00
2bdc8a7c72 WIP adding xdc create_clock -- nextpnr-xilinx currently ignores it
477a1f2d29 Add peripherals and Arty A7 platforms -- blinky works correctly now on arty-a7-100t!
Compare 2 commits »
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-20 06:11:43 +00:00
cf7436b7cd WIP adding xdc create_clock -- nextpnr-xilinx currently ignores it
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-20 05:25:35 +00:00
917a603b34 Add peripherals and Arty A7 platforms -- blinky works correctly now on arty-a7-100t!
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-19 06:24:33 +00:00
d2efb94686 WIP adding peripherals
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-18 01:00:27 +00:00
2848f3dee4 WIP adding peripherals
4d54f903be move vendor module to top level
Compare 2 commits »
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-17 12:55:37 +00:00
3f5dd61e46 WIP adding Platform
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-16 12:10:29 +00:00
def406ab52 group all xilinx annotations together
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-16 11:34:26 +00:00
a565be1b09 do some clean up
programmerjake pushed to fpga-support-and-arty-a7-100t at programmerjake/fayalite 2025-10-15 11:29:31 +00:00
676c1e3b7d WIP adding annotations for generating the .xdc file for yosys-nextpnr-prjxray
169be960f8 generate Arty A7 100T .bit file for blinky example in CI
2b52799f5c try building .bit file
35f98f3229 fix redirects
8a63ea89d0 WIP adding yosys-nextpnr-xray xilinx fpga toolchain -- blinky works on arty a7 100t (except for inverted reset)
Compare 13 commits »
programmerjake pushed to master at libre-chip/fayalite 2025-10-15 11:28:00 +00:00
f8ac78abd6 Remove extraneous #[automatically_derived] annotations that are causing warnings as reported by Tobias
programmerjake deleted branch remove-extraneous-automatically-derived from programmerjake/fayalite 2025-10-15 11:28:00 +00:00
programmerjake merged pull request libre-chip/fayalite#39 2025-10-15 11:27:59 +00:00
Remove extraneous #[automatically_derived] annotations that are causing warnings