programmerjake

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• Joined on 2024-07-08
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programmerjake merged pull request libre-chip/fayalite#7 2024-12-08 21:25:32 +00:00

Add module exercising formal verification of memories

programmerjake pushed to master at libre-chip/fayalite 2024-12-08 21:25:32 +00:00

2e7d685dc7 add module exercising formal verification of memories

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-06 23:53:56 +00:00

9654167ca3 sim: WIP working on memory

programmerjake opened issue libre-chip/fayalite#6 2024-12-06 09:26:05 +00:00

Tracking Issue for FIRRTL or LLVM Circt problems

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-06 05:35:41 +00:00

3ed7827485 sim: WIP adding memory support

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-06 04:32:49 +00:00

e504cfebfe add BoolOrIntType::copy_bits_from_bigint_wrapping and take BigInt arguments by reference

9f42cab471 change to version 0.3.0 for breaking change

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programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-06 02:17:31 +00:00

259bee39c2 tests/sim: split expected output text into separate files

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-05 05:04:47 +00:00

643816d5b5 vcd: handle enums with fields

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-05 04:59:26 +00:00

42afd2da0e sim: implement enums (except for connecting unequal enum types)

15bc304bb6 impl ToExpr for TargetBase

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programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-03 05:06:43 +00:00

4422157db8 WIP adding enums to simulator

programmerjake commented on pull request libre-chip/fayalite#3 2024-12-02 04:36:05 +00:00

add a simulator

got simulating circuits with registers to work! only things left: enums and memories and a few kinds of expressions

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-02 04:26:39 +00:00

d3f52292a1 test doc tests in CI

programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-12-02 04:14:50 +00:00

fd45465d35 sim: add support for registers

5e0548db26 vcd: single bit signals have no spaces in their value changes

12b3ba57f1 add some ExprCastTo supertraits to ResetType to make generic code easier

965fe53077 deduce_resets: show more debugging info on assertion failure

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programmerjake pushed to main at libre-chip/website 2024-12-01 04:37:50 +00:00

364340fcaa submitted to NLNet, add NLNet's grant proposal ID

programmerjake pushed to main at libre-chip/website 2024-12-01 00:23:48 +00:00

80c7463550 add Cesar as requested in https://forum.libre-chip.org/t/starting-working-on-a-nlnet-grant-proposal/29/4

programmerjake pushed to main at libre-chip/website 2024-11-30 00:04:33 +00:00

4af662dea8 wording fixes

programmerjake pushed to main at libre-chip/website 2024-11-29 23:36:14 +00:00

906907689e minor wording adjustment

programmerjake pushed to main at libre-chip/website 2024-11-29 23:34:52 +00:00

8fbabfef40 add estimated budget

programmerjake pushed to main at libre-chip/website 2024-11-29 22:48:59 +00:00

c60c00243a add link to WIP high-level CPU design

programmerjake pushed to main at libre-chip/website 2024-11-29 22:43:44 +00:00

007421bcd8 fill out most sections of NLNet grant proposal