WIP adding extern modules to simulator

crates/fayalite/src/sim.rs

@@ -6484,12 +6484,382 @@ macro_rules! impl_to_sim_value_for_int_value {
 impl_to_sim_value_for_int_value!(UIntValue, UInt, UIntType);
 impl_to_sim_value_for_int_value!(SIntValue, SInt, SIntType);
 
+#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
+enum MaybeNeedsSettle<S, N = S> {
+    NeedsSettle(S),
+    NoSettleNeeded(N),
+}
+
+impl<T> MaybeNeedsSettle<T> {
+    fn map<U>(self, f: impl FnOnce(T) -> U) -> MaybeNeedsSettle<U> {
+        match self {
+            MaybeNeedsSettle::NeedsSettle(v) => MaybeNeedsSettle::NeedsSettle(f(v)),
+            MaybeNeedsSettle::NoSettleNeeded(v) => MaybeNeedsSettle::NoSettleNeeded(f(v)),
+        }
+    }
+}
+
+// workaround implementing FnOnce not being stable
+trait MaybeNeedsSettleFn<A> {
+    type Output;
+
+    fn call(self, arg: A) -> Self::Output;
+}
+
+impl<T: FnOnce(A) -> O, A, O> MaybeNeedsSettleFn<A> for T {
+    type Output = O;
+
+    fn call(self, arg: A) -> Self::Output {
+        self(arg)
+    }
+}
+
+impl<S, N> MaybeNeedsSettle<S, N> {
+    fn apply_no_settle<T>(self, arg: T) -> MaybeNeedsSettle<S, N::Output>
+    where
+        N: MaybeNeedsSettleFn<T>,
+    {
+        match self {
+            MaybeNeedsSettle::NeedsSettle(v) => MaybeNeedsSettle::NeedsSettle(v),
+            MaybeNeedsSettle::NoSettleNeeded(v) => MaybeNeedsSettle::NoSettleNeeded(v.call(arg)),
+        }
+    }
+}
+
+struct SimulationModuleState {
+    base_targets: Vec<Target>,
+    uninitialized_ios: HashMap<Target, Vec<Target>>,
+    io_targets: HashMap<Target, CompiledValue<CanonicalType>>,
+    did_initial_settle: bool,
+}
+
+impl fmt::Debug for SimulationModuleState {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let Self {
+            base_targets,
+            uninitialized_ios,
+            io_targets,
+            did_initial_settle,
+        } = self;
+        f.debug_struct("SimulationModuleState")
+            .field("base_targets", base_targets)
+            .field("uninitialized_ios", &SortedSetDebug(uninitialized_ios))
+            .field("io_targets", &SortedSetDebug(io_targets))
+            .field("did_initial_settle", did_initial_settle)
+            .finish()
+    }
+}
+
+impl SimulationModuleState {
+    fn new(base_targets: impl IntoIterator<Item = (Target, CompiledValue<CanonicalType>)>) -> Self {
+        let mut retval = Self {
+            base_targets: Vec::new(),
+            uninitialized_ios: HashMap::new(),
+            io_targets: HashMap::new(),
+            did_initial_settle: false,
+        };
+        for (base_target, value) in base_targets {
+            retval.base_targets.push(base_target);
+            retval.parse_io(base_target, value);
+        }
+        retval
+    }
+    /// returns `true` if `target` or any sub-targets are uninitialized inputs
+    fn parse_io(&mut self, target: Target, value: CompiledValue<CanonicalType>) -> bool {
+        self.io_targets.insert(target, value);
+        match value.layout.body {
+            CompiledTypeLayoutBody::Scalar => match target.flow() {
+                Flow::Source => false,
+                Flow::Sink => {
+                    self.uninitialized_ios.insert(target, vec![]);
+                    true
+                }
+                Flow::Duplex => unreachable!(),
+            },
+            CompiledTypeLayoutBody::Array { .. } => {
+                let value = value.map_ty(Array::from_canonical);
+                let mut sub_targets = Vec::new();
+                for index in 0..value.layout.ty.len() {
+                    let sub_target = target.join(
+                        TargetPathElement::from(TargetPathArrayElement { index }).intern_sized(),
+                    );
+                    if self.parse_io(sub_target, value.element(index)) {
+                        sub_targets.push(sub_target);
+                    }
+                }
+                if sub_targets.is_empty() {
+                    false
+                } else {
+                    self.uninitialized_ios.insert(target, sub_targets);
+                    true
+                }
+            }
+            CompiledTypeLayoutBody::Bundle { .. } => {
+                let value = value.map_ty(Bundle::from_canonical);
+                let mut sub_targets = Vec::new();
+                for BundleField { name, .. } in value.layout.ty.fields() {
+                    let sub_target = target.join(
+                        TargetPathElement::from(TargetPathBundleField { name }).intern_sized(),
+                    );
+                    if self.parse_io(sub_target, value.field_by_name(name)) {
+                        sub_targets.push(sub_target);
+                    }
+                }
+                if sub_targets.is_empty() {
+                    false
+                } else {
+                    self.uninitialized_ios.insert(target, sub_targets);
+                    true
+                }
+            }
+        }
+    }
+    fn mark_target_as_initialized(&mut self, mut target: Target) {
+        fn remove_target_and_children(
+            uninitialized_ios: &mut HashMap<Target, Vec<Target>>,
+            target: Target,
+        ) {
+            let Some(children) = uninitialized_ios.remove(&target) else {
+                return;
+            };
+            for child in children {
+                remove_target_and_children(uninitialized_ios, child);
+            }
+        }
+        remove_target_and_children(&mut self.uninitialized_ios, target);
+        while let Some(target_child) = target.child() {
+            let parent = target_child.parent();
+            for child in self
+                .uninitialized_ios
+                .get(&*parent)
+                .map(|v| &**v)
+                .unwrap_or(&[])
+            {
+                if self.uninitialized_ios.contains_key(child) {
+                    return;
+                }
+            }
+            target = *parent;
+            self.uninitialized_ios.remove(&target);
+        }
+    }
+    #[track_caller]
+    fn get_io(
+        &self,
+        mut target: Target,
+        which_module: WhichModule,
+    ) -> CompiledValue<CanonicalType> {
+        if let Some(&retval) = self.io_targets.get(&target) {
+            return retval;
+        }
+        loop {
+            target = match target {
+                Target::Base(_) => break,
+                Target::Child(child) => {
+                    match *child.path_element() {
+                        TargetPathElement::BundleField(_) | TargetPathElement::ArrayElement(_) => {}
+                        TargetPathElement::DynArrayElement(_) => panic!(
+                            "simulator read/write expression must not have dynamic array indexes"
+                        ),
+                    }
+                    *child.parent()
+                }
+            };
+        }
+        match which_module {
+            WhichModule::Main => panic!(
+                "simulator read/write expression must be \
+                an array element/field of `Simulation::io()`"
+            ),
+            WhichModule::Extern { .. } => panic!(
+                "simulator read/write expression must be \
+                one of this module's inputs/outputs or an \
+                array element/field of one of this module's inputs/outputs"
+            ),
+        }
+    }
+    #[track_caller]
+    fn read_helper(
+        &self,
+        io: Expr<CanonicalType>,
+        which_module: WhichModule,
+    ) -> MaybeNeedsSettle<CompiledValue<CanonicalType>> {
+        let Some(target) = io.target() else {
+            match which_module {
+                WhichModule::Main => panic!(
+                    "can't read from an expression that's not a field/element of `Simulation::io()`"
+                ),
+                WhichModule::Extern { .. } => panic!(
+                    "can't read from an expression that's not based on one of this module's inputs/outputs"
+                ),
+            }
+        };
+        let compiled_value = self.get_io(*target, which_module);
+        match target.flow() {
+            Flow::Source => {
+                if !self.uninitialized_ios.is_empty() {
+                    match which_module {
+                        WhichModule::Main => {
+                            panic!("can't read from an output before initializing all inputs");
+                        }
+                        WhichModule::Extern { .. } => {
+                            panic!("can't read from an input before initializing all outputs");
+                        }
+                    }
+                }
+                MaybeNeedsSettle::NeedsSettle(compiled_value)
+            }
+            Flow::Sink => {
+                if self.uninitialized_ios.contains_key(&*target) {
+                    match which_module {
+                        WhichModule::Main => panic!("can't read from an uninitialized input"),
+                        WhichModule::Extern { .. } => {
+                            panic!("can't read from an uninitialized output");
+                        }
+                    }
+                }
+                MaybeNeedsSettle::NoSettleNeeded(compiled_value)
+            }
+            Flow::Duplex => unreachable!(),
+        }
+    }
+    #[track_caller]
+    fn write_helper(
+        &mut self,
+        io: Expr<CanonicalType>,
+        which_module: WhichModule,
+    ) -> CompiledValue<CanonicalType> {
+        let Some(target) = io.target() else {
+            match which_module {
+                WhichModule::Main => panic!(
+                    "can't write to an expression that's not a field/element of `Simulation::io()`"
+                ),
+                WhichModule::Extern { .. } => panic!(
+                    "can't write to an expression that's not based on one of this module's outputs"
+                ),
+            }
+        };
+        let compiled_value = self.get_io(*target, which_module);
+        match target.flow() {
+            Flow::Source => match which_module {
+                WhichModule::Main => panic!("can't write to an output"),
+                WhichModule::Extern { .. } => panic!("can't write to an input"),
+            },
+            Flow::Sink => {}
+            Flow::Duplex => unreachable!(),
+        }
+        if !self.did_initial_settle {
+            self.mark_target_as_initialized(*target);
+        }
+        compiled_value
+    }
+}
+
+struct SimulationExternModuleState {
+    module_state: SimulationModuleState,
+    sim: ExternModuleSimulation<Bundle>,
+    running_generator: Option<Box<dyn Future<Output = ()> + 'static>>,
+}
+
+impl fmt::Debug for SimulationExternModuleState {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let Self {
+            module_state,
+            sim,
+            running_generator,
+        } = self;
+        f.debug_struct("SimulationExternModuleState")
+            .field("module_state", module_state)
+            .field("sim", sim)
+            .field(
+                "running_generator",
+                &running_generator.as_ref().map(|_| DebugAsDisplay("...")),
+            )
+            .finish()
+    }
+}
+
+#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
+enum WhichModule {
+    Main,
+    Extern { index: usize },
+}
+
+struct ReadBitFn {
+    compiled_value: CompiledValue<CanonicalType>,
+}
+
+impl MaybeNeedsSettleFn<&'_ mut interpreter::State> for ReadBitFn {
+    type Output = bool;
+
+    fn call(self, state: &mut interpreter::State) -> Self::Output {
+        match self.compiled_value.range.len() {
+            TypeLen::A_SMALL_SLOT => {
+                state.small_slots[self.compiled_value.range.small_slots.start] != 0
+            }
+            TypeLen::A_BIG_SLOT => !state.big_slots[self.compiled_value.range.big_slots.start]
+                .clone()
+                .is_zero(),
+            _ => unreachable!(),
+        }
+    }
+}
+
+struct ReadBoolOrIntFn<I: BoolOrIntType> {
+    compiled_value: CompiledValue<CanonicalType>,
+    io: Expr<I>,
+}
+
+impl<I: BoolOrIntType> MaybeNeedsSettleFn<&'_ mut interpreter::State> for ReadBoolOrIntFn<I> {
+    type Output = I::Value;
+
+    fn call(self, state: &mut interpreter::State) -> Self::Output {
+        let Self { compiled_value, io } = self;
+        match compiled_value.range.len() {
+            TypeLen::A_SMALL_SLOT => Expr::ty(io)
+                .value_from_int_wrapping(state.small_slots[compiled_value.range.small_slots.start]),
+            TypeLen::A_BIG_SLOT => Expr::ty(io).value_from_int_wrapping(
+                state.big_slots[compiled_value.range.big_slots.start].clone(),
+            ),
+            _ => unreachable!(),
+        }
+    }
+}
+
+struct ReadFn {
+    compiled_value: CompiledValue<CanonicalType>,
+    io: Expr<CanonicalType>,
+}
+
+impl MaybeNeedsSettleFn<&'_ mut interpreter::State> for ReadFn {
+    type Output = SimValue<CanonicalType>;
+
+    fn call(self, state: &mut interpreter::State) -> Self::Output {
+        let Self { compiled_value, io } = self;
+        let mut bits = BitVec::repeat(false, compiled_value.layout.ty.bit_width());
+        SimulationImpl::read_write_sim_value_helper(
+            state,
+            compiled_value,
+            &mut bits,
+            |_signed, bits, value| <UInt>::copy_bits_from_bigint_wrapping(value, bits),
+            |_signed, bits, value| {
+                let bytes = value.to_le_bytes();
+                let bitslice = BitSlice::<u8, Lsb0>::from_slice(&bytes);
+                bits.clone_from_bitslice(&bitslice[..bits.len()]);
+            },
+        );
+        SimValue {
+            ty: Expr::ty(io),
+            bits,
+        }
+    }
+}
+
 struct SimulationImpl {
     state: interpreter::State,
     io: Expr<Bundle>,
-    uninitialized_inputs: HashMap<Target, Vec<Target>>,
+    main_module: SimulationModuleState,
-    io_targets: HashMap<Target, CompiledValue<CanonicalType>>,
+    extern_modules: Vec<SimulationExternModuleState>,
-    made_initial_step: bool,
     needs_settle: bool,
     trace_decls: TraceModule,
     traces: SimTraces<Box<[SimTrace<SimTraceKind, BitVec>]>>,
@@ -6511,9 +6881,8 @@ impl SimulationImpl {
         let Self {
             state,
             io: self_io,
-            uninitialized_inputs,
+            main_module,
-            io_targets,
+            extern_modules,
-            made_initial_step,
             needs_settle,
             trace_decls,
             traces,
@@ -6526,12 +6895,8 @@ impl SimulationImpl {
         f.debug_struct("Simulation")
             .field("state", state)
             .field("io", io.unwrap_or(self_io))
-            .field(
+            .field("main_module", main_module)
-                "uninitialized_inputs",
+            .field("extern_modules", extern_modules)
-                &SortedSetDebug(uninitialized_inputs),
-            )
-            .field("io_targets", &SortedMapDebug(io_targets))
-            .field("made_initial_step", made_initial_step)
             .field("needs_settle", needs_settle)
             .field("trace_decls", trace_decls)
             .field("traces", traces)
@@ -6541,63 +6906,30 @@ impl SimulationImpl {
             .field("clocks_triggered", clocks_triggered)
             .finish_non_exhaustive()
     }
-    /// returns `true` if `target` or any sub-targets are uninitialized inputs
-    fn parse_io(&mut self, target: Target, value: CompiledValue<CanonicalType>) -> bool {
-        self.io_targets.insert(target, value);
-        match value.layout.body {
-            CompiledTypeLayoutBody::Scalar => match target.flow() {
-                Flow::Source => false,
-                Flow::Sink => {
-                    self.uninitialized_inputs.insert(target, vec![]);
-                    true
-                }
-                Flow::Duplex => unreachable!(),
-            },
-            CompiledTypeLayoutBody::Array { .. } => {
-                let value = value.map_ty(Array::from_canonical);
-                let mut sub_targets = Vec::new();
-                for index in 0..value.layout.ty.len() {
-                    let sub_target = target.join(
-                        TargetPathElement::from(TargetPathArrayElement { index }).intern_sized(),
-                    );
-                    if self.parse_io(sub_target, value.element(index)) {
-                        sub_targets.push(sub_target);
-                    }
-                }
-                if sub_targets.is_empty() {
-                    false
-                } else {
-                    self.uninitialized_inputs.insert(target, sub_targets);
-                    true
-                }
-            }
-            CompiledTypeLayoutBody::Bundle { .. } => {
-                let value = value.map_ty(Bundle::from_canonical);
-                let mut sub_targets = Vec::new();
-                for BundleField { name, .. } in value.layout.ty.fields() {
-                    let sub_target = target.join(
-                        TargetPathElement::from(TargetPathBundleField { name }).intern_sized(),
-                    );
-                    if self.parse_io(sub_target, value.field_by_name(name)) {
-                        sub_targets.push(sub_target);
-                    }
-                }
-                if sub_targets.is_empty() {
-                    false
-                } else {
-                    self.uninitialized_inputs.insert(target, sub_targets);
-                    true
-                }
-            }
-        }
-    }
     fn new(compiled: Compiled<Bundle>) -> Self {
-        let mut retval = Self {
+        let io_target = Target::from(compiled.io);
+        Self {
             state: State::new(compiled.insns),
             io: compiled.io.to_expr(),
-            uninitialized_inputs: HashMap::new(),
+            main_module: SimulationModuleState::new(
-            io_targets: HashMap::new(),
+                compiled
-            made_initial_step: false,
+                    .io
+                    .ty()
+                    .fields()
+                    .into_iter()
+                    .zip(compiled.base_module.module_io)
+                    .map(|(BundleField { name, .. }, value)| {
+                        (
+                            io_target.join(
+                                TargetPathElement::from(TargetPathBundleField { name })
+                                    .intern_sized(),
+                            ),
+                            value,
+                        )
+                    }),
+            ),
+            // TODO: add extern_modules
+            extern_modules: vec![],
             needs_settle: true,
             trace_decls: compiled.base_module.trace_decls,
             traces: SimTraces(Box::from_iter(compiled.traces.0.iter().map(
@@ -6616,22 +6948,7 @@ impl SimulationImpl {
             instant: SimInstant::START,
             clocks_triggered: compiled.clocks_triggered,
             breakpoints: None,
-        };
-        let io_target = Target::from(compiled.io);
-        for (BundleField { name, .. }, value) in compiled
-            .io
-            .ty()
-            .fields()
-            .into_iter()
-            .zip(compiled.base_module.module_io)
-        {
-            retval.parse_io(
-                io_target
-                    .join(TargetPathElement::from(TargetPathBundleField { name }).intern_sized()),
-                value,
-            );
         }
-        retval
     }
     fn write_traces<const ONLY_IF_CHANGED: bool>(
         &mut self,
@@ -6786,7 +7103,7 @@ impl SimulationImpl {
     #[track_caller]
     fn settle(&mut self) {
         assert!(
-            self.uninitialized_inputs.is_empty(),
+            self.main_module.uninitialized_ios.is_empty(),
             "didn't initialize all inputs",
         );
         for _ in 0..100000 {
@@ -6818,14 +7135,14 @@ impl SimulationImpl {
             } else {
                 let RunResult::Return(()) = self.state.run(());
             }
-            if self.made_initial_step {
+            if self.main_module.did_initial_settle {
                 self.read_traces::<false>();
             } else {
                 self.read_traces::<true>();
             }
             self.state.memory_write_log.sort_unstable();
             self.state.memory_write_log.dedup();
-            self.made_initial_step = true;
+            self.main_module.did_initial_settle = true;
             self.needs_settle = self
                 .clocks_triggered
                 .iter()
@@ -6852,110 +7169,35 @@ impl SimulationImpl {
         }
         panic!("settle(): took too many steps");
     }
-    #[track_caller]
+    fn get_module(&self, which_module: WhichModule) -> &SimulationModuleState {
-    fn get_io(&self, target: Target) -> CompiledValue<CanonicalType> {
+        match which_module {
-        if let Some(&retval) = self.io_targets.get(&target) {
+            WhichModule::Main => &self.main_module,
-            return retval;
+            WhichModule::Extern { index } => &self.extern_modules[index].module_state,
-        }
-        if Some(&target) == self.io.target().as_deref()
-            || Some(target.base()) != self.io.target().map(|v| v.base())
-        {
-            panic!("simulator read/write expression must be an array element/field of `Simulation::io()`");
-        };
-        panic!("simulator read/write expression must not have dynamic array indexes");
-    }
-    fn mark_target_as_initialized(&mut self, mut target: Target) {
-        fn remove_target_and_children(
-            uninitialized_inputs: &mut HashMap<Target, Vec<Target>>,
-            target: Target,
-        ) {
-            let Some(children) = uninitialized_inputs.remove(&target) else {
-                return;
-            };
-            for child in children {
-                remove_target_and_children(uninitialized_inputs, child);
         }
     }
-        remove_target_and_children(&mut self.uninitialized_inputs, target);
+    fn get_module_mut(&mut self, which_module: WhichModule) -> &mut SimulationModuleState {
-        while let Some(target_child) = target.child() {
+        match which_module {
-            let parent = target_child.parent();
+            WhichModule::Main => &mut self.main_module,
-            for child in self
+            WhichModule::Extern { index } => &mut self.extern_modules[index].module_state,
-                .uninitialized_inputs
-                .get(&*parent)
-                .map(|v| &**v)
-                .unwrap_or(&[])
-            {
-                if self.uninitialized_inputs.contains_key(child) {
-                    return;
-                }
-            }
-            target = *parent;
-            self.uninitialized_inputs.remove(&target);
         }
     }
     #[track_caller]
-    fn read_helper(&mut self, io: Expr<CanonicalType>) -> CompiledValue<CanonicalType> {
+    fn read_bit(
-        let Some(target) = io.target() else {
+        &mut self,
-            panic!("can't read from expression that's not a field/element of `Simulation::io()`");
+        io: Expr<CanonicalType>,
-        };
+        which_module: WhichModule,
-        let compiled_value = self.get_io(*target);
+    ) -> MaybeNeedsSettle<ReadBitFn, bool> {
-        if self.made_initial_step {
+        self.get_module(which_module)
-            self.settle();
+            .read_helper(Expr::canonical(io), which_module)
-        } else {
+            .map(|compiled_value| ReadBitFn { compiled_value })
-            match target.flow() {
+            .apply_no_settle(&mut self.state)
-                Flow::Source => {
-                    if !self.uninitialized_inputs.is_empty() {
-                        panic!(
-                            "can't read from an output before the simulation has made any steps"
-                        );
-                    }
-                    self.settle();
-                }
-                Flow::Sink => {
-                    if self.uninitialized_inputs.contains_key(&*target) {
-                        panic!("can't read from an uninitialized input");
-                    }
-                }
-                Flow::Duplex => unreachable!(),
-            }
-        }
-        compiled_value
     }
     #[track_caller]
-    fn write_helper(&mut self, io: Expr<CanonicalType>) -> CompiledValue<CanonicalType> {
+    fn write_bit(&mut self, io: Expr<CanonicalType>, value: bool, which_module: WhichModule) {
-        let Some(target) = io.target() else {
+        let compiled_value = self
-            panic!("can't write to an expression that's not a field/element of `Simulation::io()`");
+            .get_module_mut(which_module)
-        };
+            .write_helper(io, which_module);
-        let compiled_value = self.get_io(*target);
-        match target.flow() {
-            Flow::Source => {
-                panic!("can't write to an output");
-            }
-            Flow::Sink => {}
-            Flow::Duplex => unreachable!(),
-        }
-        if !self.made_initial_step {
-            self.mark_target_as_initialized(*target);
-        }
         self.needs_settle = true;
-        compiled_value
-    }
-    #[track_caller]
-    fn read_bit(&mut self, io: Expr<CanonicalType>) -> bool {
-        let compiled_value = self.read_helper(Expr::canonical(io));
-        match compiled_value.range.len() {
-            TypeLen::A_SMALL_SLOT => {
-                self.state.small_slots[compiled_value.range.small_slots.start] != 0
-            }
-            TypeLen::A_BIG_SLOT => !self.state.big_slots[compiled_value.range.big_slots.start]
-                .clone()
-                .is_zero(),
-            _ => unreachable!(),
-        }
-    }
-    #[track_caller]
-    fn write_bit(&mut self, io: Expr<CanonicalType>, value: bool) {
-        let compiled_value = self.write_helper(io);
         match compiled_value.range.len() {
             TypeLen::A_SMALL_SLOT => {
                 self.state.small_slots[compiled_value.range.small_slots.start] = value as _;
@@ -6967,21 +7209,27 @@ impl SimulationImpl {
         }
     }
     #[track_caller]
-    fn read_bool_or_int<I: BoolOrIntType>(&mut self, io: Expr<I>) -> I::Value {
+    fn read_bool_or_int<I: BoolOrIntType>(
-        let compiled_value = self.read_helper(Expr::canonical(io));
+        &mut self,
-        match compiled_value.range.len() {
+        io: Expr<I>,
-            TypeLen::A_SMALL_SLOT => Expr::ty(io).value_from_int_wrapping(
+        which_module: WhichModule,
-                self.state.small_slots[compiled_value.range.small_slots.start],
+    ) -> MaybeNeedsSettle<ReadBoolOrIntFn<I>, I::Value> {
-            ),
+        self.get_module(which_module)
-            TypeLen::A_BIG_SLOT => Expr::ty(io).value_from_int_wrapping(
+            .read_helper(Expr::canonical(io), which_module)
-                self.state.big_slots[compiled_value.range.big_slots.start].clone(),
+            .map(|compiled_value| ReadBoolOrIntFn { compiled_value, io })
-            ),
+            .apply_no_settle(&mut self.state)
-            _ => unreachable!(),
-        }
     }
     #[track_caller]
-    fn write_bool_or_int<I: BoolOrIntType>(&mut self, io: Expr<I>, value: I::Value) {
+    fn write_bool_or_int<I: BoolOrIntType>(
-        let compiled_value = self.write_helper(Expr::canonical(io));
+        &mut self,
+        io: Expr<I>,
+        value: I::Value,
+        which_module: WhichModule,
+    ) {
+        let compiled_value = self
+            .get_module_mut(which_module)
+            .write_helper(Expr::canonical(io), which_module);
+        self.needs_settle = true;
         let value: BigInt = value.into();
         match compiled_value.range.len() {
             TypeLen::A_SMALL_SLOT => {
@@ -6999,7 +7247,7 @@ impl SimulationImpl {
     }
     #[track_caller]
     fn read_write_sim_value_helper(
-        &mut self,
+        state: &mut interpreter::State,
         compiled_value: CompiledValue<CanonicalType>,
         bits: &mut BitSlice,
         read_write_big_scalar: impl Fn(bool, &mut BitSlice, &mut BigInt) + Copy,
@@ -7024,12 +7272,12 @@ impl SimulationImpl {
                     TypeLen::A_SMALL_SLOT => read_write_small_scalar(
                         signed,
                         bits,
-                        &mut self.state.small_slots[compiled_value.range.small_slots.start],
+                        &mut state.small_slots[compiled_value.range.small_slots.start],
                     ),
                     TypeLen::A_BIG_SLOT => read_write_big_scalar(
                         signed,
                         bits,
-                        &mut self.state.big_slots[compiled_value.range.big_slots.start],
+                        &mut state.big_slots[compiled_value.range.big_slots.start],
                     ),
                     _ => unreachable!(),
                 }
@@ -7038,7 +7286,8 @@ impl SimulationImpl {
                 let ty = <Array>::from_canonical(compiled_value.layout.ty);
                 let element_bit_width = ty.element().bit_width();
                 for element_index in 0..ty.len() {
-                    self.read_write_sim_value_helper(
+                    Self::read_write_sim_value_helper(
+                        state,
                         CompiledValue {
                             layout: *element,
                             range: compiled_value
@@ -7062,7 +7311,8 @@ impl SimulationImpl {
                     },
                 ) in ty.fields().iter().zip(ty.field_offsets()).zip(fields)
                 {
-                    self.read_write_sim_value_helper(
+                    Self::read_write_sim_value_helper(
+                        state,
                         CompiledValue {
                             layout: field_layout,
                             range: compiled_value.range.slice(TypeIndexRange::new(
@@ -7080,29 +7330,30 @@ impl SimulationImpl {
         }
     }
     #[track_caller]
-    fn read(&mut self, io: Expr<CanonicalType>) -> SimValue<CanonicalType> {
+    fn read(
-        let compiled_value = self.read_helper(io);
+        &mut self,
-        let mut bits = BitVec::repeat(false, compiled_value.layout.ty.bit_width());
+        io: Expr<CanonicalType>,
-        self.read_write_sim_value_helper(
+        which_module: WhichModule,
-            compiled_value,
+    ) -> MaybeNeedsSettle<ReadFn, SimValue<CanonicalType>> {
-            &mut bits,
+        self.get_module(which_module)
-            |_signed, bits, value| <UInt>::copy_bits_from_bigint_wrapping(value, bits),
+            .read_helper(io, which_module)
-            |_signed, bits, value| {
+            .map(|compiled_value| ReadFn { compiled_value, io })
-                let bytes = value.to_le_bytes();
+            .apply_no_settle(&mut self.state)
-                let bitslice = BitSlice::<u8, Lsb0>::from_slice(&bytes);
-                bits.clone_from_bitslice(&bitslice[..bits.len()]);
-            },
-        );
-        SimValue {
-            ty: Expr::ty(io),
-            bits,
-        }
     }
     #[track_caller]
-    fn write(&mut self, io: Expr<CanonicalType>, value: SimValue<CanonicalType>) {
+    fn write(
-        let compiled_value = self.write_helper(io);
+        &mut self,
+        io: Expr<CanonicalType>,
+        value: SimValue<CanonicalType>,
+        which_module: WhichModule,
+    ) {
+        let compiled_value = self
+            .get_module_mut(which_module)
+            .write_helper(io, which_module);
+        self.needs_settle = true;
         assert_eq!(Expr::ty(io), value.ty());
-        self.read_write_sim_value_helper(
+        Self::read_write_sim_value_helper(
+            &mut self.state,
             compiled_value,
             &mut value.into_bits(),
             |signed, bits, value| {
@@ -7122,6 +7373,19 @@ impl SimulationImpl {
             },
         );
     }
+    #[track_caller]
+    fn settle_if_needed<F, O>(&mut self, v: MaybeNeedsSettle<F, O>) -> O
+    where
+        for<'a> F: MaybeNeedsSettleFn<&'a mut interpreter::State, Output = O>,
+    {
+        match v {
+            MaybeNeedsSettle::NeedsSettle(v) => {
+                self.settle();
+                v.call(&mut self.state)
+            }
+            MaybeNeedsSettle::NoSettleNeeded(v) => v,
+        }
+    }
     fn close_all_trace_writers(&mut self) -> std::io::Result<()> {
         let trace_writers = mem::take(&mut self.trace_writers);
         let mut retval = Ok(());
@@ -7192,13 +7456,13 @@ impl SimulationImpl {
         retval
     }
     fn close(mut self) -> std::io::Result<()> {
-        if self.made_initial_step {
+        if self.main_module.did_initial_settle {
             self.settle();
         }
         self.close_all_trace_writers()
     }
     fn flush_traces(&mut self) -> std::io::Result<()> {
-        if self.made_initial_step {
+        if self.main_module.did_initial_settle {
             self.settle();
         }
         self.for_each_trace_writer_getting_error(
@@ -7335,7 +7599,8 @@ impl<T: BundleType> Simulation<T> {
     }
     #[track_caller]
     pub fn read_bool_or_int<I: BoolOrIntType>(&mut self, io: Expr<I>) -> I::Value {
-        self.sim_impl.read_bool_or_int(io)
+        let retval = self.sim_impl.read_bool_or_int(io, WhichModule::Main);
+        self.sim_impl.settle_if_needed(retval)
     }
     #[track_caller]
     pub fn write_bool_or_int<I: BoolOrIntType>(
@@ -7348,42 +7613,59 @@ impl<T: BundleType> Simulation<T> {
         let value = value
             .to_literal_bits()
             .expect("the value that is being written to an input must be a literal");
-        self.sim_impl
+        self.sim_impl.write_bool_or_int(
-            .write_bool_or_int(io, I::bits_to_value(Cow::Borrowed(&value)));
+            io,
+            I::bits_to_value(Cow::Borrowed(&value)),
+            WhichModule::Main,
+        );
     }
     #[track_caller]
     pub fn write_clock(&mut self, io: Expr<Clock>, value: bool) {
-        self.sim_impl.write_bit(Expr::canonical(io), value);
+        self.sim_impl
+            .write_bit(Expr::canonical(io), value, WhichModule::Main);
     }
     #[track_caller]
     pub fn read_clock(&mut self, io: Expr<Clock>) -> bool {
-        self.sim_impl.read_bit(Expr::canonical(io))
+        let retval = self
+            .sim_impl
+            .read_bit(Expr::canonical(io), WhichModule::Main);
+        self.sim_impl.settle_if_needed(retval)
     }
     #[track_caller]
     pub fn write_bool(&mut self, io: Expr<Bool>, value: bool) {
-        self.sim_impl.write_bit(Expr::canonical(io), value);
+        self.sim_impl
+            .write_bit(Expr::canonical(io), value, WhichModule::Main);
     }
     #[track_caller]
     pub fn read_bool(&mut self, io: Expr<Bool>) -> bool {
-        self.sim_impl.read_bit(Expr::canonical(io))
+        let retval = self
+            .sim_impl
+            .read_bit(Expr::canonical(io), WhichModule::Main);
+        self.sim_impl.settle_if_needed(retval)
     }
     #[track_caller]
     pub fn write_reset<R: ResetType>(&mut self, io: Expr<R>, value: bool) {
-        self.sim_impl.write_bit(Expr::canonical(io), value);
+        self.sim_impl
+            .write_bit(Expr::canonical(io), value, WhichModule::Main);
     }
     #[track_caller]
     pub fn read_reset<R: ResetType>(&mut self, io: Expr<R>) -> bool {
-        self.sim_impl.read_bit(Expr::canonical(io))
+        let retval = self
+            .sim_impl
+            .read_bit(Expr::canonical(io), WhichModule::Main);
+        self.sim_impl.settle_if_needed(retval)
     }
     #[track_caller]
     pub fn read<IO: Type>(&mut self, io: Expr<IO>) -> SimValue<IO> {
-        SimValue::from_canonical(self.sim_impl.read(Expr::canonical(io)))
+        let retval = self.sim_impl.read(Expr::canonical(io), WhichModule::Main);
+        SimValue::from_canonical(self.sim_impl.settle_if_needed(retval))
     }
     #[track_caller]
     pub fn write<IO: Type, V: ToSimValue<IO>>(&mut self, io: Expr<IO>, value: V) {
         self.sim_impl.write(
             Expr::canonical(io),
             value.into_sim_value(Expr::ty(io)).into_canonical(),
+            WhichModule::Main,
         );
     }
     #[doc(hidden)]
@@ -7462,39 +7744,60 @@ impl InternedCompare for dyn DynExternModuleSimGenerator {
 #[derive(Clone, Copy, PartialEq, Eq, Hash, Debug)]
 pub struct ExternModuleSimulation<T: BundleType> {
     generator: Interned<dyn DynExternModuleSimGenerator>,
+    source_location: SourceLocation,
     _phantom: PhantomData<T>,
 }
 
 impl<T: BundleType> ExternModuleSimulation<T> {
-    pub fn new<G: ExternModuleSimGenerator>(generator: G) -> Self {
+    pub fn new_with_loc<G: ExternModuleSimGenerator>(
+        source_location: SourceLocation,
+        generator: G,
+    ) -> Self {
         Self {
             generator: Interned::cast_unchecked(
                 generator.intern(),
                 |v| -> &dyn DynExternModuleSimGenerator { v },
             ),
+            source_location,
             _phantom: PhantomData,
         }
     }
+    #[track_caller]
+    pub fn new<G: ExternModuleSimGenerator>(generator: G) -> Self {
+        Self::new_with_loc(SourceLocation::caller(), generator)
+    }
     pub fn canonical(self) -> ExternModuleSimulation<Bundle> {
+        let Self {
+            generator,
+            source_location,
+            _phantom: _,
+        } = self;
         ExternModuleSimulation {
-            generator: self.generator,
+            generator,
+            source_location,
             _phantom: PhantomData,
         }
     }
     pub fn from_canonical(v: ExternModuleSimulation<Bundle>) -> Self {
+        let ExternModuleSimulation {
+            generator,
+            source_location,
+            _phantom: _,
+        } = v;
         Self {
-            generator: v.generator,
+            generator,
+            source_location,
             _phantom: PhantomData,
         }
     }
 }
 
 impl ExternModuleSimulation<Bundle> {
-    fn run<'a>(
+    fn run(
-        &'a self,
+        &self,
         sim: ExternModuleSimulationState<Bundle>,
-    ) -> Box<dyn Future<Output = ()> + 'a> {
+    ) -> Box<dyn Future<Output = ()> + 'static> {
-        self.generator.dyn_run(sim)
+        Interned::into_inner(self.generator).dyn_run(sim)
     }
     #[track_caller]
     pub fn check_io_ty(self, io_ty: Bundle) {

crates/fayalite/tests/sim/expected/conditional_assignment_last.txt

@@ -92,7 +92,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::conditional_assignment_last,
+                instantiated: Module {
+                    name: conditional_assignment_last,
+                    ..
+                },
+            }.i,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::conditional_assignment_last,
@@ -100,36 +110,11 @@ Simulation {
                     name: conditional_assignment_last,
                     ..
                 },
-        }.i: CompiledValue {
+            }.i,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(conditional_assignment_last: conditional_assignment_last).conditional_assignment_last::i",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "conditional_assignment_last",

crates/fayalite/tests/sim/expected/connect_const.txt

@@ -68,7 +68,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::connect_const,
+                instantiated: Module {
+                    name: connect_const,
+                    ..
+                },
+            }.o,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::connect_const,
@@ -76,36 +86,11 @@ Simulation {
                     name: connect_const,
                     ..
                 },
-        }.o: CompiledValue {
+            }.o,
-            layout: CompiledTypeLayout {
-                ty: UInt<8>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const: connect_const).connect_const::o",
-                                ty: UInt<8>,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "connect_const",

crates/fayalite/tests/sim/expected/connect_const_reset.txt

@@ -97,7 +97,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::connect_const_reset,
+                instantiated: Module {
+                    name: connect_const_reset,
+                    ..
+                },
+            }.reset_out,
+            Instance {
+                name: <simulator>::connect_const_reset,
+                instantiated: Module {
+                    name: connect_const_reset,
+                    ..
+                },
+            }.bit_out,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::connect_const_reset,
@@ -105,70 +122,18 @@ Simulation {
                     name: connect_const_reset,
                     ..
                 },
-        }.bit_out: CompiledValue {
+            }.bit_out,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const_reset: connect_const_reset).connect_const_reset::bit_out",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::connect_const_reset,
                 instantiated: Module {
                     name: connect_const_reset,
                     ..
                 },
-        }.reset_out: CompiledValue {
+            }.reset_out,
-            layout: CompiledTypeLayout {
-                ty: AsyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const_reset: connect_const_reset).connect_const_reset::reset_out",
-                                ty: AsyncReset,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "connect_const_reset",

crates/fayalite/tests/sim/expected/counter_async.txt

@@ -203,7 +203,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.count,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::counter,
@@ -211,204 +228,32 @@ Simulation {
                     name: counter,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: AsyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.rst",
-                                ty: AsyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: AsyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: AsyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: AsyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: AsyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.count: CompiledValue {
+            }.count,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::count",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "counter",

crates/fayalite/tests/sim/expected/counter_sync.txt

@@ -184,7 +184,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.count,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::counter,
@@ -192,204 +209,32 @@ Simulation {
                     name: counter,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.count: CompiledValue {
+            }.count,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::count",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "counter",

crates/fayalite/tests/sim/expected/duplicate_names.txt

@@ -88,9 +88,13 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [],
+        uninitialized_ios: {},
         io_targets: {},
-    made_initial_step: true,
+        did_initial_settle: true,
+    },
+    extern_modules: [],
     needs_settle: false,
     trace_decls: TraceModule {
         name: "duplicate_names",

crates/fayalite/tests/sim/expected/enums.txt

@@ -1215,7 +1215,59 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.en,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.which_in,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.data_in,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.which_out,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.data_out,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.b_out,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::enums,
@@ -1223,380 +1275,67 @@ Simulation {
                     name: enums,
                     ..
                 },
-        }.b_out: CompiledValue {
+            }.b_out,
-            layout: CompiledTypeLayout {
-                ty: Enum {
-                    HdlNone,
-                    HdlSome(Bundle {0: UInt<1>, 1: Bool}),
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::b_out",
-                                ty: Enum {
-                                    HdlNone,
-                                    HdlSome(Bundle {0: UInt<1>, 1: Bool}),
-                                },
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 7, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.data_in: CompiledValue {
+            }.data_in,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::data_in",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 4, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.data_out: CompiledValue {
+            }.data_out,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::data_out",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 6, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.en: CompiledValue {
+            }.en,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::en",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.which_in: CompiledValue {
+            }.which_in,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::which_in",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.which_out: CompiledValue {
+            }.which_out,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::which_out",
-                                ty: UInt<2>,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 5, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "enums",

crates/fayalite/tests/sim/expected/memories2.txt

@@ -598,7 +598,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::memories2,
+                instantiated: Module {
+                    name: memories2,
+                    ..
+                },
+            }.rw,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::memories2,
@@ -606,505 +616,60 @@ Simulation {
                     name: memories2,
                     ..
                 },
-        }.rw: CompiledValue {
+            }.rw,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    addr: UInt<3>,
-                    /* offset = 3 */
-                    en: Bool,
-                    /* offset = 4 */
-                    clk: Clock,
-                    #[hdl(flip)] /* offset = 5 */
-                    rdata: UInt<2>,
-                    /* offset = 7 */
-                    wmode: Bool,
-                    /* offset = 8 */
-                    wdata: UInt<2>,
-                    /* offset = 10 */
-                    wmask: Bool,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 7,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.addr",
-                                ty: UInt<3>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.en",
-                                ty: Bool,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.rdata",
-                                ty: UInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wmode",
-                                ty: Bool,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wdata",
-                                ty: UInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wmask",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<3>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<3>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(2),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(3),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(4),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(5),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(6),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 7 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.addr: CompiledValue {
+            }.rw.addr,
-            layout: CompiledTypeLayout {
-                ty: UInt<3>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<3>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.clk: CompiledValue {
+            }.rw.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.en: CompiledValue {
+            }.rw.en,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.rdata: CompiledValue {
+            }.rw.rdata,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wdata: CompiledValue {
+            }.rw.wdata,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 5, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wmask: CompiledValue {
+            }.rw.wmask,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 6, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wmode: CompiledValue {
+            }.rw.wmode,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 4, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "memories2",

crates/fayalite/tests/sim/expected/mod1.txt

@@ -216,7 +216,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::mod1,
+                instantiated: Module {
+                    name: mod1,
+                    ..
+                },
+            }.o,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::mod1,
@@ -224,304 +234,39 @@ Simulation {
                     name: mod1,
                     ..
                 },
-        }.o: CompiledValue {
+            }.o,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    #[hdl(flip)] /* offset = 0 */
-                    i: UInt<4>,
-                    /* offset = 4 */
-                    o: SInt<2>,
-                    #[hdl(flip)] /* offset = 6 */
-                    i2: SInt<2>,
-                    /* offset = 8 */
-                    o2: UInt<4>,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 4,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.i",
-                                ty: UInt<4>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.o",
-                                ty: SInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.i2",
-                                ty: SInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.o2",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<4>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<4>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(2),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(3),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<4>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<4>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 4 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.i: CompiledValue {
+            }.o.i,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.i2: CompiledValue {
+            }.o.i2,
-            layout: CompiledTypeLayout {
-                ty: SInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.o: CompiledValue {
+            }.o.o,
-            layout: CompiledTypeLayout {
-                ty: SInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.o2: CompiledValue {
+            }.o.o2,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "mod1",

crates/fayalite/tests/sim/expected/shift_register.txt

@@ -265,7 +265,31 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.d,
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.q,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::shift_register,
@@ -273,238 +297,39 @@ Simulation {
                     name: shift_register,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.d: CompiledValue {
+            }.d,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::d",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.q: CompiledValue {
+            }.q,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::q",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
     needs_settle: false,
     trace_decls: TraceModule {
         name: "shift_register",