cpu/crates/cpu/tests
2026-03-26 19:21:52 -07:00
..
expected update fayalite for libre-chip/fayalite#68 change vcd output to have module contents under instance's name 2026-03-26 19:21:52 -07:00
simple_power_isa_decoder update to latest fayalite 2026-03-24 23:46:46 -07:00
fetch.rs change MemoryInterface types to have their own config 2026-03-24 23:46:46 -07:00
main_memory_and_io.rs add sram and main_memory_and_io modules 2026-03-26 02:03:06 -07:00
memory_interface.rs add memory_interface_adapter_no_split 2026-03-26 02:03:06 -07:00
next_pc.rs next_pc works afaict 2025-12-16 23:06:32 -08:00
reg_alloc.rs extract lut out into separate Lut4 type and add test 2026-01-20 16:03:28 -08:00
simple_uart.rs add memory_interface_adapter_no_split 2026-03-26 02:03:06 -07:00