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base: programmerjake:f1d4e508cb332e9e92b483dd18d95cb25b2dce8b
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programmerjake:master
programmerjake:create-fetch-and-i-cache-logic
libre-chip:master
libre-chip:wip-splitting-reg-alloc
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compare: programmerjake:1d8adba04cb0eb25a4700835fab9e82e57808636
Branches Tags
programmerjake:create-fetch-and-i-cache-logic
programmerjake:master
libre-chip:master
libre-chip:wip-splitting-reg-alloc

7 commits
f1d4e508cb ... 1d8adba04c

Author SHA1 Message Date
Jacob Lifshay
1d8adba04c
WIP linking next_pc stages together 2025-12-09 22:36:48 -08:00
Jacob Lifshay
e3ebbe6b40
WIP: completed stages of next-pc logic, still need to combine them into a pipeline 2025-12-08 21:59:05 -08:00
Jacob Lifshay
dca59a24ec
WIP adding next_pc: add call stack 2025-11-28 01:41:40 -08:00
Jacob Lifshay
cd769a958d
WIP adding next_pc: added mock_fetch_decode_pipe 2025-11-27 01:30:45 -08:00
Jacob Lifshay
688732ec4c
add Serialize/Deserialize impls for CpuConfig 2025-11-24 00:58:51 -08:00
Jacob Lifshay
f2af2d1859
update for new fayalite 2025-11-24 00:58:49 -08:00
Jacob Lifshay
28b1f1d728
update Fayalite to get new features and bug fixes 2025-11-24 00:24:49 -08:00
4 changed files with 290 additions and 706 deletions
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8
Cargo.lock generated
View file

@ -305,7 +305,7 @@ checksum = "e8c02a5121d4ea3eb16a80748c74f5549a5665e4c21333c6098f283870fbdea6"
[[package]]
name = "fayalite"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbe4585578a043829bfb4d5af087fc7f4bf010b8"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#9e803223d0f08c3398182cbabbff28cda7853b0f"
dependencies = [
"base64",
"bitvec",
@ -332,7 +332,7 @@ dependencies = [
[[package]]
name = "fayalite-proc-macros"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbe4585578a043829bfb4d5af087fc7f4bf010b8"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#9e803223d0f08c3398182cbabbff28cda7853b0f"
dependencies = [
"fayalite-proc-macros-impl",
]
@ -340,7 +340,7 @@ dependencies = [
[[package]]
name = "fayalite-proc-macros-impl"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbe4585578a043829bfb4d5af087fc7f4bf010b8"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#9e803223d0f08c3398182cbabbff28cda7853b0f"
dependencies = [
"base16ct",
"num-bigint",
@ -355,7 +355,7 @@ dependencies = [
[[package]]
name = "fayalite-visit-gen"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbe4585578a043829bfb4d5af087fc7f4bf010b8"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#9e803223d0f08c3398182cbabbff28cda7853b0f"
dependencies = [
"indexmap",
"prettyplease",

15
crates/cpu/src/config.rs
View file

@ -160,18 +160,3 @@ pub type CpuConfigLog2FetchWidthInBytes<C: PhantomConstGet<CpuConfig>> = DynSize
#[hdl(get(|c| c.fetch_width_in_bytes()))]
pub type CpuConfigFetchWidthInBytes<C: PhantomConstGet<CpuConfig>> = DynSize;
#[hdl(get(|c| c.rob_size.get()))]
pub type CpuConfigRobSize<C: PhantomConstGet<CpuConfig>> = DynSize;
pub trait PhantomConstCpuConfig:
PhantomConstGet<CpuConfig>
+ Into<PhantomConst<CpuConfig>>
+ From<PhantomConst<CpuConfig>>
+ Type
+ ToSimValue<Type = Self>
+ ToExpr<Type = Self>
{
}
impl PhantomConstCpuConfig for PhantomConst<CpuConfig> {}

962
crates/cpu/src/next_pc.rs
View file

File diff suppressed because it is too large Load diff

11
crates/cpu/src/next_pc/next_pc.mermaid
View file

@ -16,7 +16,10 @@ stateDiagram-v2
br_pred --> post_decode
post_decode --> next_pc: cancel following
state "Execute/Retire" as execute_retire
post_decode --> execute_retire
execute_retire --> [*]
execute_retire --> next_pc: cancel following
state "Rename\nDispatch\nExecute" as execute
post_decode --> execute
state "Retire" as retire
execute --> retire
retire --> [*]
retire --> next_pc: cancel following