Clifford Wolf f6629b9c29 Optimize memory address port width in wreduce and memory_collect, not verilog front-end		2016-08-19 18:38:25 +02:00
..
cmds	Minor fixes in show command	2016-08-16 00:36:24 +02:00
equiv	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
fsm	Minor bugfix in FSM reset state detection	2016-07-12 09:46:15 +02:00
hierarchy	Fixed use-after-free dict<> usage pattern in hierarchy.cc	2016-08-16 09:07:13 +02:00
memory	Optimize memory address port width in wreduce and memory_collect, not verilog front-end	2016-08-19 18:38:25 +02:00
opt	Optimize memory address port width in wreduce and memory_collect, not verilog front-end	2016-08-19 18:38:25 +02:00
proc	Added "proc_mux -ifx"	2016-06-06 17:15:50 +02:00
sat	Moved SatHelper::setup_init() code to SatHelper::setup()	2016-07-24 12:18:39 +02:00
techmap	Fixed some compiler warnings in attrmap command	2016-08-10 13:44:08 +02:00
tests	Bugfix in test_autotb	2016-08-18 13:43:12 +02:00