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yosys/frontends
Jannis Harder f019e44e74 verificsva: Support the followed-by operator in cover mode
The implementation for the implication operator in cover mode actually
implements the followed-by operator, so we can re-use it unchanged.

It is not always the correct behavior for the implication operator in
cover mode, but a) it will only cause false positives not miss anything
so if the behavior is unexpected it will be visible in the produced
traces, b) it is unlikely to make a difference for most properties one
would practically use in cover mode, c) at least one other widely used
SVA implementations behaves the same way and d) it's not clear whether
we can fix this without rewriting most of verificsva.cc
2025-06-13 21:27:31 +02:00
..
aiger rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
aiger2 aiger2: Clean debug print 2024-12-10 14:27:55 +01:00
ast Merge pull request #5163 from YosysHQ/emil/fix-single-bit-vector-leak 2025-06-04 17:00:54 +02:00
blif rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
json fix handling of escaped chars in json backend and frontend 2022-02-18 17:13:09 +01:00
liberty Liberty file caching with new libcache command 2025-04-03 13:39:35 +02:00
rpc Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
rtlil read_rtlil: warn on assigns after switches in case rules 2024-11-21 22:41:13 +01:00
verific verificsva: Support the followed-by operator in cover mode 2025-06-13 21:27:31 +02:00
verilog Merge pull request #5160 from garytwong/fast-lex 2025-06-13 09:57:01 +12:00