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abc9_model.v
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
arith_map.v
|
analogdevices: update timing model
|
2025-10-06 23:56:44 +01:00 |
|
brams.txt
|
analogdevices: Adding RBRAM2 and -tech
|
2025-10-11 12:06:35 +13:00 |
|
brams_defs.vh
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
brams_map.v
|
analogdevices: Adding RBRAM2 and -tech
|
2025-10-11 12:06:35 +13:00 |
|
cells_map.v
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
cells_sim.v
|
analogdevices: Adding RBRAM2 and -tech
|
2025-10-11 12:06:35 +13:00 |
|
cells_xtra.py
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
cells_xtra.v
|
analogdevices: remove some extra cells!
|
2025-10-06 23:56:44 +01:00 |
|
dsp_map.v
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
ff_map.v
|
test suite
|
2025-10-06 23:56:44 +01:00 |
|
lut_map.v
|
analogdevices: update timing model
|
2025-10-06 23:56:44 +01:00 |
|
lutrams.txt
|
analogdevices: Native LUTRAM primitives
|
2025-10-09 04:51:29 +01:00 |
|
lutrams_map.v
|
analogdevices: Native LUTRAM primitives
|
2025-10-09 04:51:29 +01:00 |
|
Makefile.inc
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
mux_map.v
|
Create synth_analogdevices
|
2025-10-06 23:56:43 +01:00 |
|
retarget_map.v
|
analogdevices: user retargeting
|
2025-10-06 23:56:44 +01:00 |
