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Andrew Pullin deadaa9220 ast: Add support for array-to-array assignment 
This commit adds support for SystemVerilog array-to-array assignment
operations that were previously unsupported:

1. Direct array assignment: `b = a;`
2. Array ternary expressions: `out = sel ? a : b;`

Both single-dimensional and multi-dimensional unpacked arrays are
supported. The implementation expands these array operations during
AST simplification into element-wise assignments.

Example of now-supported syntax:
```systemverilog
wire [7:0] state_regs[8];
wire [7:0] r[8];
wire [7:0] sel[8];
assign sel = condition ? state_regs : r;
```

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-23 11:06:08 -08:00
..
array_assign.sv ast: Add support for array-to-array assignment 2026-01-23 11:06:08 -08:00
enum_simple.sv Revert typedef tests to standard grammar. 2020-03-22 18:20:46 -07:00
enum_simple.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
logic_rom.sv ast/simplify: don't bitblast async ROMs declared as logic. 2020-05-05 04:16:59 +00:00
logic_rom.ys Add v2 memory cells. 2021-08-11 13:34:10 +02:00
multirange_array.sv Add support for packed multidimensional arrays 2024-02-11 11:26:52 -05:00
multirange_subarray_access.ys Add test for subarray access on multidimensional arrays 2020-08-03 17:07:33 +02:00
run-test.sh test: restore verific handling, nicer naming 2024-12-13 10:24:47 +01:00
static_cast_negative.ys static cast: add tests 2020-06-19 17:40:38 -07:00
static_cast_nonconst.ys static cast: add tests 2020-06-19 17:40:38 -07:00
static_cast_simple.sv static cast: add tests 2020-06-19 17:40:38 -07:00
static_cast_verilog.ys static cast: add tests 2020-06-19 17:40:38 -07:00
static_cast_zero.ys static cast: add tests 2020-06-19 17:40:38 -07:00
struct_array.sv Resolve struct member multiple dimensions defined in stages with typedef 2024-02-11 11:26:52 -05:00
struct_dynamic_range.sv Handling of attributes for struct / union variables 2023-05-03 18:44:07 +02:00
struct_dynamic_range.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
struct_simple.sv Allow structs within structs. 2020-05-12 17:20:34 +01:00
struct_sizebits.sv fix test for verific 2024-02-12 09:19:58 +01:00
typedef_initial_and_assign.sv sv: improve support for wire and var with user-defined types 2021-08-12 22:41:41 -06:00
typedef_initial_and_assign.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
typedef_memory.sv Revert typedef tests to standard grammar. 2020-03-22 18:20:46 -07:00
typedef_memory.ys Add v2 memory cells. 2021-08-11 13:34:10 +02:00
typedef_memory_2.sv Revert typedef tests to standard grammar. 2020-03-22 18:20:46 -07:00
typedef_memory_2.ys Add v2 memory cells. 2021-08-11 13:34:10 +02:00
typedef_package.sv support using previously declared types/localparams/params in package 2020-04-07 00:38:15 -04:00
typedef_param.sv Revert typedef tests to standard grammar. 2020-03-22 18:20:46 -07:00
typedef_scopes.sv Correct hierarchical path names for structs and unions 2024-01-04 17:22:07 +01:00
typedef_simple.sv Revert typedef tests to standard grammar. 2020-03-22 18:20:46 -07:00
typedef_struct.sv Corrected handling of nested typedefs of struct/union 2023-07-20 23:39:44 -04:00
typedef_struct_global.ys Tests: Add svtypes/typedef_struct_global.ys 2025-05-26 12:16:58 +12:00
typedef_struct_port.sv Add typedef input/output test 2021-01-18 17:31:22 +01:00
typedef_struct_port.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
union_simple.sv Handle struct members of union type (#3641) 2023-01-29 13:45:45 -05:00