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14 lines
289 B
Text
14 lines
289 B
Text
read_verilog alu_sub.v
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proc
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hierarchy -auto-top
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select -assert-mod-count 1 adder
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select -assert-mod-count 1 wrapper
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select -assert-mod-count 1 alu
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sdc -keep_hierarchy alu_sub.sdc
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flatten
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select -assert-mod-count 0 adder
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select -assert-mod-count 1 wrapper
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select -assert-mod-count 1 alu
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