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Code
Activity
ddf68e5113
yosys
/
techlibs
/
common
History
Ethan Sifferman
d5beb65d30
added SIMLIB_VERILATOR_COMPAT
2025-10-01 10:19:25 -07:00
..
choices
.gitignore
abc9_map.v
abc9_model.v
abc9_unmap.v
adff2dff.v
cellhelp.py
cells.lib
cmp2lcu.v
cmp2lut.v
cmp2softlogic.v
dff2ff.v
gate2lut.v
gen_fine_ffs.py
Makefile.inc
mul2dsp.v
pmux2mux.v
prep.cc
simcells.v
simlib.v
smtmap.v
synth.cc
techmap.v