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yosys/passes
Akash Levy 23b021a26b Fix opt_compact_prefix wide packs and opt_priority_onehot max-width test
The tests/silimate suite (which aborted the Run tests CI job) exposed two
issues in the generalized passes:

- opt_compact_prefix: the forward dense pack regressions at 64 and 128 bits
  no longer rewrote. The ConstEval fingerprint was uint64_t-based (capped at
  62 bits) and the per-cone cell cap (max_width*96) was below the O(width^2)
  cell count of a wide pack. The fingerprint now drives whole-width Const
  bit patterns (no width cap) and the cone cap scales quadratically; total
  work stays bounded by the shared walk/eval budgets.

- opt_priority_onehot: the "max-width below lane count" negative test set
  max_width=8 on a 16-lane design expecting no rewrite, but the generalized
  matcher legitimately (and equivalence-provably) rewrites the 8-lane
  sub-region. The test now uses max_width=3 (below min_width 4) to verify
  the width gate suppresses all matching.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-15 12:02:09 -07:00
..
cmds fix 2026-04-30 12:30:09 -07:00
equiv Bump to latest 2025-09-21 01:10:04 -07:00
fsm fsm_detect: add adff detection 2025-11-06 23:29:47 +02:00
hierarchy Fixup NEW_ID usage 2026-05-27 00:09:12 -07:00
memory Fix cell naming issues 2026-02-13 01:05:51 -08:00
opt Cleanup 2026-06-15 09:09:27 -07:00
pmgen More minor cleanup 2025-09-28 07:19:53 -07:00
proc proc_clean: Removing an empty full_case is doing something 2026-01-07 13:10:32 +13:00
sat fix: don't log error when getting non-top cells in -bb mode 2026-05-12 10:01:42 -07:00
silimate Fix opt_compact_prefix wide packs and opt_priority_onehot max-width test 2026-06-15 12:02:09 -07:00
techmap necessary clock gate pass modifications 2026-06-01 17:19:23 -07:00
tests test_cell.cc: Generate .aag for all compatible cells 2025-12-02 14:03:36 +13:00