Tony Min d41688f7d7 Revisions (#4) ... * area should be 1 for all LUTs * clean up macros * add log_assert to fail noisily when encountering oddly configured DFF * clean help msg * flatten set to true by default * update * merge mult tests * remove redundant test * move all dsp tests to single file and remove redundant tests * update ram tests * add more dff tests * fix c++20 compile errors * add option to dump verilog * default to use abc9 * remove -abc9 option since its the default now --------- Co-authored-by: tony <minchunlin@gmail.com>		2024-07-08 10:57:16 -04:00
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arith_map.v	add assertions for synth_microchip tests	2024-07-04 15:45:44 -04:00
brams_defs.vh	Add missing u sram init (#3)	2024-07-04 16:39:10 -04:00
cells_map.v	changes made to filenames + references	2024-07-04 08:53:41 -07:00
cells_sim.v	Revisions (#4)	2024-07-08 10:57:16 -04:00
LSRAM.txt	changes made to filenames + references	2024-07-04 08:53:41 -07:00
LSRAM_map.v	changes made to filenames + references	2024-07-04 08:53:41 -07:00
Makefile.inc	fixed typos, build with makefile succeeds	2024-07-04 09:33:58 -07:00
microchip_dffopt.cc	Revisions (#4)	2024-07-08 10:57:16 -04:00
polarfire_dsp_map.v	changes made to filenames + references	2024-07-04 08:53:41 -07:00
synth_microchip.cc	Revisions (#4)	2024-07-08 10:57:16 -04:00
uSRAM.txt	changes made to filenames + references	2024-07-04 08:53:41 -07:00
uSRAM_map.v	Add missing u sram init (#3)	2024-07-04 16:39:10 -04:00