mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 18:05:24 +00:00
Code Activity
yosys/techlibs
History
David Shah d38df68d26 xilinx: Add correct signed behaviour to DSP48E1 model 
Signed-off-by: David Shah <dave@ds0.me>
2019-07-16 17:53:08 +01:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
common mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH+`DSP_A_MAXWIDTH 2019-07-16 16:44:40 +01:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-07-10 15:58:01 -07:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 synth_ice40: switch -relut to be always on. 2019-07-11 20:18:41 +00:00
intel synth_intel: Warn about untested Quartus backend 2019-07-07 19:26:31 +01:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx xilinx: Add correct signed behaviour to DSP48E1 model 2019-07-16 17:53:08 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00