3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-06-22 00:30:27 +00:00
yosys/passes
2017-09-14 10:25:51 -07:00
..
cmds More intuitive handling of "cd .." for singleton modules 2017-08-19 00:15:12 +02:00
equiv
fsm Remove some dead code from fsm_map 2017-08-21 15:02:16 +02:00
hierarchy Rename "singleton" pass to "uniquify" 2017-08-20 12:31:50 +02:00
memory
opt Don't track , ... contradictions through x/z-bits 2017-08-25 16:18:17 +02:00
proc Add src attribute to extra cells generated by proc_dlatch 2017-09-09 10:18:08 +02:00
sat Rename "singleton" pass to "uniquify" 2017-08-20 12:31:50 +02:00
techmap Fixed typo in comment. Fixed bug where extract_counter would create up counters when it meant to create down counters. 2017-09-14 10:25:51 -07:00
tests