mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-30 19:22:31 +00:00 
			
		
		
		
	Typo fix.
This commit is contained in:
		
							parent
							
								
									209a3d9ffc
								
							
						
					
					
						commit
						df4ab169a7
					
				
					 1 changed files with 1 additions and 1 deletions
				
			
		|  | @ -753,7 +753,7 @@ struct MemorySharePass : public Pass { | |||
| 		log("\n"); | ||||
| 	} | ||||
| 	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { | ||||
| 		log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrc/$memwr cells).\n"); | ||||
| 		log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n"); | ||||
| 		extra_args(args, 1, design); | ||||
| 		for (auto module : design->selected_modules()) | ||||
| 			MemoryShareWorker(design, module); | ||||
|  |  | |||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue