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36 lines
586 B
Text
36 lines
586 B
Text
read_verilog <<EOT
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module buffer(
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output o,
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input i
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);
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assign o = i;
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endmodule
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EOT
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write_json json_sbvector_no.out
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! ! grep -qF 'sbvector' json_sbvector_no.out
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design -reset
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read_verilog <<EOT
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module buffer(
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output o,
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input [0:0] i
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);
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assign o = i;
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endmodule
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EOT
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write_json json_sbvector_yes.out
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! grep -qF 'sbvector' json_sbvector_yes.out
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design -reset
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read_json json_sbvector_yes.out
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logger -expect log "wire width 1 input 2 \\i" 1
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dump
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logger -check-expected
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design -reset
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read_json json_sbvector_no.out
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logger -expect log "wire input 2 \\i" 1
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dump
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logger -check-expected
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