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yosys/tests
2020-01-28 12:46:18 -08:00
..
aiger Add testcases 2020-01-07 11:44:20 -08:00
arch Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts 2020-01-28 11:55:51 -08:00
asicworld
bram
errors
fsm Speed up "make test" and related cleanups 2019-08-17 14:37:07 +02:00
hana
liberty
lut Forgot to commit 2019-07-16 12:44:26 -07:00
memories memory_dff: Fix checking of feedback mux input when more than one mux 2019-07-02 13:35:50 +01:00
opt Add testcase 2019-12-13 10:26:30 -08:00
opt_share Support various binary operators in opt_share 2019-08-04 19:06:38 +02:00
proc proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
realmath
rpc rpc: new frontend. 2019-09-30 15:53:11 +00:00
sat Even more obvious testcase 2019-12-11 23:52:05 -08:00
share
simple Make SV2017 compliant courtesy of @wsnyder 2019-12-12 07:34:07 -08:00
simple_abc9 simple_abc9 tests to discard whitebox before write for sim 2020-01-23 22:07:43 -08:00
smv
sva
svinterfaces
svtypes Use "(id)" instead of "id" for types as temporary hack 2019-10-14 05:24:31 +02:00
techmap Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-15 16:42:16 -08:00
tools
unit
various Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-21 16:27:40 -08:00
vloghtb