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yosys/passes
Akash Levy 676ac184ed opt_prienc: guard ConstEval fingerprint inputs against constant/aliased bits
The round-robin detector fed sigmap(wire) signals straight into
ConstEval::set() while sweeping test vectors. On real designs a candidate
bus can have bits tied to constants, repeated bits, or a req/start pair
that alias to the same net after sigmap. ConstEval::set() asserts
(current_val[i].wire != NULL || current_val[i] == value[i]) when asked to
re-pin such a bit to a conflicting value, crashing the pass
(consteval.h:83) on designs like veer/picorv32/murax/raygentop under
formal synthesis.

Add clean_set_signals() and reject any fingerprint candidate whose
set-signals contain constant bits, repeated bits, or overlap each other,
in both the priority-encoder and round-robin paths. Skipping an unclean
candidate only forgoes a possible rewrite; it never produces an incorrect
one. Clean candidates (the intended patterns) are unaffected.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-07-06 21:35:51 -07:00
..
cmds stat bugfix 2026-06-28 20:28:23 -07:00
equiv Merge remote-tracking branch 'upstream' into merge3 2026-06-25 04:51:46 -07:00
fsm Migrate build system to CMake 2026-06-03 08:58:10 +00:00
hierarchy Merge remote-tracking branch 'upstream' into merge3 2026-06-25 04:51:46 -07:00
memory Merge remote-tracking branch 'upstream' into merge3 2026-06-25 04:51:46 -07:00
opt opt_prienc: guard ConstEval fingerprint inputs against constant/aliased bits 2026-07-06 21:35:51 -07:00
pmgen Migrate build system to CMake 2026-06-03 08:58:10 +00:00
proc End of file fix 2026-06-23 07:23:41 +02:00
sat Allow sim pass to handle 4-input gates 2026-07-06 07:41:08 -07:00
silimate carvenetlist: keep cone boundary gate; address review comments 2026-07-06 09:13:18 -07:00
techmap Naming improvements 2026-07-06 07:40:14 -07:00
tests End of file fix 2026-06-23 07:23:41 +02:00
CMakeLists.txt CMake: integrate silimate additions and extensions 2026-06-10 20:27:52 +03:00