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yosys/techlibs/anlogic
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Icenowy Zheng 90d00182cf anlogic: implement DRAM initialization 
As the TD tool doesn't accept the DRAM cell to contain unknown values in
the initial value, the initialzation support of DRAM is previously
skipped.

Now add the support by add a new pass to determine unknown values in the
initial value.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2018-12-20 07:56:15 +08:00
..
anlogic_determine_init.cc anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00
anlogic_eqn.cc Initial support for Anlogic FPGA 2018-12-01 18:28:54 +01:00
arith_map.v Initial support for Anlogic FPGA 2018-12-01 18:28:54 +01:00
cells_map.v Initial support for Anlogic FPGA 2018-12-01 18:28:54 +01:00
cells_sim.v Initial support for Anlogic FPGA 2018-12-01 18:28:54 +01:00
dram_init_16x4.vh anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00
drams.txt anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00
drams_map.v anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00
eagle_bb.v Revert "Leave only real black box cells" 2018-12-17 23:20:40 +08:00
Makefile.inc anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00
synth_anlogic.cc anlogic: implement DRAM initialization 2018-12-20 07:56:15 +08:00