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This is the other half of the signorm-native opt_clean: the two are
strictly complementary, since whichever of them still calls
sigNormalize(false) destroys the index and opt_expr rebuilds it on the
next iteration of the opt loop. Together they take `opt` on a 2000-stage
pipeline from 4.54s to 3.14s (Debug) against main-dbg's 4.28s, with peak
RSS 540MB against main's 683MB.
The obstacle was never bit2mux/bitusers, as the TODO removed here
guessed -- that guard passes in both modes, and it is not even consulted
in one pass: try_merge_srst absorbs the reset mux, emits an $sdff, pushes
it back onto dff_cells, and the enable is found on the next iteration.
What breaks is the SigMap the worker snapshots in its constructor.
FfData::emit() builds the replacement cell before the caller removes the
old one, so at setPort(Q, \q) the wire still has a driver and the kernel
does what I1 requires: interpose a fresh wire and alias \q to it. (Same
unconditionally for a sliced Q -- a port may never hold a partial wire.)
The snapshot does not relate the two, so try_merge_ce compares
a = sigmap(\q) against ff.sig_q and sees no feedback, yielding $sdff
where $sdffe was expected (tests/sim/sim_sdffe.ys).
So stop snapshotting. In signorm mode the module already maintains this
map and keeps it live across our edits; borrow it and settle the index
once per FF rewrite instead. FfDataSigMapped and BitSim take a
const SigMapView & so the borrow is read-only -- only the kernel may
write a module's own map.
Where resync() goes is the subtlety: only between whole FF rewrites.
Mid-rewrite, after try_merge_srst has emitted cells for some bit groups
but before the original cell is removed, a \q slice transiently has two
drivers, and flushing there would emit a multi-driver $connect instead of
merging the alias.
bitusers/bit2mux stay constructor snapshots. Keyed by canonical bits, so
a bit whose representative later moves becomes unreachable and its
lookups miss -- every guard reading them then fails closed, never open.
Test suite: 12 failures before, 12 after, four traded. Fixed:
arch/fabulous/fsm, arch/quicklogic/qlf_k6n10f/t_mem{5,6},
memories/wide_all. New: arch/{analogdevices/dsp_abc9,intel_alm/mul,
nexus/mul,nexus/fuse_mac}, all DSP/whitebox flows failing the same way --
techmap copies signorm helper wires out of a template that was in signorm
mode, and opt_expr -undriven then ties them to x. Diagnosed but not
fixed here; see g/signorm-opt_clean.md.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01MQU5XCqDYY8MbivGkNRrDo
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| .. | ||
| unstable | ||
| binding.cc | ||
| binding.h | ||
| bitpattern.h | ||
| calc.cc | ||
| cellaigs.cc | ||
| cellaigs.h | ||
| celledges.cc | ||
| celledges.h | ||
| cellhelp.py | ||
| celltypes.h | ||
| CMakeLists.txt | ||
| compressor_tree.cc | ||
| compressor_tree.h | ||
| compute_graph.h | ||
| consteval.h | ||
| constids.inc | ||
| cost.cc | ||
| cost.h | ||
| driver.cc | ||
| drivertools.cc | ||
| drivertools.h | ||
| ff.cc | ||
| ff.h | ||
| ffinit.h | ||
| ffmerge.cc | ||
| ffmerge.h | ||
| fmt.cc | ||
| fmt.h | ||
| fstdata.cc | ||
| fstdata.h | ||
| functional.cc | ||
| functional.h | ||
| gzip.cc | ||
| gzip.h | ||
| hashlib.h | ||
| io.cc | ||
| io.h | ||
| json.cc | ||
| json.h | ||
| log.cc | ||
| log.h | ||
| log_compat.cc | ||
| log_help.cc | ||
| log_help.h | ||
| macc.h | ||
| mem.cc | ||
| mem.h | ||
| modtools.h | ||
| newcelltypes.h | ||
| pattern.h | ||
| pmux.h | ||
| qcsat.cc | ||
| qcsat.h | ||
| register.cc | ||
| register.h | ||
| rtlil.cc | ||
| rtlil.h | ||
| rtlil_bufnorm.cc | ||
| satgen.cc | ||
| satgen.h | ||
| scopeinfo.cc | ||
| scopeinfo.h | ||
| sexpr.cc | ||
| sexpr.h | ||
| sigtools.h | ||
| tclapi.cc | ||
| threading.cc | ||
| threading.h | ||
| timinginfo.h | ||
| topo_scc.h | ||
| twine.cc | ||
| twine.h | ||
| utils.h | ||
| version.cc.in | ||
| yosys.cc | ||
| yosys.h | ||
| yosys_common.h | ||
| yosys_config.h.in | ||
| yw.cc | ||
| yw.h | ||