Jannis Harder 83dd99efb7 verific: New -sva-continue-on-error import option ... This option allows you to process a design that includes unsupported SVA. Unsupported SVA gets imported as formal cells using 'x inputs and with the `unsupported_sva` attribute set. This allows you to get a complete list of defined properties or to check only a supported subset of properties. To ensure no properties are unintentionally skipped for actual verification, even in cases where `-sva-continue-on-error` is used by default to read and inspect a design, `hierarchy -simcheck` and `hierarchy -smtcheck` (run by SBY) now ensure that no `unsupported_sva` property cells remain in the design.		2025-09-24 18:58:54 +02:00
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aiger	Remove .c_str() from parameters to log_debug()	2025-09-23 19:10:33 +12:00
aiger2	Remove .c_str() calls from log()/log_error()	2025-09-11 20:59:37 +00:00
ast	verilog: Bufnorm cell backend and frontend support	2025-09-17 14:01:09 +02:00
blif	Update frontends to avoid bits()	2025-09-16 03:17:23 +00:00
json	Use fast path for 32-bit Const integer constructor in more places	2025-09-16 03:17:24 +00:00
liberty	Remove .c_str() calls from parameters to log_header()	2025-09-16 23:00:42 +00:00
rpc	Remove .c_str() from parameters to log_debug()	2025-09-23 19:10:33 +12:00
rtlil	Use fast path for 32-bit Const integer constructor in more places	2025-09-16 03:17:24 +00:00
verific	verific: New -sva-continue-on-error import option	2025-09-24 18:58:54 +02:00
verilog	Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort	2025-09-22 11:14:39 +02:00