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alumacc
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macc_v2: Add test
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2025-01-27 13:19:26 +01:00 |
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arch
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Merge upstream
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2025-03-05 07:54:26 -08:00 |
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blif
|
Changed boolopt naming
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2025-01-16 19:36:27 -08:00 |
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liberty
|
Cleanup
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2025-02-14 08:48:27 -08:00 |
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memlib
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fixes for the yosys test
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2025-03-27 17:19:08 -07:00 |
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memories
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rtlil: Adjust internal check for $mem_v2 cells
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2024-11-08 15:18:43 +01:00 |
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opt
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Merge branch 'YosysHQ:main' into main
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2025-04-03 10:48:42 -07:00 |
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peepopt
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Fix Yosys test failures
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2025-03-13 14:15:13 -07:00 |
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sat
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test: restore verific handling, nicer naming
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2024-12-13 10:24:47 +01:00 |
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silimate
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Add lut2bmux, annotate_unqcoef, and seed tests
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2025-03-31 05:55:54 -07:00 |
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sim
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test: restore verific handling, nicer naming
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2024-12-13 10:24:47 +01:00 |
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simple
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Final cleanup
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2025-02-14 10:18:13 -08:00 |
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svtypes
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Sync
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2024-12-19 21:40:30 -08:00 |
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techmap
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Merge branch 'YosysHQ:main' into main
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2025-03-10 14:21:49 -07:00 |
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unit
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rtlil: Add {from,to}_hdl_index methods to Wire
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2025-02-18 17:08:45 +01:00 |
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various
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Merge branch 'YosysHQ:main' into main
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2025-03-28 14:56:36 -07:00 |
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verific
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Revert clocking.ys
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2025-02-13 20:32:17 -08:00 |
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verilog
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test: restore verific handling, nicer naming
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2024-12-13 10:24:47 +01:00 |
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gen-tests-makefile.sh
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Update gen-tests-makefile.sh
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2025-03-27 10:33:51 +13:00 |