mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-07 01:54:10 +00:00
Add error checking for reg/wire/logic misuse - PR now passes 'make test' (plus a new test) |
||
---|---|---|
.. | ||
ast | ||
blif | ||
ilang | ||
json | ||
liberty | ||
verific | ||
verilog |