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yosys/kernel
2026-04-01 09:21:02 -07:00
..
binding.cc
binding.h
bitpattern.h
calc.cc
cellaigs.cc
cellaigs.h
celledges.cc kernel/celledges: cover more cell types 2026-02-09 14:13:40 +01:00
celledges.h
celltypes.h Added built in cell alongside sim support for cell 2026-02-19 11:48:35 -08:00
compute_graph.h
consteval.h consteval: describe 2026-01-19 12:00:18 +01:00
constids.inc Merge pull request #109 from Silimate/clkgate_attr 2026-02-20 17:02:02 -08:00
cost.cc
cost.h
driver.cc
drivertools.cc
drivertools.h
ff.cc
ff.h
ffinit.h
ffmerge.cc Fix cell naming issues 2026-02-13 01:05:51 -08:00
ffmerge.h Fix cell naming issues 2026-02-13 01:05:51 -08:00
fmt.cc
fmt.h
fstdata.cc warning msg and address spaces 2026-04-01 09:21:02 -07:00
fstdata.h Support for N-dimensional arrays in simulation 2026-03-31 12:50:36 -07:00
functional.cc
functional.h
gzip.cc
gzip.h
hashlib.h
io.cc
io.h
json.cc
json.h
log.cc Use digit separators for large decimal integers 2026-01-13 16:38:12 +01:00
log.h
log_compat.cc
log_help.cc Merge from upstream 2026-01-28 18:17:50 -08:00
log_help.h
macc.h
mem.cc Smallfixes 2026-03-23 03:51:49 -07:00
mem.h
modtools.h
pattern.h Merge from upstream 2026-01-28 18:17:50 -08:00
qcsat.cc
qcsat.h
register.cc Update year in banner and license 2026-01-13 14:23:51 +01:00
register.h
rtlil.cc adding more fast Cell accessors and small refactoring to reduce code dup 2026-03-16 10:47:54 -07:00
rtlil.h adding more fast Cell accessors and small refactoring to reduce code dup 2026-03-16 10:47:54 -07:00
rtlil_bufnorm.cc
satgen.cc
satgen.h Set solver from scratchpad or command line 2026-02-06 19:26:32 -08:00
scopeinfo.cc
scopeinfo.h
sexpr.cc
sexpr.h
sigtools.h
tclapi.cc
threading.cc
threading.h
timinginfo.h
topo_scc.h
utils.h
yosys.cc Merge branch 'YosysHQ:main' into main 2026-01-13 11:28:34 -08:00
yosys.h
yosys_common.h
yw.cc
yw.h