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yosys/tests/verilog
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absurd_width.ys
absurd_width_const.ys
always_comb_latch_1.ys
always_comb_latch_2.ys
always_comb_latch_3.ys
always_comb_latch_4.ys
always_comb_nolatch_1.ys
always_comb_nolatch_2.ys
always_comb_nolatch_3.ys
always_comb_nolatch_4.ys sv: auto add nosync to certain always_comb local vars 2022-01-07 22:53:22 -07:00
always_comb_nolatch_5.ys sv: fix always_comb auto nosync for nested and function blocks 2022-04-05 14:43:48 -06:00
always_comb_nolatch_6.ys sv: fix always_comb auto nosync for nested and function blocks 2022-04-05 14:43:48 -06:00
asgn_expr.sv
asgn_expr.ys
asgn_expr_not_proc_1.ys
asgn_expr_not_proc_2.ys sv: support assignments within expressions 2023-09-05 22:27:55 -04:00
asgn_expr_not_proc_3.ys
asgn_expr_not_proc_4.ys
asgn_expr_not_proc_5.ys sv: support assignments within expressions 2023-09-05 22:27:55 -04:00
asgn_expr_not_sv_1.ys sv: support assignments within expressions 2023-09-05 22:27:55 -04:00
asgn_expr_not_sv_2.ys
asgn_expr_not_sv_3.ys
asgn_expr_not_sv_4.ys
assign_to_reg.ys write_verilog: don't assign to a reg. 2024-04-03 13:06:45 +02:00
atom_type_signedness.ys
block_end_label_only.ys
block_end_label_wrong.ys
block_labels.ys
bug656.v
bug656.ys verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
bug2037.ys
bug2042-sv.ys
bug2042.ys
bug2493.ys
conflict_assert.ys
conflict_cell_memory.ys genrtlil: improve name conflict error messaging 2021-02-26 18:08:23 -05:00
conflict_interface_port.ys genrtlil: improve name conflict error messaging 2021-02-26 18:08:23 -05:00
conflict_memory_wire.ys
conflict_pwire.ys
conflict_wire_memory.ys
const_arst.ys
const_sr.ys add tests 2020-09-28 18:16:08 +02:00
delay_mintypmax.ys
delay_risefall.ys
delay_time_scale.ys verilog: support for time scale delay values 2022-02-14 15:58:31 +01:00
doubleslash.ys
dynamic_range_lhs.sh
dynamic_range_lhs.v
for_decl_no_init.ys sv: support declaration in procedural for initialization 2021-08-30 15:19:21 -06:00
for_decl_no_sv.ys
for_decl_shadow.sv
for_decl_shadow.ys
func_arg_mismatch_1.ys verilog: fix sizing of constant args for tasks/functions 2021-02-21 15:44:43 -05:00
func_arg_mismatch_2.ys
func_arg_mismatch_3.ys verilog: fix sizing of constant args for tasks/functions 2021-02-21 15:44:43 -05:00
func_arg_mismatch_4.ys
func_tern_hint.sv verilog: fix width/sign detection for functions 2022-05-30 16:45:39 -04:00
func_tern_hint.ys
func_typename_ret.sv
func_typename_ret.ys
func_upto.sv
func_upto.ys
gen_block_end_label_only.ys sv: fix up end label checking 2021-06-16 21:48:05 -04:00
gen_block_end_label_wrong.ys
genblk_case.v
genblk_case.ys verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
genblk_port_decl.ys
genfor_decl_no_init.ys
genfor_decl_no_sv.ys
genvar_loop_decl_1.sv
genvar_loop_decl_1.ys
genvar_loop_decl_2.sv sv: support declaration in generate for initialization 2021-08-31 12:34:55 -06:00
genvar_loop_decl_2.ys
genvar_loop_decl_3.sv
genvar_loop_decl_3.ys sv: support declaration in generate for initialization 2021-08-31 12:34:55 -06:00
global_parameter.ys
hidden_decl.ys
ifdef_nest.ys preproc: test coverage for #2712 2021-03-30 12:23:18 -04:00
ifdef_unterminated.ys
include_self.v
include_self.ys
int_types.sv sv: extended support for integer types 2021-02-28 16:31:56 -05:00
int_types.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
localparam_no_default_1.ys sv: support for parameters without default values 2021-03-02 10:43:53 -05:00
localparam_no_default_2.ys
macro_arg_tromp.sv verilog: save and restore overwritten macro arguments 2021-07-28 21:52:16 -04:00
macro_arg_tromp.ys
macro_unapplied.ys
macro_unapplied_newline.ys
mem_bounds.sv mem2reg: tolerate out of bounds constant accesses 2021-06-08 15:02:57 -04:00
mem_bounds.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
module_end_label.ys
net_types.sv
net_types.ys
package_end_label.ys sv: check validity of package end label 2021-05-10 14:37:32 -04:00
package_task_func.sv
package_task_func.ys
param_int_types.sv
param_int_types.ys
param_no_default.sv
param_no_default.ys hierarchy: Without a known top module, derive all deferred modules 2024-02-06 10:31:40 +01:00
param_no_default_not_svmode.ys
param_no_default_unbound_1.ys
param_no_default_unbound_2.ys
param_no_default_unbound_3.ys sv: support for parameters without default values 2021-03-02 10:43:53 -05:00
param_no_default_unbound_4.ys sv: support for parameters without default values 2021-03-02 10:43:53 -05:00
param_no_default_unbound_5.ys sv: support for parameters without default values 2021-03-02 10:43:53 -05:00
parameters_across_files.ys
past_signedness.ys
port_int_types.sv
port_int_types.ys
prefix.sv verilog: fix multiple AST_PREFIX scope resolution issues 2021-09-21 12:10:59 -04:00
prefix.ys
roundtrip_proc.ys
run-test.sh tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
sign_array_query.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
size_cast.sv
size_cast.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
struct_access.sv
struct_access.ys
task_attr.ys
typedef_across_files.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
typedef_const_shadow.sv Add test for typenames using constants shadowed later on 2023-02-12 17:03:37 -05:00
typedef_const_shadow.ys Add test for typenames using constants shadowed later on 2023-02-12 17:03:37 -05:00
typedef_legacy_conflict.ys
unbased_unsized.sv
unbased_unsized.ys
unbased_unsized_shift.sv
unbased_unsized_shift.ys
unbased_unsized_tern.sv verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
unbased_unsized_tern.ys verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
unmatched_else.ys
unmatched_elsif.ys verilog: fix handling of nested ifdef directives 2021-03-01 12:28:33 -05:00
unmatched_endif.ys
unmatched_endif_2.ys
unnamed_block.ys
unnamed_genblk.sv
unnamed_genblk.ys verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
unreachable_case_sign.ys
upto.ys
void_func.ys verilog: Support void functions 2023-03-20 12:52:46 +01:00
wire_and_var.sv
wire_and_var.ys