Lofty 7ae4041e20 ice40, ecp5, gowin: enable ABC9 by default		2023-11-13 15:28:13 +00:00
..
.gitignore
add_sub.ys	ice40, ecp5, gowin: enable ABC9 by default	2023-11-13 15:28:13 +00:00
adffs.ys
bug1459.ys	Add testcase from #1459	2020-01-06 16:22:22 -08:00
bug1598.ys	Add #1598 testcase	2019-12-27 16:44:57 -08:00
bug1630.il.gz	Add #1630 testcase	2020-01-13 21:27:53 -08:00
bug1630.ys	Update bug1630.ys to use -lut 4 instead of lut file	2020-02-27 10:17:29 -08:00
bug1836.mem	Addings tests for #1836 and #3205	2023-02-21 05:23:14 +13:00
bug1836.ys	Genericising bug1836.ys	2023-02-21 05:23:16 +13:00
bug2409.ys	memory_dff: Fix needlessly duplicating enable bits.	2020-10-22 13:03:42 +02:00
bug2731.ys	abc9: replace cell type/parameters if derived type already processed (#2991)	2021-09-09 10:05:55 -07:00
counter.ys	ice40, ecp5, gowin: enable ABC9 by default	2023-11-13 15:28:13 +00:00
dffs.ys
dpram.v
dpram.ys
fsm.ys	Replace opt_rmdff with opt_dff.	2020-08-07 13:21:03 +02:00
latches.ys
latches_abc9.ys	tests: tidy up testcase	2020-06-03 08:41:55 -07:00
logic.ys
lutram.ys	memory_bram: Reuse extract_rdff helper for make_outreg.	2021-05-25 22:42:03 +02:00
macc.v
macc.ys	Do not do call equiv_opt when no sim model exists	2019-12-31 18:40:30 -08:00
memories.ys	Testing TDP synth mapping	2023-02-21 05:23:15 +13:00
mul.ys	Do not do call equiv_opt when no sim model exists	2019-12-31 18:40:30 -08:00
mux.ys	Update tests	2023-06-09 14:41:45 +02:00
opt_lut_ins.ys	Add opt_lut_ins pass. (#1673)	2020-02-03 14:57:17 +01:00
rom.v
rom.ys
run-test.sh	tests: Centralize test collection and Makefile generation	2020-09-21 15:07:02 +02:00
shifter.ys
tribuf.ys