mirror of
https://github.com/YosysHQ/yosys
synced 2025-05-17 12:44:46 +00:00
8 lines
130 B
Text
8 lines
130 B
Text
(* area = "1" *)
|
|
(* blackbox = 1 *)
|
|
module SRAM(CE1, I1);
|
|
input CE1;
|
|
wire CE1;
|
|
input [3:0] I1;
|
|
wire [3:0] I1;
|
|
endmodule
|