Martin Povišer 9018d06a33 quicklogic: Avoid carry chains in division mapping ... The default mapping rules for division-like operations (div/divfloor/ mod/modfloor) invoke subtractions which can get mapped to carry chains in FPGA flows. Optimizations across carry chains are weak, so in practice this ends up too costly compared to implementing the division purely in soft logic. For this reason arrange for `techmap.v` ignoring division operations under `-D NODIV`, and use this mode in `synth_quicklogic` to avoid carry chains for divisions.		2024-09-19 12:18:47 +02:00
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common
pp3
qlf_k6n10f	quicklogic: Generate bram_types_sim.v at build time	2023-12-04 18:21:00 +01:00
.gitignore
Makefile.inc	Fix out of tree build	2023-12-06 09:56:35 +01:00
ql_bram_merge.cc	Fix Windows build by forcing initialization order, fixes #4068	2024-01-02 11:26:48 +01:00
ql_bram_types.cc
ql_dsp_io_regs.cc	Fix Windows build by forcing initialization order, fixes #4068	2024-01-02 11:26:48 +01:00
ql_dsp_macc.cc	Fix out of tree build	2023-12-06 09:11:51 +01:00
ql_dsp_macc.pmg
ql_dsp_simd.cc	Fix Windows build by forcing initialization order, fixes #4068	2024-01-02 11:26:48 +01:00
synth_quicklogic.cc	quicklogic: Avoid carry chains in division mapping	2024-09-19 12:18:47 +02:00