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yosys/techlibs/anlogic
2019-04-10 08:32:53 -07:00
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anlogic_determine_init.cc
anlogic_eqn.cc Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
arith_map.v
cells_map.v
cells_sim.v
dram_init_16x4.vh
drams.txt
drams_map.v
eagle_bb.v
Makefile.inc
synth_anlogic.cc synth_* with -retime option now calls abc with -D 1 as well 2019-04-10 08:32:53 -07:00