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yosys/tests
Emil J. Tywoniak 024a71626d opt_expr: sub_not signorm compatibility
Route the (2^k-1)-x -> ~x rewrite through OptExprPatcher like its
sibling transforms in this file, instead of raw module->Not +
module->connect + module->remove. Loosen the postopt assertion to
tolerate the $input_port shim cell bufnorm adds for the (still
signorm-active) input port, matching the t:$*_port %d idiom already
used by opt_expr_alu.ys and other sibling tests.
2026-07-20 16:40:46 +02:00
..
aiger Move rename logic to abc_ops_reintegrate 2026-06-19 10:46:47 +01:00
alumacc Use generic testing on few more places 2026-04-16 11:00:44 +02:00
arch tests/gatemate: update fsm LUT counts for new proc src mapping 2026-07-20 15:01:30 +02:00
arith_tree End of file fix 2026-06-23 07:23:41 +02:00
asicworld Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
bind Use generic testing on few more places 2026-04-16 11:00:44 +02:00
blif Cleanup 2026-04-16 11:00:44 +02:00
bram Revert "tests: use memory -bram-register in tests/bram" 2026-07-17 23:38:01 +02:00
bugpoint Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
check_mem tests/check_mem: Drop unused init check 2026-05-30 11:06:11 +12:00
cxxrtl Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
errors End of file fix 2026-06-23 07:23:41 +02:00
fmt Cleanup 2026-04-16 11:00:44 +02:00
fsm Did share, opt_share and fsm 2026-04-16 11:00:44 +02:00
functional Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
hana Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
liberty Add scl caching test. 2026-07-10 14:52:06 +02:00
lut
memfile Update CI scripts for CMake 2026-06-03 08:58:11 +00:00
memlib Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
memories twine: fix replayability, reduce TwineSearch usage 2026-07-20 13:57:10 +02:00
opt opt_expr: sub_not signorm compatibility 2026-07-20 16:40:46 +02:00
opt_share Did share, opt_share and fsm 2026-04-16 11:00:44 +02:00
peepopt Converted some more 2026-04-16 11:00:44 +02:00
proc proc_mux: include switch expression location in $eq src 2026-07-20 15:01:30 +02:00
pyosys End of file fix 2026-06-23 07:23:41 +02:00
realmath Cleanup 2026-04-16 11:00:44 +02:00
rpc Make out of tree build testing possible 2026-05-19 14:26:07 +02:00
rtlil twine: fix replayability, reduce TwineSearch usage 2026-07-20 13:57:10 +02:00
sat Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
sdc Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
select Converted some more 2026-04-16 11:00:44 +02:00
share Did share, opt_share and fsm 2026-04-16 11:00:44 +02:00
sim Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
simple End of file fix 2026-06-23 07:23:41 +02:00
simple_abc9 Convert autotest script wrapper 2026-04-16 11:00:44 +02:00
smv End of file fix 2026-06-23 07:23:41 +02:00
sva End of file fix 2026-06-23 07:23:41 +02:00
svinterfaces Cleanup 2026-04-16 11:00:44 +02:00
svtypes Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
techmap WIP 2026-07-17 23:48:54 +02:00
tools End of file fix 2026-06-23 07:23:41 +02:00
unit unit tests: twines 2026-07-20 15:01:30 +02:00
various twine 2026-07-20 12:26:39 +02:00
verific Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
verilog Rm. 2026-07-07 04:03:17 +02:00
vloghtb End of file fix 2026-06-23 07:23:41 +02:00
write_verilog tests: Add mixed_upto write_verilog test 2026-06-19 11:20:01 +12:00
xprop xprop test: use -readable dump 2026-07-20 15:01:30 +02:00
.gitignore Save results, and create summary and report 2026-04-16 11:00:44 +02:00
common.mk Add VERBOSE (and V) option to Makefiles 2026-06-15 14:48:11 +02:00
gen_tests_makefile.py tests: undo skipping broken 2026-07-20 15:01:30 +02:00
Makefile Add initial codecov support 2026-07-10 12:19:59 +02:00
pass-fuzzing.md Remove trailing whitespaces 2026-06-23 07:24:59 +02:00