.. |
aiger
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aiger: add regression test for sliced output segfault
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2025-05-09 16:01:47 +02:00 |
alumacc
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macc_v2: Add test
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2025-01-27 13:19:26 +01:00 |
arch
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URAM mapping : Add test for 2048 x 144b
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2025-05-10 14:53:56 +02:00 |
asicworld
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
bind
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Add support for parsing the SystemVerilog 'bind' construct
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2021-07-16 09:31:39 -04:00 |
blif
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
bram
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
cxxrtl
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Reinstate #4768
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2025-04-08 11:58:05 +12:00 |
errors
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Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique,
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2018-10-25 02:37:56 +03:00 |
fmt
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cxxrtl: always lazily format print messages.
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2024-01-19 18:55:23 +00:00 |
fsm
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
functional
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functional tests: run from make tests but not smtlib/rkt tests
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2024-09-04 10:30:08 +01:00 |
hana
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
liberty
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libcache: fix test
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2025-05-09 12:40:38 +02:00 |
lut
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
memfile
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
memlib
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Move parameters to module declaration
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2024-04-08 12:44:37 +02:00 |
memories
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rtlil: Adjust internal check for $mem_v2 cells
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2024-11-08 15:18:43 +01:00 |
opt
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tests: test opt_expr for 32 bit unsigned shifts
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2025-05-26 15:28:44 +01:00 |
opt_share
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
peepopt
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Add muldiv_c peepopt pass
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2025-04-30 08:06:59 -07:00 |
proc
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Merge pull request #4714 from georgerennie/george/proc_dff_bug_multiple_sigs
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2024-11-20 13:26:32 +01:00 |
realmath
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
rpc
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Remove references to ilang
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2024-11-05 12:36:31 +13:00 |
sat
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share: Cleanup and additional testing
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2025-04-15 12:34:46 +02:00 |
select
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design.cc: Fix selections when copying
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2025-04-08 16:35:12 +12:00 |
share
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
sim
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fstdata.cc: Fix last step
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2025-05-12 13:18:19 +12:00 |
simple
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write_verilog: don't assign to a reg .
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2024-04-03 13:06:45 +02:00 |
simple_abc9
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Reinstate #4768
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2025-04-08 11:58:05 +12:00 |
smv
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Remove references to ilang
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2024-11-05 12:36:31 +13:00 |
sva
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tests/sva: Skip sva tests that use SBY until SBY is compatible again
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2024-03-05 14:37:33 +01:00 |
svinterfaces
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
svtypes
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Tests: Add svtypes/typedef_struct_global.ys
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2025-05-26 12:16:58 +12:00 |
techmap
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Add check at constmap and merge test
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2025-04-14 11:44:52 +01:00 |
tools
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support file locations containing spaces
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2022-08-08 20:30:50 +02:00 |
unit
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rtlil: Add {from,to}_hdl_index methods to Wire
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2025-02-18 17:08:45 +01:00 |
various
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cutpoint: Re-add whole module optimization
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2025-05-06 09:57:34 +12:00 |
verific
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Merge pull request #4814 from YosysHQ/emil/make-test-fasterer
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2024-12-18 19:02:39 +01:00 |
verilog
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Merge pull request #5158 from georgerennie/george/task_inout
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2025-06-04 14:23:08 +01:00 |
vloghtb
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
xprop
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tests: Comment on A[0]
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2024-02-16 11:43:28 +01:00 |
gen-tests-makefile.sh
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Update gen-tests-makefile.sh
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2025-03-27 10:33:51 +13:00 |