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Code Activity
yosys/frontends/verilog
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Exact
Emil J. Tywoniak ca24169659 verilog: fix build dependency graph
2025-07-10 23:59:54 +02:00
..
.gitignore read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00
const2ast.cc ast, read_verilog: unify location types, reduce filename copying 2025-07-10 21:15:50 +02:00
Makefile.inc verilog: fix build dependency graph 2025-07-10 23:59:54 +02:00
preproc.cc preproc.cc: Use full path for generated file 2025-07-10 21:15:50 +02:00
preproc.h ast, read_verilog: ownership in AST, use C++ styles for parser and lexer 2025-07-10 21:15:50 +02:00
verilog_error.cc read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00
verilog_error.h read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00
verilog_frontend.cc read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00
verilog_frontend.h fixup! fixup! ast, read_verilog: unify location types, reduce filename copying 2025-07-10 21:15:50 +02:00
verilog_lexer.h read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00
verilog_lexer.l verilog: add support for SystemVerilog string literals. 2025-07-10 23:28:22 +02:00
verilog_location.h fixup! ast, read_verilog: unify location types, reduce filename copying 2025-07-10 21:15:50 +02:00
verilog_parser.y read_verilog, ast: use unified locations in errors and simplify dependencies 2025-07-10 21:15:50 +02:00