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techlibs/common/simlib.v: EN_{SRC,DST} -> {SRC,DST}_EN
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1 changed files with 2 additions and 2 deletions
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@ -1445,7 +1445,7 @@ endmodule
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// --------------------------------------------------------
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module \$specrule (EN_SRC, EN_DST, SRC, DST);
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module \$specrule (SRC_EN, DST_EN, SRC, DST);
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parameter TYPE = "";
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parameter T_LIMIT = 0;
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@ -1460,7 +1460,7 @@ parameter SRC_POL = 0;
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parameter DST_PEN = 0;
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parameter DST_POL = 0;
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input EN_SRC, EN_DST;
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input SRC_EN, DST_EN;
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input [SRC_WIDTH-1:0] SRC;
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input [DST_WIDTH-1:0] DST;
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