From fd72c1c995da1d604bab8f8ff8f78c759a37248b Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 5 May 2020 08:30:36 -0700
Subject: [PATCH] techlibs/common/simlib.v: EN_{SRC,DST} -> {SRC,DST}_EN

---
 techlibs/common/simlib.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 2cdddeabb..e8a9da1de 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1445,7 +1445,7 @@ endmodule
 
 // --------------------------------------------------------
 
-module \$specrule (EN_SRC, EN_DST, SRC, DST);
+module \$specrule (SRC_EN, DST_EN, SRC, DST);
 
 parameter TYPE = "";
 parameter T_LIMIT = 0;
@@ -1460,7 +1460,7 @@ parameter SRC_POL = 0;
 parameter DST_PEN = 0;
 parameter DST_POL = 0;
 
-input EN_SRC, EN_DST;
+input SRC_EN, DST_EN;
 input [SRC_WIDTH-1:0] SRC;
 input [DST_WIDTH-1:0] DST;