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Fix comments

This commit is contained in:
Eddie Hung 2019-08-22 12:35:35 -07:00
parent 9224b3bc17
commit f9906eed68
8 changed files with 11 additions and 10 deletions

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@ -2,4 +2,5 @@ read_verilog memory.v
synth_ice40
cd top
select -assert-count 1 t:SB_RAM40_4K
select -assert-none t:SB_RAM40_4K %% t:* %D
write_verilog memory_synth.v