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gowin: Fix LUT RAM inference, add more models.

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This commit is contained in:
Marcelina Kościelnicka 2022-02-09 06:13:34 +01:00
parent ac2bb70b52
commit f61f2a4078
3 changed files with 244 additions and 45 deletions
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5
techlibs/gowin/lutrams_map.v
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@ -15,13 +15,14 @@ module \$__GW1NR_RAM16S4 (CLK1, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
`include "brams_init3.vh"
RAM16S4
RAM16SDP4
#(.INIT_0(INIT_0),
.INIT_1(INIT_1),
.INIT_2(INIT_2),
.INIT_3(INIT_3))
_TECHMAP_REPLACE_
(.AD(B1ADDR),
(.WAD(B1ADDR),
.RAD(A1ADDR),
.DI(B1DATA),
.DO(A1DATA),
.CLK(CLK1),