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https://github.com/YosysHQ/yosys
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WIP
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parent
015ab4e45b
commit
f592f2f3af
203 changed files with 4575 additions and 4481 deletions
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@ -136,7 +136,7 @@ struct Coolrunner2FixupPass : public Pass {
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if (cell->type.in(ID(FDCP), ID(FDCP_N), ID(FDDCP), ID(LDCP), ID(LDCP_N),
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ID(FTCP), ID(FTCP_N), ID(FTDCP), ID(FDCPE), ID(FDCPE_N), ID(FDDCPE)))
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{
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auto output = sigmap(cell->getPort(ID::Q)[0]);
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auto output = sigmap(cell->getPort(TW::Q)[0]);
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sig_fed_by_ff.insert(output);
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}
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}
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@ -159,7 +159,7 @@ struct Coolrunner2FixupPass : public Pass {
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if (cell->type.in(ID(IBUF), ID(IOBUFE)))
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{
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if (cell->hasPort(ID::O)) {
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auto output = sigmap(cell->getPort(ID::O)[0]);
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auto output = sigmap(cell->getPort(TW::O)[0]);
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sig_fed_by_io.insert(output);
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}
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}
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@ -182,7 +182,7 @@ struct Coolrunner2FixupPass : public Pass {
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{
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if (cell->type == ID(BUFG))
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{
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auto output = sigmap(cell->getPort(ID::O)[0]);
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auto output = sigmap(cell->getPort(TW::O)[0]);
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sig_fed_by_bufg.insert(output);
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}
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}
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@ -193,7 +193,7 @@ struct Coolrunner2FixupPass : public Pass {
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{
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if (cell->type == ID(BUFGSR))
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{
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auto output = sigmap(cell->getPort(ID::O)[0]);
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auto output = sigmap(cell->getPort(TW::O)[0]);
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sig_fed_by_bufgsr.insert(output);
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}
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}
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@ -204,7 +204,7 @@ struct Coolrunner2FixupPass : public Pass {
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{
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if (cell->type == ID(BUFGTS))
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{
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auto output = sigmap(cell->getPort(ID::O)[0]);
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auto output = sigmap(cell->getPort(TW::O)[0]);
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sig_fed_by_bufgts.insert(output);
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}
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}
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@ -215,7 +215,7 @@ struct Coolrunner2FixupPass : public Pass {
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{
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if (cell->type == ID(IBUF))
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{
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auto output = sigmap(cell->getPort(ID::O)[0]);
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auto output = sigmap(cell->getPort(TW::O)[0]);
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sig_fed_by_ibuf.insert(output);
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}
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}
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@ -259,10 +259,10 @@ struct Coolrunner2FixupPass : public Pass {
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{
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SigBit input;
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if (maybe_ff_cell->type.in(ID(FTCP), ID(FTCP_N), ID(FTDCP)))
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input = sigmap(maybe_ff_cell->getPort(ID::T)[0]);
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input = sigmap(maybe_ff_cell->getPort(TW::T)[0]);
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else
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input = sigmap(maybe_ff_cell->getPort(ID::D)[0]);
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SigBit output = sigmap(maybe_ff_cell->getPort(ID::Q)[0]);
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input = sigmap(maybe_ff_cell->getPort(TW::D)[0]);
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SigBit output = sigmap(maybe_ff_cell->getPort(TW::Q)[0]);
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if (input == ibuf_out_wire)
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{
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@ -287,9 +287,9 @@ struct Coolrunner2FixupPass : public Pass {
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// to be inserted.
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SigBit input;
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if (cell->type.in(ID(FTCP), ID(FTCP_N), ID(FTDCP)))
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input = sigmap(cell->getPort(ID::T)[0]);
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input = sigmap(cell->getPort(TW::T)[0]);
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else
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input = sigmap(cell->getPort(ID::D)[0]);
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input = sigmap(cell->getPort(TW::D)[0]);
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// If the input wasn't an XOR nor an IO, then a buffer
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// definitely needs to be added.
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@ -303,9 +303,9 @@ struct Coolrunner2FixupPass : public Pass {
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auto xor_to_ff_wire = makexorbuffer(module, input, cell->name.c_str());
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if (cell->type.in(ID(FTCP), ID(FTCP_N), ID(FTDCP)))
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cell->setPort(ID::T, xor_to_ff_wire);
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cell->setPort(TW::T, xor_to_ff_wire);
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else
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cell->setPort(ID::D, xor_to_ff_wire);
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cell->setPort(TW::D, xor_to_ff_wire);
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}
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// Buffering FF clocks. FF clocks can only come from either
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@ -314,9 +314,9 @@ struct Coolrunner2FixupPass : public Pass {
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// AND-ing two signals) but not in all cases.
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SigBit clock;
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if (cell->type.in(ID(LDCP), ID(LDCP_N)))
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clock = sigmap(cell->getPort(ID::G)[0]);
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clock = sigmap(cell->getPort(TW::G)[0]);
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else
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clock = sigmap(cell->getPort(ID::C)[0]);
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clock = sigmap(cell->getPort(TW::C)[0]);
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if (!sig_fed_by_pterm[clock] && !sig_fed_by_bufg[clock])
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{
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@ -325,9 +325,9 @@ struct Coolrunner2FixupPass : public Pass {
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auto pterm_to_ff_wire = makeptermbuffer(module, clock);
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if (cell->type.in(ID(LDCP), ID(LDCP_N)))
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cell->setPort(ID::G, pterm_to_ff_wire);
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cell->setPort(TW::G, pterm_to_ff_wire);
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else
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cell->setPort(ID::C, pterm_to_ff_wire);
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cell->setPort(TW::C, pterm_to_ff_wire);
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}
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// Buffering FF set/reset. This can only come from either
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@ -347,7 +347,7 @@ struct Coolrunner2FixupPass : public Pass {
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}
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SigBit reset;
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reset = sigmap(cell->getPort(ID::CLR)[0]);
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reset = sigmap(cell->getPort(TW::CLR)[0]);
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if (reset != SigBit(false))
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{
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if (!sig_fed_by_pterm[reset] && !sig_fed_by_bufgsr[reset])
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@ -356,7 +356,7 @@ struct Coolrunner2FixupPass : public Pass {
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auto pterm_to_ff_wire = makeptermbuffer(module, reset);
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cell->setPort(ID::CLR, pterm_to_ff_wire);
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cell->setPort(TW::CLR, pterm_to_ff_wire);
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}
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}
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@ -384,7 +384,7 @@ struct Coolrunner2FixupPass : public Pass {
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if (cell->type == ID(IOBUFE))
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{
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// Buffer IOBUFE inputs. This can only be fed from an XOR or FF.
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SigBit input = sigmap(cell->getPort(ID::I)[0]);
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SigBit input = sigmap(cell->getPort(TW::I)[0]);
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if ((!sig_fed_by_xor[input] && !sig_fed_by_ff[input]) ||
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packed_reg_out[input])
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@ -393,7 +393,7 @@ struct Coolrunner2FixupPass : public Pass {
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auto xor_to_io_wire = makexorbuffer(module, input, cell->name.c_str());
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cell->setPort(ID::I, xor_to_io_wire);
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cell->setPort(TW::I, xor_to_io_wire);
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}
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// Buffer IOBUFE enables. This can only be fed from a pterm
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@ -401,14 +401,14 @@ struct Coolrunner2FixupPass : public Pass {
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if (cell->hasPort(ID::E))
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{
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SigBit oe;
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oe = sigmap(cell->getPort(ID::E)[0]);
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oe = sigmap(cell->getPort(TW::E)[0]);
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if (!sig_fed_by_pterm[oe] && !sig_fed_by_bufgts[oe])
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{
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log("Buffering output enable to \"%s\"\n", cell->name);
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auto pterm_to_oe_wire = makeptermbuffer(module, oe);
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cell->setPort(ID::E, pterm_to_oe_wire);
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cell->setPort(TW::E, pterm_to_oe_wire);
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}
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}
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}
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@ -49,8 +49,8 @@ struct Coolrunner2SopPass : public Pass {
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{
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if (cell->type == ID($_NOT_))
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{
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auto not_input = sigmap(cell->getPort(ID::A)[0]);
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auto not_output = sigmap(cell->getPort(ID::Y)[0]);
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auto not_input = sigmap(cell->getPort(TW::A)[0]);
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auto not_output = sigmap(cell->getPort(TW::Y)[0]);
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not_cells[not_input] = tuple<SigBit, Cell*>(not_output, cell);
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}
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}
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@ -67,17 +67,17 @@ struct Coolrunner2SopPass : public Pass {
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special_pterms_no_inv[sigmap(cell->getPort(ID(PRE))[0])].insert(
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make_tuple(cell, ID(PRE)));
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if (cell->hasPort(ID::CLR))
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special_pterms_no_inv[sigmap(cell->getPort(ID::CLR)[0])].insert(
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special_pterms_no_inv[sigmap(cell->getPort(TW::CLR)[0])].insert(
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make_tuple(cell, ID::CLR));
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if (cell->hasPort(ID(CE)))
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special_pterms_no_inv[sigmap(cell->getPort(ID(CE))[0])].insert(
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make_tuple(cell, ID(CE)));
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if (cell->hasPort(ID::C))
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special_pterms_inv[sigmap(cell->getPort(ID::C)[0])].insert(
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special_pterms_inv[sigmap(cell->getPort(TW::C)[0])].insert(
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make_tuple(cell, ID::C));
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if (cell->hasPort(ID::G))
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special_pterms_inv[sigmap(cell->getPort(ID::G)[0])].insert(
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special_pterms_inv[sigmap(cell->getPort(TW::G)[0])].insert(
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make_tuple(cell, ID::G));
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}
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}
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@ -88,8 +88,8 @@ struct Coolrunner2SopPass : public Pass {
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if (cell->type == ID($sop))
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{
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// Read the inputs/outputs/parameters of the $sop cell
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auto sop_inputs = sigmap(cell->getPort(ID::A));
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auto sop_output = sigmap(cell->getPort(ID::Y))[0];
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auto sop_inputs = sigmap(cell->getPort(TW::A));
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auto sop_output = sigmap(cell->getPort(TW::Y))[0];
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auto sop_depth = cell->getParam(ID::DEPTH).as_int();
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auto sop_width = cell->getParam(ID::WIDTH).as_int();
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auto sop_table = cell->getParam(ID::TABLE);
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